Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

On 29 November 2016 at 03:59, Martin Sebor wrote: > On 11/28/2016 06:35 PM, David Edelsohn wrote: >> >> Martin, >> >> I am seeing a number of new failures with the testcases on AIX. >> >> FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-1.c (test for excess errors) >> >> Excess

[PATCH, i386]: Move mask ops from i386.md to sse.md ...

... and fix gcc.target/i386/avx512f-kmovw-1.c scan-asm failure. 2016-11-29 Uros Bizjak * config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md. (mshift): Ditto. (SWI1248_AVX512BWDQ): Ditto. (SWI1248_AVX512BW): Ditto. (k): Ditto. (kandn): Ditto.

Re: [PATCH 7/9] Add RTL-error-handling to host

On 11/29/2016 07:53 PM, David Malcolm wrote: Would you prefer that I went with approach (B), or is approach (A) acceptable? Well, I was hoping there'd be an approach (C) where the read-rtl code uses whatever diagnostics framework that is available. Maybe it'll turn out that's too hard.

Re: [Patch, Fortran] PR 78573: [7 Regression] [OOP] ICE in resolve_component, at fortran/resolve.c:13405

On Tue, Nov 29, 2016 at 10:58:35PM +0100, Janus Weil wrote: > > here is a rather straightforward patch for an ice-on-invalid > regression. Regtests cleanly on x86_64-linux-gnu. Ok for trunk? > Yes. -- Steve

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

On 11/28/2016 10:33 AM, Andre Vehreschild wrote: PING! I know it's a lengthy patch, but comments would be nice anyway. - Andre On Tue, 22 Nov 2016 20:46:50 +0100 Andre Vehreschild wrote: Hi all, attached patch addresses the need of extending the API of the caf-libs to enable

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Hi Jerry, Tests with multiple images go into the opencoarrays testsuite. Still to push though. The tests I have so far all pass. - Andre Am 30. November 2016 00:06:22 MEZ, schrieb Jerry DeLisle : >On 11/28/2016 10:33 AM, Andre Vehreschild wrote: >> PING! >> >> I know

Re: [PATCH] xtensa: Fix PR target/78603

On Tue, Nov 29, 2016 at 2:16 PM, augustine.sterl...@gmail.com wrote: > On Tue, Nov 29, 2016 at 2:08 PM, Max Filippov wrote: >> 2016-11-29 Max Filippov >> gcc/ >> * config/xtensa/xtensa.c (hwloop_optimize): Don't

Re: Add a mem_alias_size helper class

Jeff Law writes: > On 11/15/2016 09:04 AM, Richard Sandiford wrote: >> alias.c encodes memory sizes as follows: >> >> size > 0: the exact size is known >> size == 0: the size isn't known >> size < 0: the exact size of the reference itself is known, >> but the address has been

Re: [PATCH] Fix format_integer (PR tree-optimization/78586)

On 11/29/2016 12:48 PM, Jakub Jelinek wrote: Hi! As mentioned in the PR, the LSHIFT_EXPR computation of values that will need longest or shortest string is both incorrect (it shifts integer_one_node left, so for precisions above precision of integer it returns 0 (not to mention that it is

Re: Add a mem_alias_size helper class

On 11/15/2016 09:04 AM, Richard Sandiford wrote: alias.c encodes memory sizes as follows: size > 0: the exact size is known size == 0: the size isn't known size < 0: the exact size of the reference itself is known, but the address has been aligned via AND. In this case "-size" includes the

Re: [PATCH] Fix x86_64 fix_debug_reg_uses (PR rtl-optimization/78575)

On 11/29/2016 12:41 PM, Jakub Jelinek wrote: Hi! The x86_64 stv pass uses PUT_MODE to change REGs and MEMs in place to affect all setters and users, but that is undesirable in debug insns which are intentionally ignored during the analysis and we should keep using correct modes (TImode) instead

Re: [PATCH] Fix x86_64 fix_debug_reg_uses (PR rtl-optimization/78575)

On Tue, Nov 29, 2016 at 03:20:08PM -0700, Jeff Law wrote: > On 11/29/2016 12:41 PM, Jakub Jelinek wrote: > >The x86_64 stv pass uses PUT_MODE to change REGs and MEMs in place to affect > >all setters and users, but that is undesirable in debug insns which are > >intentionally ignored during the

Re: Add a mem_alias_size helper class

On 11/29/2016 03:51 PM, Richard Sandiford wrote: Jeff Law writes: On 11/15/2016 09:04 AM, Richard Sandiford wrote: alias.c encodes memory sizes as follows: size > 0: the exact size is known size == 0: the size isn't known size < 0: the exact size of the reference itself is

[PATCH] xtensa: Fix PR target/78603

2016-11-29 Max Filippov gcc/ * config/xtensa/xtensa.c (hwloop_optimize): Don't emit zero overhead loop start between a call and its CALL_ARG_LOCATION note. --- gcc/config/xtensa/xtensa.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff

Re: [PATCH] xtensa: Fix PR target/78603

On Tue, Nov 29, 2016 at 2:08 PM, Max Filippov wrote: > 2016-11-29 Max Filippov > gcc/ > * config/xtensa/xtensa.c (hwloop_optimize): Don't emit zero > overhead loop start between a call and its CALL_ARG_LOCATION > note. Approved.

[PATCH], PR 78594, Fix storing QImode/HImode on ISA 3.0/power9

I was developing the next round of ISA 3.0 code changes to use the vector extract byte, half word, and word instructions (VEXTU{B,H,W}{R,L}X) that deposit the value into a general purpose register instead of a vector register, and I was running the changes through the simulator. I discovered that

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

On 11/29/2016 09:56 AM, Martin Sebor wrote: On 11/28/2016 05:42 PM, Joseph Myers wrote: On Sun, 27 Nov 2016, Martin Sebor wrote: Finally, the patch also tightens up the constraint on the upper bound of bounded functions like snprintf to be INT_MAX. The functions cannot produce output in

Go patch committed: Merge to gccgo branch

I merged GCC trunk revision 242967 to the gccgo branch. Ian

Re: [PATCH, ARM] Further improve stack usage on sha512 (PR 77308)

On 11/29/16 16:06, Wilco Dijkstra wrote: > Bernd Edlinger wrote: > > - "TARGET_32BIT && reload_completed > + "TARGET_32BIT && ((!TARGET_NEON && !TARGET_IWMMXT) || reload_completed) > && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))" > > This is equivalent to "&& (!TARGET_IWMMXT ||

Re: [PR middle-end/78566] Fix uninit regressions caused by previous -Wmaybe-uninit change

On 29 November 2016 at 17:49, Christophe Lyon wrote: > On 29 November 2016 at 17:33, Aldy Hernandez wrote: >> This fixes the gcc.dg/uninit-pred-6* failures I seem to have caused on some >> non x86 platforms. Sorry for the delay. >> >> The problem is

[PATCH] Another debug info stv fix (PR rtl-optimization/78547)

Hi! The following testcase ICEs because DECL_RTL/DECL_INCOMING_RTL are adjusted by the stv pass through the PUT_MODE modifications, which means that for var-tracking.c they contain a bogus mode. Fixed by wrapping those into TImode subreg or adjusting the MEMs to have the correct mode.

Re: [PATCH v2] Fix PR78588 - rtlanal.c:5210:38: runtime error: shift exponent 4294967295 is too large for 64-bit type

On Tue, Nov 29, 2016 at 05:00:05PM +0100, Markus Trippelsdorf wrote: > Building gcc with -fsanitize=undefined shows: > rtlanal.c:5210:38: runtime error: shift exponent 4294967295 is too large for > 64-bit type 'long unsigned int' > > This happens because if_then_else_cond() in combine.c calls >

Re: [PATCH] Introduce -fdump-ipa-clones dump output

On 11/11/2016 07:30 AM, Martin Liška wrote: Hello. Motivation for the patch is to dump IPA clones that were created by all inter-procedural optimizations. Usage of such input is to track set of functions where a code from another function can eventually occur. Usage of the dump file can be seen

[PATCH] libiberty: avoid reading past end of buffer in strndup/xstrndup (PR c/78498)

libiberty's implementations of strndup and xstrndup call strlen on the input string, and hence can read past the end of the input buffer if it isn't zero-terminated (such as is the case in PR c/78498, where the input string is from the input.c line cache). This patch converts them to use strnlen

[PATCH] Fix format_integer (PR tree-optimization/78586)

Hi! As mentioned in the PR, the LSHIFT_EXPR computation of values that will need longest or shortest string is both incorrect (it shifts integer_one_node left, so for precisions above precision of integer it returns 0 (not to mention that it is invalid GENERIC, because the types of first operand

Re: [PATCH] Delete GCJ

On 11/21/2016 04:23 PM, Matthias Klose wrote: On 21.11.2016 18:16, Rainer Orth wrote: Hi Matthias, ahh, didn't see that :-/ Now fixed, is this clearer now? The options @option{--with-target-bdw-gc-include} and @option{--with-target-bdw-gc-lib} must always specified together for

Re: [PATCH] add common CPP_SPECS for bfin

On 11/28/2016 10:51 PM, Waldemar Brodkorb wrote: Hi, add common defines _REENTRANT and _POSIX_SOURCE for bfin. Patch is used in Buildroot for a while to fix issues compiling some software. See here, why this should be always enabled:

Re: [PATCH] libiberty: avoid reading past end of buffer in strndup/xstrndup (PR c/78498)

On Tue, Nov 29, 2016 at 2:08 PM, David Malcolm wrote: > > gcc/ChangeLog: > PR c/78498 > * selftest.c (selftest::assert_strndup_eq): New function. > (selftest::test_strndup): New function. > (selftest::test_libiberty): New function. >

Re: [PATCH] Remove uninitialized reads of is_leaf

Jeff Law wrote: > On 11/29/2016 11:39 AM, Wilco Dijkstra wrote: > > I forgot to ask, would it be reasonable to add an assert to check we're not > > in > > a sequence in leaf_function_p? I guess this will trigger on several targets > > (leaf_function_p is used in several backends) but it's a real

Re: Pretty printers for versioned namespace

On 28/11/16 22:19 +0100, François Dumont wrote: Hi Here is a patch to fix pretty printers when versioned namespace is activated. You will see that I have hesitated in making the fix independant of the version being used. In source files you will find (__7::)? patterns while in

Re: [PATCH], PR 78594, Fix storing QImode/HImode on ISA 3.0/power9

On Tue, Nov 29, 2016 at 02:14:17PM -0500, Michael Meissner wrote: > I was developing the next round of ISA 3.0 code changes to use the vector > extract byte, half word, and word instructions (VEXTU{B,H,W}{R,L}X) that > deposit the value into a general purpose register instead of a vector >

Re: [PATCH] combine: Tweak change_zero_ext

On 29 November 2016 at 20:38, Uros Bizjak wrote: >> 2016-11-26 Segher Boessenkool >> >> * combine.c (change_zero_ext): Also handle extends from a subreg >> to a mode bigger than that of the operand of the subreg. > > This patch introduced: > >

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

On 11/29/2016 01:04 AM, Christophe Lyon wrote: On 29 November 2016 at 03:59, Martin Sebor wrote: On 11/28/2016 06:35 PM, David Edelsohn wrote: Martin, I am seeing a number of new failures with the testcases on AIX. FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-1.c (test for

[Patch, Fortran] PR 78573: [7 Regression] [OOP] ICE in resolve_component, at fortran/resolve.c:13405

Hi all, here is a rather straightforward patch for an ice-on-invalid regression. Regtests cleanly on x86_64-linux-gnu. Ok for trunk? Cheers, Janus 2016-11-29 Janus Weil PR fortran/78573 * decl.c (build_struct): On error, return directly and do not build

Re: [libstdc++, testsuite] Add dg-require-thread-fence

On 16/11/16 22:18 +0100, Christophe Lyon wrote: On 15 November 2016 at 12:50, Jonathan Wakely wrote: On 14/11/16 14:32 +0100, Christophe Lyon wrote: On 20 October 2016 at 19:40, Jonathan Wakely wrote: On 20/10/16 10:33 -0700, Mike Stump wrote: On

Re: [AArch64][ARM][GCC][PATCHv2 3/3] Add tests for missing Poly64_t intrinsics to GCC

Hi All, The new patch contains the proper types for the intrinsics that should be returning uint64x1 and has the rest of the comments by Christophe in them. Kind Regards, Tamar From: Tamar Christina Sent: Friday, November 25, 2016 4:01:30 PM To:

[patch,lto] Fix PR78562: Wrong type mismatch warning for built-ins with same asm name.

This is a fix for a wrong warning from -Wlto-type-mismatch that reports a type mismatch for two built-in functions. The avr backend has several built-ins that have the same asm name because their assembler implementation in libgcc is exactly the same. The prototypes might differ, however.

Re: [PATCH] improve folding of expressions that move a single bit around

On Mon, Nov 28, 2016 at 7:41 PM, Jeff Law wrote: > On 11/28/2016 06:10 AM, Paolo Bonzini wrote: >> >> >> >> On 27/11/2016 00:28, Marc Glisse wrote: >>> >>> On Sat, 26 Nov 2016, Paolo Bonzini wrote: >>> --- match.pd(revision 242742) +++ match.pd(working copy)

[Ping][PATCH 0/6][ARM] Implement support for ACLE Coprocessor Intrinsics

On 21/11/16 08:42, Christophe Lyon wrote: > Hi, > > > On 17 November 2016 at 11:45, Kyrill Tkachov > wrote: >> >> On 17/11/16 10:31, Andre Vieira (lists) wrote: >>> >>> Hi Kyrill, >>> >>> On 17/11/16 10:11, Kyrill Tkachov wrote: Hi Andre, On

Re: [PATCH][AArch64] Separate shrink wrapping hooks implementation

On Mon, Nov 14, 2016 at 02:25:28PM +, Kyrill Tkachov wrote: > > On 11/11/16 15:31, Kyrill Tkachov wrote: > > > >On 11/11/16 10:17, Kyrill Tkachov wrote: > >> > >>On 10/11/16 23:39, Segher Boessenkool wrote: > >>>On Thu, Nov 10, 2016 at 02:42:24PM -0800, Andrew Pinski wrote: > On Thu, Nov

[PATCH][ARM] Remove movdi_vfp_cortexa8

Merge the movdi_vfp_cortexa8 pattern into movdi_vfp and remove it to avoid unnecessary duplication and repeating bugs like PR78439 due to changes being applied only to one of the duplicates. Bootstrap OK for ARM and Thumb-2 gnueabihf targets. OK for commit? ChangeLog: 2016-11-29 Wilco Dijkstra

Re: [PATCH][AArch64] Separate shrink wrapping hooks implementation

Hi James, On 29/11/16 10:57, James Greenhalgh wrote: On Mon, Nov 14, 2016 at 02:25:28PM +, Kyrill Tkachov wrote: On 11/11/16 15:31, Kyrill Tkachov wrote: On 11/11/16 10:17, Kyrill Tkachov wrote: On 10/11/16 23:39, Segher Boessenkool wrote: On Thu, Nov 10, 2016 at 02:42:24PM -0800,

[PATCH] Support nested functions (PR sanitize/78541).

Currently we an assert that prevents proper use-after-scope sanitization in nested functions. With the attached patch, we are able to do so. I'm adding 2 test-cases, first one is the ICE reported in PR and the second one tests proper report of use-after-scope passed by FRAME belonging to a nested

[PATCH] Remove uninitialized reads of is_leaf

GCC caches the whether a function is a leaf in crtl->is_leaf. Using this in the backend is best as leaf_function_p may not work correctly (eg. while emitting prolog or epilog code). There are many reads of crtl->is_leaf before it is initialized. Many targets do in targetm.frame_pointer_required

Re: [PATCH][AArch64] Separate shrink wrapping hooks implementation

On 29/11/16 11:18, Kyrill Tkachov wrote: Hi James, On 29/11/16 10:57, James Greenhalgh wrote: On Mon, Nov 14, 2016 at 02:25:28PM +, Kyrill Tkachov wrote: On 11/11/16 15:31, Kyrill Tkachov wrote: On 11/11/16 10:17, Kyrill Tkachov wrote: On 10/11/16 23:39, Segher Boessenkool wrote: On

Re: [PATCH 4/4] S/390: Disable peeling for alignment.

On Tue, Nov 29, 2016 at 10:42 AM, Andreas Krebbel wrote: > Although the S/390 backend states that the machine supports unaligned > vector accesses the loop vectorizer still tries to peel loop > iterations to get higher alignments. Setting >

[PATCH 1/4] S/390: Fix vector all/any cc modes.

This fixes a problem with the vector compares producing CC mode results. The instructions produce condition code modes which can be either interpreted to check an ALL elements or an ANY element result. As the modes where used before they could not be inverted by the middle-end by inverting the

[PATCH 3/4] S/390: Add vector pack/unpack patterns.

gcc/ChangeLog: 2016-11-29 Andreas Krebbel * config/s390/vector.md (vec_halfhalf): New mode iterator. ("vec_pack_trunc_", "vec_pack_ssat_") ("vec_pack_usat_", "vec_unpacks_hi_v16qi") ("vec_unpacks_low_v16qi", "vec_unpacku_hi_v16qi")

[PATCH 4/4] S/390: Disable peeling for alignment.

Although the S/390 backend states that the machine supports unaligned vector accesses the loop vectorizer still tries to peel loop iterations to get higher alignments. Setting vect_max_peeling_for_alignment to 0 prevents this. gcc/ChangeLog: 2016-11-29 Andreas Krebbel

[PATCH 0/4] S/390: Vector bugfix and improvements

Please see the patches for descriptions. The first one is an important bugfix which needs to go also into GCC 5 and 6 branches. I'll commit the patches in a few days to give some time for comments. Andreas Krebbel (4): S/390: Fix vector all/any cc modes. S/390: Merge compare of compare

Re: [AArch64][ARM][GCC][PATCHv2 3/3] Add tests for missing Poly64_t intrinsics to GCC

Hi Tamar, On 29 November 2016 at 10:50, Tamar Christina wrote: > Hi All, > > The new patch contains the proper types for the intrinsics that should be > returning uint64x1 > and has the rest of the comments by Christophe in them. > LGTM. One more question: maybe we

Re: [RFC] Assert DECL_ABSTRACT_ORIGIN is different from the decl itself

On Mon, Nov 28, 2016 at 6:28 PM, Martin Jambor wrote: > Hi Jeff, > > On Mon, Nov 28, 2016 at 08:46:05AM -0700, Jeff Law wrote: >> On 11/28/2016 07:27 AM, Martin Jambor wrote: >> > Hi, >> > >> > one of a number of symptoms of an otherwise unrelated HSA bug I've >> > been debugging

Re: [PATCH/VRP] Fix type of EQ_EXPR

On Tue, Nov 29, 2016 at 7:36 AM, Andrew Pinski wrote: > While rewriting PHI-OPT to use match and simplify infrastructure, I > ran into a problem where VRP pass would create a EQ_EXPR which has a > non boolean type inside the VRP pass. This currently works on > accident as it

Re: [Ping][PATCH 0/6][ARM] Implement support for ACLE Coprocessor Intrinsics

On 29/11/16 10:35, Andre Vieira (lists) wrote: On 21/11/16 08:42, Christophe Lyon wrote: Hi, On 17 November 2016 at 11:45, Kyrill Tkachov wrote: On 17/11/16 10:31, Andre Vieira (lists) wrote: Hi Kyrill, On 17/11/16 10:11, Kyrill Tkachov wrote: Hi Andre, On

[PATCH][AArch64] PR target/71112: Properly create lowpart of pic_offset_table_rtx with -fpie

Hi all, This ICE only occurs on big-endian ILP32 -fpie code. The expansion code generates the invalid load: (insn 6 5 7 (set (reg/f:SI 76) (unspec:SI [ (mem/u/c:SI (lo_sum:SI (nil) (symbol_ref:SI ("dbs") [flags 0x40] )) [0 S4 A8]) ]

Re: [PATCH, ARM] PR71607: New approach to arm_disable_literal_pool

On 17/11/16 10:00, Ramana Radhakrishnan wrote: > On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists) > wrote: >> Hello, >> >> This patch tackles the issue reported in PR71607. This patch takes a >> different approach for disabling the creation of literal pools.

[Patch, testsuite] Fix bogus pr31096-1.c failure for avr

Hi, This patch fixes a bogus testsuite failure (gcc.dg/pr31096-1.c) for the avr target. The dump expects constants which would only be present if the target's int size is 32 bits. Fixed by explicitly using 32 bit ints for targets with __SIZEOF_INT__ < 4. Committed to trunk as

Re: [PATCH][AArch64] Separate shrink wrapping hooks implementation

On Tue, Nov 29, 2016 at 11:32:41AM +, Kyrill Tkachov wrote: > >>+ > >>+/* Implement TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB. */ > >>+ > >>+static sbitmap > >>+aarch64_components_for_bb (basic_block bb) > >>+{ > >>+ bitmap in = DF_LIVE_IN (bb); > >>+ bitmap gen = _LIVE_BB_INFO (bb)->gen; >

[PATCH 2/4] S/390: Merge compare of compare results

With this patch EQ and NE compares on CC mode reader patterns are folded. This allows using the result of the vec_all_* and vec_any_* builtins directly in a conditional jump instruction as in the attached testcase. gcc/ChangeLog: 2016-11-29 Andreas Krebbel

Re: [RFA] Handle target with no length attributes sanely in bb-reorder.c

On Mon, Nov 28, 2016 at 10:23 PM, Jeff Law wrote: > > > I was digging into issues around the patches for 78120 when I stumbled upon > undesirable bb copying in bb-reorder.c on the m68k. > > The core issue is that the m68k does not define a length attribute and > therefore

[PATCH] Make one extra BB to prevent PHI argument clash (PR, gcov-profile/78582)

Following ICE has been reduced from bash, where a new CFG does not properly fill a newly added PHI argument. Problem is solved by adding one extra BB that precedes the original BB with the PHI. Doing so, we do not add a new PHI argument. Tests have been running. Ready to be installed after it

Re: [PATCH] Make one extra BB to prevent PHI argument clash (PR, gcov-profile/78582)

On Tue, Nov 29, 2016 at 11:46 AM, Martin Liška wrote: > Following ICE has been reduced from bash, where a new CFG does not properly > fill a newly added PHI argument. Problem is solved by adding one extra BB that > precedes the original BB with the PHI. Doing so, we do not add a

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Dear Andre, This all looks OK to me. The only comment that I have that you might deal with before committing is that some of the Boolean expressions, eg: + int caf_dereg_mode + = ((caf_mode & GFC_STRUCTURE_CAF_MODE_IN_COARRAY) != 0 + || c->attr.codimension) + ?

Re: [PATCH] combine: Tweak change_zero_ext

> 2016-11-26 Segher Boessenkool > > * combine.c (change_zero_ext): Also handle extends from a subreg > to a mode bigger than that of the operand of the subreg. This patch introduced: FAIL: gcc.target/i386/pr44578.c (internal compiler error) on i686 (or x86_64

Re: [PATCH][AArch64] Separate shrink wrapping hooks implementation

Hi James, Kyrill, On Tue, Nov 29, 2016 at 10:57:33AM +, James Greenhalgh wrote: > > +static sbitmap > > +aarch64_components_for_bb (basic_block bb) > > +{ > > + bitmap in = DF_LIVE_IN (bb); > > + bitmap gen = _LIVE_BB_INFO (bb)->gen; > > + bitmap kill = _LIVE_BB_INFO (bb)->kill; > > + > >

[PATCH] Fix x86_64 fix_debug_reg_uses (PR rtl-optimization/78575)

Hi! The x86_64 stv pass uses PUT_MODE to change REGs and MEMs in place to affect all setters and users, but that is undesirable in debug insns which are intentionally ignored during the analysis and we should keep using correct modes (TImode) instead of the new one (V1TImode). The current

Re: [v3 PATCH] Implement LWG 2534, Constrain rvalue stream operators.

On 27/11/16 20:50 +0200, Ville Voutilainen wrote: Implement LWG 2534, Constrain rvalue stream operators. * include/std/istream (__is_convertible_to_basic_istream): New. (__is_extractable): Likewise. (operator>>(basic_istream<_CharT, _Traits>&&, _Tp&&)): Turn the stream parameter

Re: Import libcilkrts Build 4467 (PR target/68945)

On 11/17/2016 06:06 AM, Rainer Orth wrote: I happened to notice that my libcilkrts SPARC port has been applied upstream. So to reach closure on this issue for the GCC 7 release, I'd like to import upstream into mainline which seems to be covered by the free-for-all clause in

Re: [PATCH] avoid calling alloca(0)

On 11/26/2016 05:52 PM, Martin Sebor wrote: On 11/25/2016 12:51 PM, Jeff Law wrote: On 11/23/2016 06:15 PM, Martin Sebor wrote: gcc_assert works only in some instances (e.g., in c-ada-spec.c:191) but not in others because some actually do make the alloca(0) call at runtime: at a minimum,

Re: [RFC PATCH] avoid printing type suffix with %E (PR c/78165)

On 11/19/2016 02:04 PM, Martin Sebor wrote: On 10/26/2016 02:46 PM, Joseph Myers wrote: On Wed, 26 Oct 2016, Martin Sebor wrote: The attached patch implements one such approach by having the pretty printer recognize the space format flag to suppress the type suffix, so "%E" still prints the

[PATCH] PR fortran/77505 -- Treat negative character length as LEN=0

This patch checks for negative character length in the array constructor, and treats it as LEN=0. A warning message is also printed if bounds checking is enabled. Bootstrapped and regression tested the patch on x86_64-linux-gnu and aarch64-linux-gnu. Index: ChangeLog

Re: Ping: Re: [patch, avr] Add flash size to device info and make wrap around default

On Tuesday 29 November 2016 10:06 PM, Denis Chertykov wrote: 2016-11-28 10:17 GMT+03:00 Pitchumani Sivanupandi : On Saturday 26 November 2016 12:11 AM, Denis Chertykov wrote: I'm sorry for delay. I have a problem with the patch: (Stripping trailing CRs

[patch part, libgcc] Add AVX-specific matmul

Hello world, the patch at https://gcc.gnu.org/ml/fortran/2016-11/msg00246.html (the one going to gcc-patches was rejected due to size of regernerated files) contains one libgcc change, which exposes the __cpu_model interface fox i386 to libgfortran. The Fortran bits are OKd, but I need an

Re: Go patch committed: Merge to gccgo branch

Now I've merged GCC trunk revision 242992 to the gccgo branch. Ian

Re: [PATCH] enable -Wformat-length for dynamically allocated buffers (pr 78245)

That said, I defer to you on how to proceed here. I'm prepared to do the work(*) but I do worry about jeopardizing the chances of this patch and the others making it into 7.0. So would it make sense to just init/fini the b_o_s framework in your pass and for builtin expansion? I think that

Fix arc builds

There's a couple unused variables in arc_handle_option. This patch removes them. Verified the arc port builds again. Installed on the trunk. Jeff commit 0177a97d002107d99f82be0861ac0052285ccc0a Author: law Date: Wed Nov 30 04:37:10 2016 +

Re: [RFA] Fix false positive out of bounds array index warning in LRA

On 11/02/2016 01:20 PM, Bernd Schmidt wrote: On 10/29/2016 06:21 PM, Jeff Law wrote: On a small number of ports, we only have 2 defined register classes. NO_REGS and ALL_REGS. Examples would include nvptx and vax. So let's look at check_and_process_move from lra-constraints.c: sclass =

RE: [PATCH] PR fortran/77505 -- Treat negative character length as LEN=0

Please excuse the messy formatting in my initial mail. Resending with proper formatting. This patch checks for negative character length in the array constructor, and treats it as LEN=0. A warning message is also printed if bounds checking is enabled. Bootstrapped and regression tested the

Re: [PATCH][AArch64] PR target/71112: Properly create lowpart of pic_offset_table_rtx with -fpie

On Tue, Nov 29, 2016 at 1:09 AM, Kyrill Tkachov wrote: > Hi all, > > This ICE only occurs on big-endian ILP32 -fpie code. The expansion code > generates the invalid load: > (insn 6 5 7 (set (reg/f:SI 76) > (unspec:SI [ > (mem/u/c:SI (lo_sum:SI

[PATCH] Fix prs 78602 & 78560 on PowerPC (vec_extract/vec_sec)

These two patches to fix PRs 78602 and 78560 fix aspects of the vector set and extract code I've been working on in the last couple of months. The two symptoms were essentially the same thing, one on vector set and the other on vector extract. The core issue was both set and extract did not

Re: [PATCH] Another debug info stv fix (PR rtl-optimization/78547)

On Tue, Nov 29, 2016 at 8:44 PM, Jakub Jelinek wrote: > Hi! > > The following testcase ICEs because DECL_RTL/DECL_INCOMING_RTL are adjusted > by the stv pass through the PUT_MODE modifications, which means that for > var-tracking.c they contain a bogus mode. > > Fixed by

Re: Remove stray '@' from install.texi (was Re: [PATCH] Delete GCJ)

On Tue, 2016-11-29 at 18:20 -0700, Sandra Loosemore wrote: > On 11/29/2016 06:10 PM, David Malcolm wrote: > > [snip] > > > > r242985 seems to have broken the build, for me at least (with > > texinfo > > 5.1): > > > > ../../src/gcc/doc/install.texi:2199: use braces to give a command > > as an

Re: [Patch 4/5] OpenACC tile clause support, Fortran front-end parts

On 11/18/2016 03:24 AM, Jakub Jelinek wrote: > On Sat, Nov 12, 2016 at 08:51:00AM -0800, Cesar Philippidis wrote: >> On 11/11/2016 02:34 AM, Jakub Jelinek wrote: >>> On Thu, Nov 10, 2016 at 06:46:46PM +0800, Chung-Lin Tang wrote: >> >> And here's the patch. > > The patch doesn't look like OpenACC

Re: Remove stray '@' from install.texi (was Re: [PATCH] Delete GCJ)

On 11/29/2016 06:10 PM, David Malcolm wrote: [snip] r242985 seems to have broken the build, for me at least (with texinfo 5.1): ../../src/gcc/doc/install.texi:2199: use braces to give a command as an argument to @= make[2]: *** [doc/gccinstall.info] Error 1 The attached patch fixes it. OK

Re: [PATCH] Fix format_integer (PR tree-optimization/78586)

On 11/29/2016 12:48 PM, Jakub Jelinek wrote: Hi! As mentioned in the PR, the LSHIFT_EXPR computation of values that will need longest or shortest string is both incorrect (it shifts integer_one_node left, so for precisions above precision of integer it returns 0 (not to mention that it is

Remove stray '@' from install.texi (was Re: [PATCH] Delete GCJ)

On Tue, 2016-11-29 at 14:23 -0700, Jeff Law wrote: > On 11/21/2016 04:23 PM, Matthias Klose wrote: > > On 21.11.2016 18:16, Rainer Orth wrote: > > > Hi Matthias, > > > > > > > ahh, didn't see that :-/ Now fixed, is this clearer now? > > > > > > > > The options

[committed] substring locations and # line directives (PR preprocessor/78569)

The ICE in PR preprocessor/78569 appears to be due to an attempt to generate substring locations in a .i file where the underlying .c file has changed since the .i file was generated. This can't work, so it seems safest for the on-demand substring locations to be unavailable for such files,

Re: [PING] [PATCH] Fix PR31096

Hi Jeff, >> I believe Richi asked for a small change after which you can consider >> the patch approved: Yeah. Thanks for all the comments and reviews. Patch committed after the modification as:- https://gcc.gnu.org/ml/gcc-cvs/2016-11/msg01019.html Thanks, Naveen

Re: [PATCH] Support nested functions (PR sanitize/78541).

On 11/29/2016 03:44 AM, Martin Liška wrote: Currently we an assert that prevents proper use-after-scope sanitization in nested functions. With the attached patch, we are able to do so. I'm adding 2 test-cases, first one is the ICE reported in PR and the second one tests proper report of

libgo patch committed: Some fixes for c-archive/c-shared mode

This patch to libgo fixes a couple of problems that arise when building Go code into an archive or shared library that is linked into a C program. In archive mode, initsig is called before the memory allocator has been initialized. The code was doing a memory allocation because of the call to

Re: [PATCH] improve folding of expressions that move a single bit around

On 29/11/2016 11:16, Richard Biener wrote: >>> >> (bit_and >>> >> (if (shift > 0) >>> >>(lshift (convert @0) { build_int_cst (integer_type_node, shift); }) >>> >>(convert (rshift @0 { build_int_cst (integer_type_node, -shift); }))) >>> >> @3) >>> >> >>> >> What do you think? >> > >>

Re: [Patch 2/5] OpenACC tile clause support, omp-low parts

On Tue, Nov 29, 2016 at 08:23:45PM +0800, Chung-Lin Tang wrote: > Adjusted and re-tested using the way you advised, attached updated patch. Ok, thanks. Jakub

Re: [AArch64][ARM][GCC][PATCHv2 3/3] Add tests for missing Poly64_t intrinsics to GCC

On 29 November 2016 at 11:12, Christophe Lyon wrote: > Hi Tamar, > > > On 29 November 2016 at 10:50, Tamar Christina wrote: >> Hi All, >> >> The new patch contains the proper types for the intrinsics that should be >> returning uint64x1 >>

Re: [AArch64][ARM][GCC][PATCHv2 3/3] Add tests for missing Poly64_t intrinsics to GCC

On 29/11/16 09:50, Tamar Christina wrote: Hi All, The new patch contains the proper types for the intrinsics that should be returning uint64x1 and has the rest of the comments by Christophe in them. Ok with an appropriate ChangeLog entry. Thanks, Kyrill Kind Regards, Tamar

Re: [PATCH] [ARC] Fix compact casesi option.

* Claudiu Zissulescu [2016-11-29 13:43:21 +0100]: > Fixing casesi option for ARCv2 cpus. > > Ok to apply? > Claudiu Approved. Thanks, Andrew > > gcc/ > 2016-11-28 Claudiu Zissulescu > > * config/arc/arc.c

RE: [PATCH 3/4] [ARC] Refurbish mul64 support.

Ping. > -Original Message- > From: Claudiu Zissulescu > Sent: Wednesday, November 16, 2016 11:18 AM > To: gcc-patches@gcc.gnu.org > Cc: Claudiu Zissulescu ; > francois.bed...@synopsys.com; andrew.burg...@embecosm.com > Subject: [PATCH 3/4] [ARC] Refurbish mul64

Re: [Patch 3/5] OpenACC tile clause support, C/C++ front-end parts

On 2016/11/18 7:23 PM, Jakub Jelinek wrote: > On Thu, Nov 17, 2016 at 05:34:34PM +0800, Chung-Lin Tang wrote: >> Updated C/C++ front-end patches, adjusted as reviewed. > > Jason is right, finish_omp_clauses will verify the tile operands > when !processing_template_decl are non-negative host

RE: [PATCH 2/4] [ARC] Cleanup implementation.

Ping. > -Original Message- > From: Claudiu Zissulescu > Sent: Wednesday, November 16, 2016 11:18 AM > To: gcc-patches@gcc.gnu.org > Cc: Claudiu Zissulescu ; > francois.bed...@synopsys.com; andrew.burg...@embecosm.com > Subject: [PATCH 2/4] [ARC] Cleanup

[PATCH] [ARC] [COMMITTED] Fix typo in arc.opt

Committed as obvious. gcc/ 2016-11-29 Claudiu Zissulescu * config/arc/arc.opt (marclinux): Fix typo. (marclinux_prof): Likewise. --- gcc/ChangeLog | 5 + gcc/config/arc/arc.opt | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff

Re: [Patch 3/5] OpenACC tile clause support, C/C++ front-end parts

On Tue, Nov 29, 2016 at 08:27:04PM +0800, Chung-Lin Tang wrote: > On 2016/11/18 7:23 PM, Jakub Jelinek wrote: > > On Thu, Nov 17, 2016 at 05:34:34PM +0800, Chung-Lin Tang wrote: > >> Updated C/C++ front-end patches, adjusted as reviewed. > > > > Jason is right, finish_omp_clauses will verify the

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