Re: New Port for RISC-V v2

On Thu, 2 Feb 2017, Palmer Dabbelt wrote: > Additionally, here's a diff against wwwdocs. This is really just to check > this > is all I'm supposed to do, I can submit a proper patch via the mailing list (I > just don't know how to use CVS, sorry). Other parts of the wwwdocs changes

Re: [PATCH 2/6] RISC-V Port: gcc

On Thu, 2 Feb 2017, Palmer Dabbelt wrote: > +@table @gcctabopt > +@item -mbranch-cost=@var{N} > +@opindex mbranch-cost > +Set the cost of branches to roughly N instructions. @var{n} (both places; Texinfo may convert to uppercase depending on the output format). > +@item -mplt > +@itemx

Re: [PATCH][libgcc, fuchsia]

Ping? On 1/17/17 10:40 AM, Josh Conner wrote: The attached patch adds fuchsia support to libgcc. OK for trunk? Thanks - Josh 2017-01-17 Joshua Conner * config/arm/unwind-arm.h (_Unwind_decode_typeinfo_ptr): Use pc-relative indirect handling for fuchsia.

[PATCH] diagnostics: fix end-points of ranges within macros (PR c++/79300)

PR c++/79300 identifies an issue in which diagnostics_show_locus prints the wrong end-point for a range within a macro: assert ((p + val_size) - buf == encoded_len); ~^~~~ as opposed to: assert ((p + val_size) - buf == encoded_len);

Re: [Patch][ARM,AArch64] more poly64 intrinsics and tests

Hello, Is it too late for this patch? On 11 January 2017 at 11:13, Christophe Lyon wrote: > Ping? > > James, I'm not sure whether your comment was a request for a new > version of my patch or just FYI? > > > On 3 January 2017 at 16:47, Christophe Lyon

Re: [PATCH doc] clean up -fdump-tree- options (PR 32003)

On 02/01/2017 10:28 PM, Sandra Loosemore wrote: On 02/01/2017 08:26 PM, Martin Sebor wrote: On 02/01/2017 08:06 PM, Sandra Loosemore wrote: On 02/01/2017 06:57 PM, Martin Sebor wrote: As discussed in bug 32003 - Undocumented -fdump-tree options, rather than duplicating the same boiler-plate

Re: [PATCH] Add support for Fuchsia (OS)

On 2/1/17 3:29 PM, Gerald Pfeifer wrote: On Tue, 17 Jan 2017, Josh Conner via gcc-patches wrote: Attached is my recommended patch for changes to the web docs describing Fuchsia support. Please let me know if there's anything else I can do. This looks fine (just remove the blank before

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

So far I haven't done full bootstrap/regtest on this, just make check-gcc -j16 -k RUNTESTFLAGS=tree-ssa.exp which revealed the need for gcc.dg/tree-ssa/builtin-sprintf-warn-1.c hunk below. Here it is turned into a short wrong-code without the patch below: volatile int a; int main (void) { int

Re: [wwwdocs] Add various new warnings for GCC 7

Hi Marek, a couple of comments (and minor changes) below. Once you have made those, this is okay to commit. Quite some stuff going into GCC 7! On Fri, 27 Jan 2017, Marek Polacek wrote: > Index: changes.html > === > +New

Re: Fix profile updating in ifcombine

On Thu, Feb 2, 2017 at 12:29 PM, Jan Hubicka wrote: > Hi, > this patches fixes profile updating in the ifcombine. This is not hard to do > and ifcombine is #2 profile update offender out of tree passes (#1 is the > vectorizer). > > I think this counts as a regression, becuase one

Re: New Port for RISC-V v2

Hi Palmer, On Thu, 2 Feb 2017, Palmer Dabbelt wrote: > Additionally, here's a diff against wwwdocs. This is really just to > check this is all I'm supposed to do, I can submit a proper patch via > the mailing list (I just don't know how to use CVS, sorry). > > Index:

Fix profile updating in ifcombine

Hi, this patches fixes profile updating in the ifcombine. This is not hard to do and ifcombine is #2 profile update offender out of tree passes (#1 is the vectorizer). I think this counts as a regression, becuase one can trigger arbitrarily bad profile after ifconversion and defnitly construct a

[PATCH] Improve aarch64 conditional compare usage

This patch extends conditional compare code generation for aarch64.  Right now if there is an AND or OR of two compares, GCC will generate a compare followed by a conditional compare.  But if you have a _Bool variable on one side (or both sides) instead of a comparision than ccmp.c does not

Re: [PATCH] relax -Wformat-overflow for precision ranges (PR 79275)

On 02/02/2017 11:09 AM, Marek Polacek wrote: It seems to me that we should be able to write these expressions the way that's natural to us and at the same time be able to comfortably read them both ways. As always, I fully support consistency and following a coding style where it matters. I

[PATCH rs6000 testsuite] Fix PR79158

The testcase has been failing on BE because the compiler is simply storing the value straight from the GPRs. The following patch fixes the issue by using 'r' in an expression which forces the value back to a VSR. Verified the testcase now passes for powerpc64 and still passes for powerpc64le.

[RFC] Attacking 79095 -- a new approach

This is an RFC on the updated work for fix 79095. I've got to work on the testcases tomorrow, but wanted to give folks the option for early feedback. There's been a number of ratholes and restarts, but I think where things are going now is significantly better than prior work. The

Re: [PATCH][wwwdocs] Mention native CPU detection in aarch64 notes for GCC 6

On Tue, 26 May 2015, James Greenhalgh wrote: > I think I remember Gerald saying in the past that it is within the > remit of port maintainers/reviewers to OK these, but be ready to > revert or update it if I am wrong! You were (and are) very much quite right, James. :-) (And given that Gerald

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

Hi! Note, the second patch I've posted passed bootstrap/regtest on both x86_64-linux and i686-linux. On Thu, Feb 02, 2017 at 09:58:06AM -0700, Martin Sebor wrote: > > int > > main (void) > > { > > int i; > > char buf[64]; > > if (__builtin_sprintf (buf, "%#hho", a) > 1) > >

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

- T (2, "%#hho",a); /* { dg-warning "nul past the end" } */ - T (2, "%#hhx",a); /* { dg-warning ".%#hhx. directive writing between 3 and . bytes into a region of size 2" } */ + T (2, "%#hho",a); + T (2, "%#hhx",a); On reflection, this isn't quite the

RE: [PATCH] MIPS: Fix mode mismatch error between Loongson builtin arguments and insn operands.

Toma Tabacu writes: > > From: Matthew Fortune > > > +/* The third argument needs to be in SImode in order to succesfully > > > match > > > + the operand from the insn definition. */ > > > > Please refer to operand here not argument as it is the second argument >

Re: [patch 79279] combine/simplify_set issue

On Thu, Feb 02, 2017 at 11:27:12AM +0100, Aurelien Buhrig wrote: > > Hrm, maybe you can show the RTL before and after this transform? > RTL before combine: > (set (reg:SI 31 (lshiftt:SI (reg:SI 29) (const_int 16 > (set (reg:HI 1 "r1") (reg:HI 25)) > (set (reg:HI 0 "r0") (subreg:HI (reg:SI 31)

[wwwdocs] Mention GIMPLE and RTL frontends in changes.html

This patch to the website moves the section about the selftest suite to the bottom of "Other significant improvements" section, and rewrites it to also cover the GIMPLE and RTL "frontends", and tries to couch these changes in terms of the benefit to the end-user (i.e. a more reliable compiler).

Re: [PATCH v3][PR lto/79061] Fix LTO plus ASAN fails with "AddressSanitizer: initialization-order-fiasco".

On Thu, Feb 02, 2017 at 06:02:07PM +0300, Maxim Ostapenko wrote: > Hi, > > PR lto/79061 actually affects gcc-{5, 6}-branch too > Is it OK to apply following patch on branches? > > -Maxim > gcc/ChangeLog: > > 2017-02-02 Maxim Ostapenko > > PR lto/79061 >

Re: [PATCH] Fix bool vs. unsigned:1 vectorization (PR tree-optimization/79284)

On Thu, Feb 02, 2017 at 10:12:32AM -0700, Jeff Law wrote: > On 02/01/2017 03:45 AM, Richard Biener wrote: > > > > I agree. But this means we should look for a vectorizer-local fix > > without a new global predicate then (there seem to be subtly different > > needs and coming up with good names

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On Thu, Feb 02, 2017 at 12:59:11PM -0700, Martin Sebor wrote: > > > - T (2, "%#hho",a); /* { dg-warning "nul past the end" } */ > > > - T (2, "%#hhx",a); /* { dg-warning ".%#hhx. directive > > > writing between 3 and . bytes into a region of size 2" } */ > > > + T (2,

[wwwdocs] gcc-6/changes.html: use command-line option

...instead of command line option. Spotted while looking for something else, but since it was easy to fix...applied. Gerald Index: gcc-6/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v retrieving revision

[wwwdocs] update about.html (was: Skeleton for GCC 6 release notes)

On Fri, 4 Sep 2015, Sebastian Huber wrote: >> is it possible checking outhttps://gcc.gnu.org/about.html is all >> you are looking for, or am I thinking to simple?:-) > I searched the web and found this page before. Then I clicked at "browse the > repository

Re: [PATCH] Fix ICEs with power8 fixuns_truncdi2 patterns (PR target/79197)

On Thu, Feb 02, 2017 at 08:51:19AM +0100, Jakub Jelinek wrote: > Thanks, though at this point I think the > http://gcc.gnu.org/ml/gcc-patches/2017-01/msg02390.html > patch is better. With the earliest patch (the one below) for -mvsx > -mno-popcntd (or whatever -mcpu= implies that) there is no

[PATCH] Make gcc.dg/tree-ssa/pr71078-3.c more robust

On one machine I see gcc.dg/tree-ssa/pr71078-3.c FAILing with -m32 because libc provides extern __inline __attribute__ ((__always_inline__)) __attribute__ ((__gnu_inline__)) double __attribute__ ((__nothrow__ , __leaf__)) fabs (double __x) { return __builtin_fabs (__x); } which makes CSE

[PATCH 3/6] RISC-V Port: libgcc

--- libgcc/config.host | 12 + libgcc/config/riscv/atomic.c | 111 + libgcc/config/riscv/crti.S | 1 + libgcc/config/riscv/crtn.S | 1 + libgcc/config/riscv/div.S | 146 libgcc/config/riscv/linux-unwind.h | 89 +++

[PATCH 4/6] RISC-V Port: libatomic

--- libatomic/configure.tgt | 1 + 1 file changed, 1 insertion(+) diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt index 6d77c94..b8af3ab 100644 --- a/libatomic/configure.tgt +++ b/libatomic/configure.tgt @@ -37,6 +37,7 @@ case "${target_cpu}" in ARCH=alpha ;;

New Port for RISC-V v2

Thanks to everyone who reviewed our original patch set. I've tried to CC everyone who provided a review, sorry if I missed anyone! Andrew, Kito and I believe that we've addressed almost all of the feedback from the reviews of our v1 patch set. Since it's been a while we wanted to get a v2 patch

Re: [PATCH] Tree-level fix for PR 69526

I skimmed through the code to see where transformation like (a - 1) -> (a + UINT_MAX) are performed. It seems there are only two places, match.pd (/* A - B -> A + (-B) if B is easily negatable. */) and fold-const.c. In order to be able to reliably know whether to zero-extend or to sign-extend

[Committed] S/390: Rename __S390_VX__ to __VX__.

gcc/ChangeLog: 2017-02-02 Andreas Krebbel * config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Rename __S390_VX__ to __VX__. gcc/testsuite/ChangeLog: 2017-02-02 Andreas Krebbel *

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On Thu, Feb 02, 2017 at 08:37:07AM +0100, Jakub Jelinek wrote: > > + if (res.range.max < res.range.min) > > + { > > + unsigned HOST_WIDE_INT tmp = res.range.max; > > + res.range.max = res.range.min; > > + res.range.min = tmp; > > These 3 lines are >

Re: Patch ping

On Thu, 2 Feb 2017, Jakub Jelinek wrote: > Hi! > > I'd like to ping the > http://gcc.gnu.org/ml/gcc-patches/2017-01/msg02026.html > patch, asan testsuite fixes not to use explicit -O* options > in testsuite that iterates over all -O*, but instead dg-skip-if > etc. > > As discussed later in the

Re: [PATCH] Fix ICEs with power8 fixuns_truncdi2 patterns (PR target/79197)

On Thu, Feb 02, 2017 at 02:47:12AM -0600, Segher Boessenkool wrote: > On Thu, Feb 02, 2017 at 08:51:19AM +0100, Jakub Jelinek wrote: > > Thanks, though at this point I think the > > http://gcc.gnu.org/ml/gcc-patches/2017-01/msg02390.html > > patch is better. With the earliest patch (the one

Re: [patch 79279] combine/simplify_set issue

Hi Segher, This patch fixes a combiner bug in simplify_set which calls CANNOT_CHANGE_MODE_CLASS with wrong mode params. It occurs when trying to simplify paradoxical subregs of hw regs (whose natural mode is lower than a word). In fact, changing from (set x:m1

Re: [PATCH] Fix PR79278, amend ADJUST_FIELD_ALIGN interface

On Wed, 1 Feb 2017, Segher Boessenkool wrote: > On Wed, Feb 01, 2017 at 03:53:09PM -0600, Segher Boessenkool wrote: > > On Wed, Feb 01, 2017 at 11:59:10AM +0100, Richard Biener wrote: > > > Wasn't successful in making a cross to ppc64-linux build its libobjc. > > > > I'll do a native build.

Re: PR79286, ira combine_and_move_insns in loops

Revised patch that cures the lra related -m32 -Os regression too. The code that I'm patching here is changing a REG_EQUAL note to REG_EQUIV, ie. asserting that the value of the reg is always the value set by the current instruction. Which is not always true when the insn is in a loop and the use

[PATCH 1/6] RISC-V Port: gcc/config/riscv/riscv.c

--- gcc/config/riscv/riscv.c | 4138 ++ 1 file changed, 4138 insertions(+) create mode 100644 gcc/config/riscv/riscv.c diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c new file mode 100644 index 000..834651f --- /dev/null +++

[PATCH 6/6] RISC-V Port: contrib

--- contrib/config-list.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/contrib/config-list.mk b/contrib/config-list.mk index 9833480..0edc8a4 100644 --- a/contrib/config-list.mk +++ b/contrib/config-list.mk @@ -79,6 +79,7 @@ LIST = aarch64-elf aarch64-linux-gnu aarch64-rtems \

Re: [PATCH, wwwdocs/ARM] Mention new rmprofile value for --with-multilib-list

Looks good, thanks Gerald! Best regards, Thomas On 01/02/17 19:23, Gerald Pfeifer wrote: On Mon, 30 Jan 2017, Thomas Preudhomme wrote: ARM backend now support a new set of multilib libraries enabled with --with-multilib-list=rmprofile [1]. This patch documents it in the changes for GCC 7.

[PATCH 5/6] RISC-V Port: gcc/testsuite

From: Kito Cheng --- gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C| 2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 +++ gcc/testsuite/gcc.dg/20020312-2.c | 2 ++ gcc/testsuite/gcc.dg/builtin-apply2.c

Re: [PATCH][C++] Improve memory use for PR12245

On Wed, 1 Feb 2017, Richard Biener wrote: > On Wed, 1 Feb 2017, Jakub Jelinek wrote: > > > On Wed, Feb 01, 2017 at 02:14:20PM +0100, Richard Biener wrote: > > > > > > Looks like we cache the answer to maybe_constant_value (INTEGER_CST) > > > which results in (-fmem-report): > > > > > >

Patch ping

Hi! I'd like to ping the http://gcc.gnu.org/ml/gcc-patches/2017-01/msg02026.html patch, asan testsuite fixes not to use explicit -O* options in testsuite that iterates over all -O*, but instead dg-skip-if etc. As discussed later in the thread, either as is for pr69276.C: -/* {

Re: [wwwdocs] Mention GIMPLE and RTL frontends in changes.html

On Thu, 2 Feb 2017, David Malcolm wrote: > This patch to the website moves the section about the selftest suite to > the bottom of "Other significant improvements" section, and rewrites it > to also cover the GIMPLE and RTL "frontends", and tries to couch these > changes in terms of the benefit to

[wwwdocs] codingconventions.html - use "testsuite"

So, while checking this page for our preferred way to write "testsuite", I noticed it has a case of "test suite" itself. ;-) Fixed thusly. Gerald Index: codingconventions.html === RCS file:

Re: New Port for RISC-V v2

On Thu, 2 Feb 2017, Palmer Dabbelt wrote: > OK, thanks. As far as I know, I don't have write access to anything > yet. Should I request it from overse...@sourceware.org? I already have > binutils git access. Yes, and you can name me as your sponsor. Gerald

[wwwdocs] Consistently use "testsuite"

Of course, an innocent grep after providing this input in a review of a patch by David revealed that we have a number more cases where we used "test suite" instead of "testsuite". This fixes a number of those. Applied. Gerald Index: contributewhy.html

Re: [PATCH 2/6] RISC-V Port: gcc

On Thu, 02 Feb 2017 10:08:27 PST (-0800), jos...@codesourcery.com wrote: > On Thu, 2 Feb 2017, Palmer Dabbelt wrote: > >> +@table @gcctabopt >> +@item -mbranch-cost=@var{N} >> +@opindex mbranch-cost >> +Set the cost of branches to roughly N instructions. > > @var{n} (both places; Texinfo may

Re: New Port for RISC-V v2

On Thu, 02 Feb 2017 09:58:32 PST (-0800), jos...@codesourcery.com wrote: > On Thu, 2 Feb 2017, Palmer Dabbelt wrote: > >> Additionally, here's a diff against wwwdocs. This is really just to check >> this >> is all I'm supposed to do, I can submit a proper patch via the mailing list >> (I >>

Re: [PATCH 2/6] RISC-V Port: gcc

On Thu, 02 Feb 2017 11:17:42 PST (-0800), mer...@debian.org wrote: > On Thu, Feb 02, 2017 at 01:05:13AM -0800, Palmer Dabbelt wrote: > >> diff --git a/gcc/doc/contrib.texi b/gcc/doc/contrib.texi >> index 5554d5f..5b14fc4 100644 >> --- a/gcc/doc/contrib.texi >> +++ b/gcc/doc/contrib.texi >> @@

Re: New Port for RISC-V v2

On Thu, 02 Feb 2017 13:07:25 PST (-0800), ger...@pfeifer.com wrote: > Hi Palmer, > > On Thu, 2 Feb 2017, Palmer Dabbelt wrote: >> Additionally, here's a diff against wwwdocs. This is really just to >> check this is all I'm supposed to do, I can submit a proper patch via >> the mailing list (I

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On 02/02/2017 05:31 PM, Martin Sebor wrote: - T (2, "%#hho",a); /* { dg-warning "nul past the end" } */ - T (2, "%#hhx",a); /* { dg-warning ".%#hhx. directive writing between 3 and . bytes into a region of size 2" } */ + T (2, "%#hho",a); + T (2, "%#hhx",

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On 02/02/2017 09:58 AM, Martin Sebor wrote: Otherwise all the tests succeeded, though looking e.g. at the diff between builtin-sprintf-warn-1.c diagnostics with your patch and with the patch below instead, there are also differences like: -builtin-sprintf-warn-1.c:1119:3: note: using the range

[Committed] S/390: Add missing comments listing mnemonics.

These were useful in the past but are currently lacking on a couple of patterns. Fixed with this patch. gcc/ChangeLog: 2017-02-02 Andreas Krebbel * config/s390/s390.md: Add missing comments with the expanded mnemonics. *

[Committed] S/390: Remove unused expanders from vx-builtins.md

These expanders are currently not used. The vecintrin.h header file expands e.g. vec_ceil directly to the vfidb low-level builtin. gcc/ChangeLog: 2017-02-02 Andreas Krebbel * config/s390/vx-builtins.md ("vec_ceil", "vec_floor") ("vec_trunc",

Re: Enable jump threading on paths meeting hot paths

Hi, it seems I forgot to send the updated patch. Here it is. We now dump info like: Checking profitability of path: 5 (16 insns) 3 (2 insns) 34 (2 insns) 33 (4 insns) 32 (1 insns) 10 (3 insns) 6 Control statement insns: 16 Overall: 12 insns Registering FSM jump thread: (6, 10) incoming

[PATCH][wwwdocs] Mention -march=armv8.3-a -msign-return-address= for GCC 7

Hi all, This patch adds a short entry for the -march=armv8.3-a and -msign-return-address= options in GCC 7 to the "AArch64" section. Eyeballed the result in Firefox. Ok to commit? Thanks, Jiong Index: gcc-7/changes.html === RCS

Re: [RFC] Bug lto/78140

On Thu, Feb 2, 2017 at 1:52 PM, Richard Biener wrote: > On Thu, Feb 2, 2017 at 1:48 PM, Jan Hubicka wrote: >>> >>> 2017-02-02 Kugan Vivekanandarajah >>> >>> * ipa-cp.c (ipcp_store_bits_results): Construct bits vector. >>>

[PATCH] IPA: enhance dump output

Following patch was helpful to deal with the PR. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be installed or is it stage1 material? Martin >From dc02af2bbbe67d9d1fb6119b606b3c1fea726062 Mon Sep 17 00:00:00 2001 From: marxin Date: Tue, 24

Re: libgomp: Normalize the names of a few functions of the libgomp plugin API (was: libgomp: Provide prototypes for functions implemented by libgomp plugins)

On Thu, Feb 02, 2017 at 01:22:37PM +0100, Thomas Schwinge wrote: > Hi! > > On Tue, 31 Jan 2017 15:44:46 +0100, I wrote: > > --- libgomp/libgomp.h > > +++ libgomp/libgomp.h > > @@ -882,31 +882,35 @@ typedef struct acc_dispatch_t > > > + __typeof (GOMP_OFFLOAD_openacc_parallel) *exec_func; > >

Re: [patch] Fix PR middle-end/78468

> Here's a revised version along these lines, OK for mainline after testing? > > > PR middle-end/78468 > * emit-rtl.c (init_emit): Add ??? comment for problematic alignment > settings of the virtual registers. > > Revert again > 2016-08-23 Dominik Vogt

Re: [PATCH] [AArch64] Implement popcount pattern

On Thu, Feb 02, 2017 at 04:03:42AM +, Hurugalawadi, Naveen wrote: > Hi James and Kyrill, > > Thanks for the review and comments on the patch. > > >> On ILP32 systems this would still use the SImode patterns, > >> so I suggest you use __builtin_popcountll and > >> an unsigned long long

Re: [RFC] Bug lto/78140

On Thu, Feb 2, 2017 at 1:48 PM, Jan Hubicka wrote: >> >> 2017-02-02 Kugan Vivekanandarajah >> >> * ipa-cp.c (ipcp_store_bits_results): Construct bits vector. >> (ipcp_store_vr_results): Constrict m_vr vector. >> * ipa-prop.c

Re: [PATCH] Fix __atomic to not implement atomic loads with CAS.

Hi! On Mon, 30 Jan 2017 19:54:00 +0100, Torvald Riegel wrote: > This patch fixes the __atomic builtins to not implement supposedly > lock-free atomic loads based on just a compare-and-swap operation. [...] > I've tested this on an x86_64-linux bootstrap build and see no >

libgomp: Normalize the names of a few functions of the libgomp plugin API (was: libgomp: Provide prototypes for functions implemented by libgomp plugins)

Hi! On Tue, 31 Jan 2017 15:44:46 +0100, I wrote: > --- libgomp/libgomp.h > +++ libgomp/libgomp.h > @@ -882,31 +882,35 @@ typedef struct acc_dispatch_t > + __typeof (GOMP_OFFLOAD_openacc_parallel) *exec_func; As can be seen here, for a handful of functions, the name of the implementation in the

Re: [RFC] Bug lto/78140

> > 2017-02-02 Kugan Vivekanandarajah > > * ipa-cp.c (ipcp_store_bits_results): Construct bits vector. > (ipcp_store_vr_results): Constrict m_vr vector. > * ipa-prop.c (ipa_node_params_t::remove): Set transaction summary to > null. >

Re: [RFC] Bug lto/78140

On 02/02/2017 02:36 AM, kugan wrote: > This is due to an existing issue. That is, in ipa_node_params_t::remove, m_vr > and bits vectors are not set to null such that the gc can claim it. I've just sent patch that should remove such need as ~ipa_node_params_t should be called just once:

Re: [PATCH] Make multiple_target.c aware of LTO (PR lto/66295)

Ok, I spent more time with understanding how that pass works and I believe it can be significantly simplified. I guess target_clones are very close to 'target' attribute that is handled by C++ FE. It creates cgraph_function_version_info and function dispatcher is generated. I hope doing the

Re: [PATCH] [AArch64] Enable AES and cmp_branch fusion for Thunderx2t99

On Thu, Feb 02, 2017 at 05:03:13AM +, Hurugalawadi, Naveen wrote: > Hi Kyrill, > > Thanks for the review and comments. > > >> but there are a couple of issues with the ChangeLog > > 2017-02-02 Naveen H.S > > * config/aarch64/aarch64.c

[PATCH] Fix memory leaks in IPA CP (PR ipa/79337).

Hello. As mentioned in the PR, there is memory leak that is caused by fact, that ipa_node_params_t does release memory just in ipa_node_params_t::remove. That's wrong because the callback is called just when cgraph_removal_hook is triggered. Thus the proper implementation is to move it do

Re: [PATCH][wwwdocs] Mention -march=armv8.3-a -msign-return-address= for GCC 7

On Thu, 2 Feb 2017, Jiong Wang wrote: This patch adds a short entry for the -march=armv8.3-a and -msign-return-address= options in GCC 7 to the "AArch64" section. Thanks, Jiong. Index: gcc-7/changes.html === + The

[PATCH] assume arrays at end of structs are unbounded (PR 79352)

Bug 79352 points out that the gimple-ssa-printf pass doesn't allow for an array at the end of a struct to be treated as a poor man's flexible array member and hold a string that's longer than the upper bound of the array. Rather, the pass assumes that the string's length must at most as long as

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On 02/02/2017 04:23 PM, Jakub Jelinek wrote: On Thu, Feb 02, 2017 at 12:59:11PM -0700, Martin Sebor wrote: - T (2, "%#hho",a); /* { dg-warning "nul past the end" } */ - T (2, "%#hhx",a); /* { dg-warning ".%#hhx. directive writing between 3 and . bytes into a region of

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On Thu, Feb 02, 2017 at 05:31:19PM -0700, Martin Sebor wrote: > index 9e099f0..84dd3671 100644 > --- a/gcc/gimple-ssa-sprintf.c > +++ b/gcc/gimple-ssa-sprintf.c > @@ -1242,6 +1242,10 @@ format_integer (const directive , tree arg) > of the format string by returning [-1, -1]. */ >

Re: [PATCH rs6000 testsuite] Fix PR79158

On Thu, Feb 02, 2017 at 02:09:55PM -0600, Pat Haugen wrote: > The testcase has been failing on BE because the compiler is simply storing > the value straight from the GPRs. The following patch fixes the issue by > using 'r' in an expression which forces the value back to a VSR. Verified the >

Re: [doc] extend.texi - "lock critical sections"?

On Wed, Feb 01, 2017 at 10:44:10PM +0100, Gerald Pfeifer wrote: > Hi Andi, or Uros, > > I am not sure, but got a pointer off-list. Is the patch below > appropriate, or is the term "lock critical section" a special > one for x86? Hi Gerald, The patch is ok. Lock critical region isn't a special

Re: [PATCH] [AArch64] Implement popcount pattern

On Thu, Feb 2, 2017 at 3:55 AM, James Greenhalgh wrote: > On Thu, Feb 02, 2017 at 04:03:42AM +, Hurugalawadi, Naveen wrote: >> Hi James and Kyrill, >> >> Thanks for the review and comments on the patch. >> >> >> On ILP32 systems this would still use the SImode

Re: libgomp: Normalize the names of a few functions of the libgomp plugin API

Hi! On Thu, 2 Feb 2017 13:27:11 +0100, Jakub Jelinek wrote: > On Thu, Feb 02, 2017 at 01:22:37PM +0100, Thomas Schwinge wrote: > > On Tue, 31 Jan 2017 15:44:46 +0100, I wrote: > > > --- libgomp/libgomp.h > > > +++ libgomp/libgomp.h > > > @@ -882,31 +882,35 @@ typedef struct

Re: Enable jump threading on paths meeting hot paths

On Thu, Feb 2, 2017 at 2:49 PM, Jan Hubicka wrote: > Hi, > it seems I forgot to send the updated patch. Here it is. > We now dump info like: > Checking profitability of path: 5 (16 insns) 3 (2 insns) 34 (2 insns) 33 (4 > insns) 32 (1 insns) 10 (3 insns) 6 > Control statement

Re: [PATCH] Fix __atomic to not implement atomic loads with CAS.

On Thu, Feb 02, 2017 at 02:48:42PM +, Ramana Radhakrishnan wrote: > On 30/01/17 18:54, Torvald Riegel wrote: > > This patch fixes the __atomic builtins to not implement supposedly > > lock-free atomic loads based on just a compare-and-swap operation. > > > > If there is no hardware-backed

Re: [PATCH v3][PR lto/79061] Fix LTO plus ASAN fails with "AddressSanitizer: initialization-order-fiasco".

Hi, PR lto/79061 actually affects gcc-{5, 6}-branch too Is it OK to apply following patch on branches? -Maxim gcc/ChangeLog: 2017-02-02 Maxim Ostapenko PR lto/79061 * asan.c (asan_add_global): Force has_dynamic_init to zero in LTO mode. diff --git a/gcc/asan.c

Re: [PATCH][wwwdocs] Mention -march=armv8.3-a -msign-return-address= for GCC 7

On Thu, 2 Feb 2017, Jiong Wang wrote: Please review, thanks. Looks good to me, thank you! Gerald

Re: [PATCH] use zero as the lower bound for a signed-unsigned range (PR 79327)

On Thu, Feb 02, 2017 at 10:52:18AM +0100, Jakub Jelinek wrote: > That said, as I've said in the PR and earlier in December on gcc-patches, > the way format_integer is structured is not really maintainable, has > very different code paths for arguments with known ranges and without them >

Re: [PATCH v3][AArch64] Fix symbol offset limit

ping From: Wilco Dijkstra Sent: 17 January 2017 15:14 To: Richard Earnshaw; GCC Patches; James Greenhalgh Cc: nd Subject: Re: [PATCH v3][AArch64] Fix symbol offset limit   Here is v3 of the patch - tree_fits_uhwi_p was necessary to ensure the size of a declaration is an integer. So the

Re: Enable jump threading on paths meeting hot paths

> > + if (!contains_hot_bb && speed_p && j < path_length - 1) > > j < path_length - 1 is already checked above? > > Otherwise looks ok. If it does fix the regression - does it? Thanks, yes it fixes the regression. Honza

Re: [PATCH][ARM] Remove movdi_vfp_cortexa8

ping From: Wilco Dijkstra Sent: 29 November 2016 11:05 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Remove movdi_vfp_cortexa8   Merge the movdi_vfp_cortexa8 pattern into movdi_vfp and remove it to avoid unnecessary duplication and repeating bugs like PR78439 due to changes being applied

Re: [gomp4] optimize GOMP_MAP_TO_PSET

On 01/30/2017 02:26 AM, Thomas Schwinge wrote: > ... also there is some bug somewhere; I see: > > PASS: libgomp.fortran/examples-4/async_target-2.f90 -O0 (test for > excess errors) > [-PASS:-]{+FAIL:+} libgomp.fortran/examples-4/async_target-2.f90 -O0 > execution test > PASS:

Re: [PATCH] Fix __atomic to not implement atomic loads with CAS.

On Thu, 2017-02-02 at 14:48 +, Ramana Radhakrishnan wrote: > On 30/01/17 18:54, Torvald Riegel wrote: > > This patch fixes the __atomic builtins to not implement supposedly > > lock-free atomic loads based on just a compare-and-swap operation. > > > > If there is no hardware-backed atomic load

[PATCH] Fix memory leaks in gimple-ssa-sprintf.c (PR tree-optimization/79339).

Hi. As mentioned in the PR, mpfr_clear should be called in order to release memory. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be installed? Martin >From 627ea01882a2a307b107e5e4aa8de6dc60530a81 Mon Sep 17 00:00:00 2001 From: marxin Date:

Re: [PATCH][ARM] Remove DImode expansions for 1-bit shifts

ping From: Wilco Dijkstra Sent: 17 January 2017 19:23 To: GCC Patches Cc: nd; Kyrill Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove DImode expansions for 1-bit shifts   A left shift of 1 can always be done using an add, so slightly adjust rtx cost for DImode left shift by 1 so that

Re: [PATCH][ARM] Remove Thumb-2 iordi_not patterns

ping From: Wilco Dijkstra Sent: 17 January 2017 18:00 To: GCC Patches Cc: nd; Kyrylo Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove Thumb-2 iordi_not patterns   After Bernd's DImode patch [1] almost all DImode operations are expanded early (except for -mfpu=neon). This means the

libgomp, nvptx plugin: Make "nvptx_exec" static (was: [PATCH 7/10] OpenACC 2.0 support for libgomp - OpenACC runtime, NVidia PTX/CUDA plugin)

Hi! On Tue, 23 Sep 2014 19:19:31 +0100, Julian Brown wrote: > This patch contains the bulk of the OpenACC 2.0 runtime support, [...] > --- /dev/null > +++ b/libgomp/plugin-nvptx.c > +void > +PTX_exec (void (*fn), size_t mapnum, void **hostaddrs, void **devaddrs, > +

Re: [PATCH][ARM] Fix ldrd offsets

  ping From: Wilco Dijkstra Sent: 03 November 2016 12:20 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Fix ldrd offsets     Fix ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020, without -255..4091.  This reduces the number of addressing instructions when using DI mode operations

Re: [PATCH][ARM] Improve max_insns_skipped logic

  ping From: Wilco Dijkstra Sent: 10 November 2016 17:19 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Improve max_insns_skipped logic     Improve the logic when setting max_insns_skipped.  Limit the maximum size of IT to MAX_INSN_PER_IT_BLOCK as otherwise multiple IT instructions are

Re: [PATCH][wwwdocs] Mention -march=armv8.3-a -msign-return-address= for GCC 7

On 02/02/17 13:31, Gerald Pfeifer wrote: On Thu, 2 Feb 2017, Jiong Wang wrote: This patch adds a short entry for the -march=armv8.3-a and -msign-return-address= options in GCC 7 to the "AArch64" section. Thanks, Jiong. Index: gcc-7/changes.html

Re: [PATCH] Fix __atomic to not implement atomic loads with CAS.

On 30/01/17 18:54, Torvald Riegel wrote: This patch fixes the __atomic builtins to not implement supposedly lock-free atomic loads based on just a compare-and-swap operation. If there is no hardware-backed atomic load for a certain memory location, the current implementation can implement the

Re: [PATCH] IPA: enhance dump output

> 2017-01-24 Martin Liska > > * cgraph.c (cgraph_node::dump): Dump function version info. > * symtab.c (symtab_node::dump_base): Add missing new line. > --- > gcc/cgraph.c | 10 ++ > gcc/symtab.c | 1 + > 2 files changed, 11 insertions(+) > > diff --git

  1   2   >