Re: One more path to fix PR70478

On 11 April 2017 at 21:43, Vladimir Makarov wrote: > > > On 04/11/2017 03:30 AM, Christophe Lyon wrote: >> >> Hi Vladimir, >> >> On 10 April 2017 at 17:05, Vladimir Makarov wrote: >>> >>>This is the second try to fix >>> >>>

Re: [RFC] S/390: Alignment peeling prolog generation

On Wed, Apr 12, 2017 at 9:50 AM, Robin Dapp wrote: >> Note I was very conservative here to allow store bandwidth starved >> CPUs to benefit from aligning a store. >> >> I think it would be reasonable to apply the same heuristic to the >> store case that we only peel for

[PATCH] Fix PR79390 (partly)

This avoids another case of path splitting which gets in the way of RTL if conversion. With this patch -O3 performance gets back to GCC 6 levels (with -Ofast we still regress as RTL if conversion doesn't catch the case). Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.

[PATCH] rs6000: Enforce quad_address_p in TImode atomic_load/store (PR80382)

Whatever expand expands to should be valid instructions. The defined instructions here have a quad_memory_operand predicate, which boils down to quad_address_p on the address, so let's test for that instead of only disallowing indexed addresses. Tested on powerpc64-linux, applying to trunk.

[PATCH, GCC/ARM, stage4] Set mode for success result of atomic compare and swap

Hi, Currently atomic_compare_and_swap_1 define_insn do not have a mode set for the destination of the set indicating the success result of the instruction. This is because the operand can be either a CC_Z register (for 32-bit targets) or a SI register (for 16-bit Thumb targets). This result in

[PATCH][GCC] Simplification of 1U << (31 - x)

Hi all This is a fix for PR 80131 Currently the code A << (B - C) is not simplified. However at least a more specific case of 1U << (C -x) where C = precision(type) - 1 can be simplified to (1 << C) >> x. This is done by adding a new simplification rule in match.pd So for a test case :

[PATCH][AArch64] Set jump alignment to 4 for Cortex cores

Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on average with no obvious performance difference. See original discussion of the overheads of various alignments: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html Bootstrap OK, OK for stage 1? ChangeLog:

[PATCH][AArch64] Update alignment for -mcpu=generic

With -mcpu=generic the loop alignment is currently 4. All but one of the supported cores use 8 or higher. Since using 8 provides performance gains on several cores, it is best to use that by default. As discussed in [1], the jump alignment has no effect on performance, yet has a relatively high

[PATCH][ARM] Update max_cond_insns settings

The existing setting of max_cond_insns for most cores is non-optimal. Thumb-2 IT has a maximum limit of 4, so 5 means emitting 2 IT sequences. Also such long sequences of conditional instructions can increase the number of executed instructions significantly, so using 5 for max_cond_insns is

Re: OpenACC 2.5 default (present) clause

Hi! On Fri, 07 Apr 2017 17:08:55 +0200, I wrote: > OpenACC 2.5 added a default (present) clause, which "causes all arrays or > variables of aggregate data type used in the compute construct that have > implicitly determined data attributes to be treated as if they appeared > in a present clause".

Fix cris/crisv32 port

The cris ports are unable to build newlib due to a reload failure. What happens is we need to reload an auto-inc memory reference. The preferred class is GENERAL_REGS. THe register we happen to select is ACR, but ACR can not be used in an auto-inc addressing mode. This can be easily fixed

[PATCH 2/2] arc: Fix for loop end detection

We use a negative ID number to link together the doloop_begin and doloop_end instructions. This negative ID number is setup within doloop_begin, at this point the ID is stored into the loop end instruction (doloop_end_i) and placed into the doloop_begin_i instruction. In arc.c (arc_reorg) we

[PATCH 1/2] arc: Use @pcl assembler syntax instead of invalid expressions

The old ARC assembler would accept expressions like 'LABEL-(.&-4)' which would calculate the offset from the PCL to LABEL. The new ARC assembler does not accept these expressions, instead there's an @pcl synax, used like LABEL@pcl which gives the offset from PCL to LABEL. Most of the use of the

[PATCH 0/2] ARC Zero Overhead Loop Fixes

Found two issues with the ARC loop detection. The first generates code that the current assembler can't handle, while the second causes some loops to be missed. -- Andrew Burgess (2): arc: Use @pcl assembler syntax instead of invalid expressions arc: Fix for loop end detection

Re: [RFC] S/390: Alignment peeling prolog generation

> Note I was very conservative here to allow store bandwidth starved > CPUs to benefit from aligning a store. > > I think it would be reasonable to apply the same heuristic to the > store case that we only peel for same cost if peeling would at least > align two refs. Do you mean checking if

[PR 80293] Don't totally-sRA char arrays

Hi, the patch below is an attempt to deal with PR 80293 as non-invasively as possible. Basically, it switches off total SRA scalarization of any local aggregates which contains an array of elements that have one byte (or less). The logic behind this is that accessing such arrays element-wise

[PATCH][AArch64] Improve address cost for -mcpu=generic

All cores which add a cpu_addrcost_table use a non-zero value for HI and TI mode shifts (a non-zero value for general indexing also applies to all shifts). Given this, it makes no sense to use a different setting in generic_addrcost_table. So change it so that all supported cores, including

[PATCH] Fix PR80359

I am testing the follow^W^W^WJeff has tested the following, applied to trunk. Richard. 2017-04-12 Richard Biener Jeff Law PR tree-optimization/80359 * tree-ssa-dse.c (maybe_trim_partially_dead_store): Do not trim stores

[wwwdocs] update primary platform name for gcc-7

The default config.guess for x86_64 GNU/Linux now uses "pc" not "unknown" so update the release criteria accordingly. Committed to cvs. Index: htdocs/gcc-7/criteria.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/criteria.html,v

Re: [PATCH] Fix fixincludes for canadian cross builds

Hi, On 20 February 2017 at 18:53, Bruce Korb wrote: > On 02/18/17 01:01, Bernd Edlinger wrote: >> On 02/18/17 00:37, Bruce Korb wrote: >>> On 02/06/17 10:44, Bernd Edlinger wrote: I tested this change with different arm-linux-gnueabihf cross compilers, and verified that

Fix SH port failure in delay slot scheduling

The SH port has this delay slot description like this: ;; Conditional branches with delay slots are available starting with SH2. ;; If zero displacement conditional branches are fast, disable the delay ;; slot if the branch jumps over only one 2-byte insn. (define_delay (and (eq_attr "type"

[PATCH] Fix another fold-const.c type bug (PR sanitizer/80403)

Hi! Similarly to PR80349, we have other spots where we don't get the types right. opN are the original args, argN is the same after STRIP_NOPS, so when we want to have type of type, we should use opN rather than argN (opN is less expensive variant to fold_convert argN to type).

Re: [PATCH] Fix fixincludes for canadian cross builds

I will be unable to look at this for a couple of weeks, so I leave this to others to look at. On Wed, Apr 12, 2017 at 8:58 AM, Yvan Roux wrote: > Hi, > > On 20 February 2017 at 18:53, Bruce Korb wrote: >> On 02/18/17 01:01, Bernd Edlinger wrote: >>> On

[PATCH] Attempt harder to emit a cmove in emit_conditional_move (PR tree-optimization/79390)

Hi! As mentioned in the PR, for LU benchmark we generate worse code with -Ofast compared to -O3, because in the former we don't use a conditional move. The problem is during emit_conditional_move, while in both cases swap_commutative_operands_p (op2, op3) tells us it might be better to swap

Re: [PR 80293] Don't totally-sRA char arrays

On Wed, 12 Apr 2017, Martin Jambor wrote: > Hi, > > the patch below is an attempt to deal with PR 80293 as non-invasively > as possible. Basically, it switches off total SRA scalarization of > any local aggregates which contains an array of elements that have one > byte (or less). > > The

Re: [PATCH][GCC] Simplification of 1U << (31 - x)

On Wed, Apr 12, 2017 at 01:15:56PM -0500, Segher Boessenkool wrote: > Hi, > > On Wed, Apr 12, 2017 at 07:06:38PM +0200, Jakub Jelinek wrote: > > On Wed, Apr 12, 2017 at 09:29:55AM +, Sudi Das wrote: > > > This is a fix for PR 80131 > > > Currently the code A << (B - C) is not simplified. > >

Re: [PATCH][GCC] Simplification of 1U << (31 - x)

On Wed, Apr 12, 2017 at 09:29:55AM +, Sudi Das wrote: > Hi all > > This is a fix for PR 80131 > Currently the code A << (B - C) is not simplified. > However at least a more specific case of 1U << (C -x) where C = > precision(type) - 1 can be simplified to (1 << C) >> x. Is that always a

Re: [PATCH] Fix another fold-const.c type bug (PR sanitizer/80403)

On April 12, 2017 6:12:57 PM GMT+02:00, Jakub Jelinek wrote: >Hi! > >Similarly to PR80349, we have other spots where we don't get the >types right. opN are the original args, argN is the same after >STRIP_NOPS, so when we want to have type of type, we should use >opN rather

Re: [wwwdocs,fortran] Update link to CHKSYS

On 04/11/2017 03:40 PM, Gerald Pfeifer wrote: > This one has been failing for quite a while, and I found > http://flibs.sourceforge.net/chksys.html > as a potential replacement link. > > Thoughts? > When I visit the suggested link I have to go up one level manually to get to a page that has a

Re: [PATCH] Attempt harder to emit a cmove in emit_conditional_move (PR tree-optimization/79390)

On April 12, 2017 6:33:19 PM GMT+02:00, Jakub Jelinek wrote: >Hi! > >As mentioned in the PR, for LU benchmark we generate worse code with >-Ofast >compared to -O3, because in the former we don't use a conditional move. > >The problem is during emit_conditional_move, while in

[Patch, GCC/ARM, gcc-5-branch] Fix PR68390 Incorrect code due to indirect tail call of varargs function with hard float ABI

Hi, It looks like we forgot to backport the fix for PR68390 to gcc-5-branch. The patch applies cleanly, and fwiw we've had it in the linaro-5 branch for a while. OK to apply to gcc-5-branch? Thanks, Christophe 2017-04-12 Christophe Lyon Backport from

Re: [PATCH][libgcc, fuchsia]

Ping^3? I think this should be very straightforward - it just adds fuchsia target support to libgcc. Please do let me know if there are any concerns... Thanks! - Josh 2017-04-12 Joshua Conner * config/arm/unwind-arm.h (_Unwind_decode_typeinfo_ptr): Use

Re: [PATCH][GCC] Simplification of 1U << (31 - x)

Hi, On Wed, Apr 12, 2017 at 07:06:38PM +0200, Jakub Jelinek wrote: > On Wed, Apr 12, 2017 at 09:29:55AM +, Sudi Das wrote: > > This is a fix for PR 80131 > > Currently the code A << (B - C) is not simplified. > > However at least a more specific case of 1U << (C -x) where C = > >

Re: [PATCH], Fix PR 80098, Add better checking for disabling features

On Tue, Apr 11, 2017 at 06:04:33PM -0500, Segher Boessenkool wrote: > Hi! > > On Tue, Apr 11, 2017 at 05:32:41PM -0400, Michael Meissner wrote: > > PR 80098 is an interaction between -mmodulo (ISA 3.0/power9 GPR modulo > > instructions) and -mno-vsx where the -mmodulo option enables some of the

Re: [PATCH] Destroy arguments for _Cilk_spawn calling in the child (PR 80038)

On 04/07/2017 08:02 AM, Xi Ruoyao wrote: On 2017-04-06 11:12 -0600, Jeff Law wrote: With the likely deprecation in mind, I've only done a cursory review of the changes -- mostly to verify that they hit Cilk+ paths only. What's the purpose behind changing when we set the in_lto_p flag?

Re: port contrib/download_prerequisites script to macOS

On 04/04/2017 07:10 PM, Damian Rouson wrote: All, The attached patch modifies the contrib/download_prerequisites script to work on macOS. The revised script detects the operating system and adjusts the shasum and md5 commands to their expected name and arguments on macOS. The revised script

Re: [PR59319] output friends in debug info

On 03/21/2017 12:34 PM, Alexandre Oliva wrote: On Jan 27, 2017, Alexandre Oliva wrote: On Oct 19, 2016, Alexandre Oliva wrote: On Sep 23, 2016, Alexandre Oliva wrote: On Aug 30, 2016, Alexandre Oliva wrote:

Re: [libcp1] handle anon aggregates linkage-named by typedefs

On 04/11/2017 03:13 PM, Alexandre Oliva wrote: On Apr 10, 2017, Jeff Law wrote: On 03/21/2017 05:32 PM, Alexandre Oliva wrote: * libcp1plugin.cc (plugin_build_decl): Propagate typedef name to anonymous aggregate target type. Can you put some kind of pointer in the code you

Re: [PATCH][PR sanitizer/77631] Support separate debug info in libbacktrace

On 03/22/2017 09:28 AM, Denis Khalikov wrote: Hello everyone, I've fixed some issues and implemented functionality to search debug file by build-id. Can someone please review my patch. Given this doesn't look like a regression, I'm going to punt to gcc-8. jeff

[PATCH], Fix PR/target 80099 (internal error with -mno-upper-regs-sf)

The problem is rs6000_expand_vector_extract did not check for SFmode being allowed in the Altivec (upper) registers, but the insn implementing the variable extract had it as a condition. In looking at the variable extract code, it currently does not require SFmode to go in the Altivec registers,

RFC: seeking insight on store_data_bypass_p (recog.c)

My work on PR80101 is "motivating" me to modify the implementation of store_data_bypass_p (in gcc/recog.c). I have a patch that bootstraps with no regressions. However, I think "regression" testing may not be enough to prove I got this right. If my new patch returns the wrong value, the

[PATCH,rs6000] PR80315: Add test cases to confirm ICE has been fixed

PR80315 Reported an Internal Compiler Error when the third argument to __builtin_crypto_vshasigmaw was an integer constant with a value greater than 15. The patch to correct this problem was committed yesterday. This patch adds 4 new test cases to the regression suite. Regression testing has

[PATCH] Fix PR51513, switch statement with default case containing __builtin_unreachable leads to wild branch

This patch is the second attempt to fix PR51513, namely the generation of wild branches due to switch case statements that only contain calls to __builtin_unreachable(). With the first attempt: https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01915.html richi said he preferred if we just

Re: port contrib/download_prerequisites script to macOS

On 04/12/2017 05:40 PM, Martin Sebor wrote: > On 04/12/2017 04:03 PM, Jeff Law wrote: >> On 04/04/2017 07:10 PM, Damian Rouson wrote: >>> All, >>> >>> The attached patch modifies the contrib/download_prerequisites script >>> to work on macOS. >>> The revised script detects the operating system and

Re: port contrib/download_prerequisites script to macOS

On 04/12/2017 04:03 PM, Jeff Law wrote: On 04/04/2017 07:10 PM, Damian Rouson wrote: All, The attached patch modifies the contrib/download_prerequisites script to work on macOS. The revised script detects the operating system and adjusts the shasum and md5 commands to their expected name and

Re: [PATCH][GCC] Simplification of 1U << (31 - x)

On Wed, Apr 12, 2017 at 08:59:34PM +0200, Jakub Jelinek wrote: > On Wed, Apr 12, 2017 at 01:15:56PM -0500, Segher Boessenkool wrote: > > On Wed, Apr 12, 2017 at 07:06:38PM +0200, Jakub Jelinek wrote: > > > On Wed, Apr 12, 2017 at 09:29:55AM +, Sudi Das wrote: > > > > This is a fix for PR 80131