[PATCH, i386]: Fix PR78090, GCC allows integer register for inter unit conversion under -mtune-ctrl=^inter_unit_conversions

Hello! Attached patch makes TARGET_INTER_UNIT_CONVERSIONS setting more robust, by taking the same approach as handling of TARGET_INTER_UNIT_{TO,FROM}_VEC. The patch also removes now obsolete test that checked TARGET_INTER_UNIT_CONVERSIONS with tune_for_speed attribute, which is not case anymore.

[PATCH] Fix fixincludes for canadian cross builds - next try

Hi! This is my new attempt to clean up the different cross compiler configurations. It turned out to be a very complicated matter, so I thought it would be better to postpone it to the stage1. In a canadian cross compiler setup we have a different header dir path for use in the build and later

[PATCH, i386]: Fix PR79804, ICE in print_reg

2017-04-20 Uros Bizjak PR target/79804 * config/i386/i386.c (print_reg): Remove assert for disalowed regno values, call output_operand_lossage instead. testsuite/ChangeLog: 2017-04-20 Uros Bizjak PR target/79804 *

[PATCH] Implement a warning for bogus sizeof(pointer) / sizeof(pointer[0])

Hi! This implements a new -Wall enabled warning for a rather common, but completely wrong way to compute an array size by dividing the sizeof(pointer) / sizeof(pointer[0]) or sizeof(*pointer). It is often hard to find this kind of error by simple code inspection in real code, because using

Re: [PATCH] Add test-case (PR tree-optimization/66278).

On Apr 20, 2017, at 6:04 AM, Bin.Cheng wrote: > > On Thu, Apr 20, 2017 at 9:35 AM, Martin Liška wrote: >> Hello. >> >> The patch adds a new test-case for the mentioned PR. Tested on >> x86_64-linux-gnu >> and ppc64le-linux-gnu. >> >> Ready for trunk or

Re: [PATCH 4/7] [D] libiberty: Remove wrongly spec'd mangle rule for encoded integers.

On 15 April 2017 at 17:24, Iain Buclaw wrote: > This updates the implementation to reflect a part of the D ABI spec > that has been removed. There should never be a bare integer value > encoded into a template argument list. Integers are always prefixed > by `i' if they

RE: [PATCH] Fix fixincludes for canadian cross builds - next try

Bernd Edlinger writes: > This is my new attempt to clean up the different cross compiler > configurations. It turned out to be a very complicated matter, > so I thought it would be better to postpone it to the stage1. > > In a canadian cross compiler setup we have a

Re: [gomp4] add support for allocatable scalars in OpenACC declare constructs

On 04/20/2017 01:08 AM, Thomas Schwinge wrote: > On Wed, 19 Apr 2017 11:11:39 -0700, Cesar Philippidis > wrote: >> Included in this patch is a bug fix for non-declared allocatable >> scalars. [...] > > Please, bug fixes as work items/patches/commits separate from new >

[patch, wwwdocs]: Update GCC 7 PowerPC changes

I updated the GCC 7 changes document to include some of the PowerPC changes we did for GCC 7. Can I check this in? Index: htdocs/gcc-7/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v retrieving revision 1.77

[wwwdocs] powerpc: Another update for gcc-7/changes.html

Hi! Here's another update. Does this look okay? (I'll fix the conflict with Mike's patch, of course). Thanks, Segher Index: htdocs/gcc-7/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v retrieving

[PATCH] warn for reading past the end by library functions (PR 54924, 79234)

PR libstdc++/54924 - Warn for std::string constructor with wrong size asks for a warning when constructing a std::string from a character array and a number of elements that's in excess of the number of elements. E.g., std::string s ("abc", 7); PR middle-end/79234 - warn on past the end

Re: [patch, wwwdocs]: Update GCC 7 PowerPC changes

I reworded some of the PowerPC changes based on IRC comments from Segher. Are these changes ok to go in? Index: htdocs/gcc-7/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v retrieving revision 1.77 diff -p -c

Re: [PATCH, i386]: Fix PR79804, ICE in print_reg

On 2017.04.20 at 22:29 +0200, Uros Bizjak wrote: > > PR target/79804 > * gcc.target/i386/pr79804.c: New test. > > Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. > > Committed to mainline SVN. > --- testsuite/gcc.target/i386/pr79804.c (nonexistent) > +++

Re: [PR 80293] Don't totally-sRA char arrays

On Mon, 17 Apr 2017, Martin Jambor wrote: > Hi, > > On Thu, Apr 13, 2017 at 08:48:38PM +0200, Richard Biener wrote: > > On April 13, 2017 7:41:29 PM GMT+02:00, Martin Jambor > > wrote: > > >Hi, > > > > > >On Wed, Apr 12, 2017 at 01:55:01PM +0200, Richard Biener wrote: > > >>

Re: [CHKP] Fix for PR79988

Hi Alexander, just a couple of nits: > gcc/testsuite/ChangeLog: > > * gcc.target/i386/mpx/PR79988.c: New test. We usually don't use capital PR in testcase names. Please use pr79988.c instead, matching the other files there. Also, both ChangeLog entries should include a PR reference

[PATCH][STAGE1] Add prefix to test verification in guality.h

Hello. Currently tests that include guality.h header file and us the fancy macros for verification produce output like: FAIL: o is -1, not 268566560 FAIL: w is -1, not 268566624 FAIL: w is -1, not 268566624 FAIL: o is -1, not 268566576 FAIL: w is -1, not 268566624 FAIL: w is -1, not 268566624

[CHKP] Fix for PR79988

Hi Ilya, The patch below is basically what Richard proposed in Bugzilla. This approach should produce the correct code for any address spaces, because it will just strip the address space part of the pointer in all bnd* instructions; Since we will do that consistently, all checks should be

Re: [PATCH] omp-low: fix lastprivate/linear lowering for SIMT

Ping - as this patch addresses a wrong-code issue in new functionality, I'd like to ask if it may be applied to gcc-7 branch too. On Fri, 7 Apr 2017, Alexander Monakov wrote: > Ping. > > > I've noticed while re-reading that this patch incorrectly handled SIMT case > > in

[PATCH] Add test-case (PR tree-optimization/66278).

Hello. The patch adds a new test-case for the mentioned PR. Tested on x86_64-linux-gnu and ppc64le-linux-gnu. Ready for trunk or should I postpone it for next stage1? Martin >From 84335b09fd7626224148be8883edbaa42dcc496e Mon Sep 17 00:00:00 2001 From: marxin Date: Thu, 20 Apr

[PING*2][PATCH][PR79542][Ada] Fix ICE in dwarf2out.c with nested func. inlining

Hello, I would like to ping for the patch I posted there: . Thank you! -- Pierre-Marie de Rodat

Re: [CHKP] Fix for PR79990

Thanks for correcting the usage of get_base_address. I fixed that. Plus addressed the comment about the avoiding the usage of chkp_find_bounds. gcc/testsuite/ChangeLog: 2017-04-20 Alexander Ivchenko * gcc.target/i386/mpx/hard-reg-2-lbv.c: New test.

Re: [PATCH] Fix TYPE_TYPELESS_STORAGE handling (PR middle-end/80423)

On Thu, 20 Apr 2017, Jakub Jelinek wrote: > On Wed, Apr 19, 2017 at 08:22:23AM +0200, Jakub Jelinek wrote: > > Here in (so far untested) patch form: > > > > 2017-04-19 Jakub Jelinek > > > > PR middle-end/80423 > > * tree.h (build_array_type): Add typeless_storage

[PATCH, GCC/ARM, Stage 1] PR71607: Fix ICE when loading constant

[ARM] PR71607: Fix ICE when loading constant gcc/ChangeLog: 2017-04-18 Andre Vieira Prakhar Bahuguna PR target/71607 * config/arm/arm.md (use_literal_pool): Removes. (64-bit immediate split): No

Re: [PATCH, GCC, stage4] Fix type for .init_array.* and .fini_array.* sections

Hi Kyrill, On 19/04/17 10:56, Kyrill Tkachov wrote: Hi Thomas, On 11/04/17 18:35, Thomas Preudhomme wrote: Hi, Several tests started failing for ARM targets (eg. gcc.dg/initpri1.c) after change 6f9dbcd42f2cf034a9a21f46842c08d2e88449db in binutils. This is because the non-default priority

Re: [gomp4] add support for allocatable scalars in OpenACC declare constructs

Hi! On Wed, 19 Apr 2017 11:11:39 -0700, Cesar Philippidis wrote: > I've applied this patch to gomp-4_0-branch to add support for fortran > allocatable scalars inside OpenACC declare constructs. Thanks! > Included in this patch is a bug fix for non-declared allocatable

Re: [PATCH] PR c++/80473 allow suppressing notes about over-aligned new

On 20/04/17 17:22 +0200, Jakub Jelinek wrote: On Thu, Apr 20, 2017 at 04:09:20PM +0100, Jonathan Wakely wrote: --- a/gcc/cp/init.c +++ b/gcc/cp/init.c @@ -3128,11 +3128,14 @@ build_new_1 (vec **placement, tree type, tree nelts, { warning (OPT_Waligned_new_, "% of

Re: [PATCH] PR c++/80473 allow suppressing notes about over-aligned new

On Thu, Apr 20, 2017 at 05:22:00PM +0200, Jakub Jelinek wrote: > On Thu, Apr 20, 2017 at 04:09:20PM +0100, Jonathan Wakely wrote: > > --- a/gcc/cp/init.c > > +++ b/gcc/cp/init.c > > @@ -3128,11 +3128,14 @@ build_new_1 (vec **placement, tree > > type, tree nelts, > > { > >

Re: [PATCH][AArch64] Set jump alignment to 4 for Cortex cores

ping From: Wilco Dijkstra Sent: 12 April 2017 13:50 To: GCC Patches Cc: nd; James Greenhalgh Subject: [PATCH][AArch64] Set jump alignment to 4 for Cortex cores   Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on average with no obvious performance difference.  See

[PATCH] PR c++/80473 allow suppressing notes about over-aligned new

This suppresses the notes about over-aligned new when the corresponding warning is suppressed, either by -w or because it's in a system header (as in PR 80390, which I originally tried to fix in the library). OK for trunk? And gcc-7-branch after 7.1 is released? Is this the right place for the

Re: [PATCH, libstdc++] PR libstdc++/68397 std::tr1::expint fails ... long double arguments.

On 20/04/17 10:58 -0400, Ed Smith-Rowland wrote: Here is a patch for PR libstdc++/68397 std::tr1::expint fails in __expint_En_cont_frac for some long double arguments due to low __max_iter value. The proposed resolution of increasing the max_iter to 1000 is a simple and obvious fix.

Re: [PATCH 2/5] omp-low: implement SIMT privatization, part 1

On Fri, Mar 31, 2017 at 06:38:09PM +0300, Alexander Monakov wrote: > I've noticed while re-reading that this patch incorrectly handled SIMT case > in lower_lastprivate_clauses. The code was changed to look for variables > with "omp simt private" attribute, and was left under > 'simduid &&

Re: [PATCH] PR c++/80473 allow suppressing notes about over-aligned new

On Thu, Apr 20, 2017 at 04:09:20PM +0100, Jonathan Wakely wrote: > --- a/gcc/cp/init.c > +++ b/gcc/cp/init.c > @@ -3128,11 +3128,14 @@ build_new_1 (vec **placement, tree type, > tree nelts, > { >warning (OPT_Waligned_new_, "% of type %qT with extended " >

Re: [PATCH][AArch64] Improve address cost for -mcpu=generic

ping From: Wilco Dijkstra Sent: 12 April 2017 14:08 To: GCC Patches Cc: nd; James Greenhalgh; Evandro Menezes; jim.wil...@linaro.org; andrew.pin...@cavium.com Subject: [PATCH][AArch64] Improve address cost for -mcpu=generic   All cores which add a cpu_addrcost_table use a non-zero value for

[PATCH, libstdc++] PR libstdc++/68397 std::tr1::expint fails ... long double arguments.

Here is a patch for PR libstdc++/68397 std::tr1::expint fails in __expint_En_cont_frac for some long double arguments due to low __max_iter value. The proposed resolution of increasing the max_iter to 1000 is a simple and obvious fix. Built and tested on x86_64-linux. OK? Ed

Re: [PATCH][ARM] Update max_cond_insns settings

ping From: Wilco Dijkstra Sent: 12 April 2017 14:02 To: GCC Patches Cc: nd; Kyrylo Tkachov Subject: [PATCH][ARM] Update max_cond_insns settings   The existing setting of max_cond_insns for most cores is non-optimal. Thumb-2 IT has a maximum limit of 4, so 5 means emitting 2 IT sequences.

Re: [PATCH][AArch64] Update alignment for -mcpu=generic

ping From: Wilco Dijkstra Sent: 12 April 2017 13:58 To: GCC Patches Cc: nd; James Greenhalgh; jim.wil...@linaro.org; Evandro Menezes; andrew.pin...@cavium.com Subject: [PATCH][AArch64] Update alignment for -mcpu=generic   With -mcpu=generic the loop alignment is currently 4.  All but one of

Re: [PATCH][AArch64] Model Cortex-A53 load forwarding

ping From: Wilco Dijkstra Sent: 05 April 2017 13:29 To: GCC Patches Cc: nd; James Greenhalgh Subject: [PATCH][AArch64] Model Cortex-A53 load forwarding   Code scheduling for Cortex-A53 isn't as good as it could be.  It turns out code runs faster overall if we place loads and stores with a

Re: [PATCH][AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic

ping From: Wilco Dijkstra Sent: 05 April 2017 13:38 To: GCC Patches Cc: nd; James Greenhalgh; andrew.pin...@cavium.com; Evandro Menezes; jim.wil...@linaro.org Subject: [PATCH][AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic   Many supported cores use the AUTOPREFETCHER_WEAK setting

RE: [PATCH] MIPS: Prevent buffer overrun in uninitialised variable fix

Jakub Jelinek writes: > On Thu, Apr 20, 2017 at 12:49:49PM +, Matthew Fortune wrote: > > Hi Jeff, > > > > I missed a load of test failures while on vacation and just noticed > > that the fix you did for a potentially uninitialized variable warning > > is overwriting the

[PATCH] Fix PR80453

The following fixes PR80453. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk sofar. Richard. 2017-04-20 Richard Biener PR tree-optimization/80453 * tree-ssa-sccvn.h (struct vn_phi_s): Add cclhs and ccrhs members. *

[PATCH] PR79862 check macro for type aliases that depend on

The atomic types shouldn't be declared if the underlying types aren't available. PR libstdc++/79862 * include/std/atomic [!_GLIBCXX_USE_C99_STDINT_TR1] (atomic_int8_t) (atomic_uint8_t, atomic_int16_t, atomic_uint16_t, atomic_int32_t, (atomic_uint32_t,

[PATCH] MIPS: Prevent buffer overrun in uninitialised variable fix

Hi Jeff, I missed a load of test failures while on vacation and just noticed that the fix you did for a potentially uninitialized variable warning is overwriting the stack and breaking MSA in MIPS. I guess you may have intended to set the length appropriately and only zero the elements that

Re: [PATCH] Fix PR51513, switch statement with default case containing __builtin_unreachable leads to wild branch

On 4/20/17 2:37 AM, Richard Biener wrote: > Ok, so I think we should ensure that we remove the regular cases > with unreachable destination, like in > > switch (i) > { > case 0: > __builtin_unreachable (); > default:; > } > > and handle default with __builtin_unreachable () from switch >

Re: [PATCH] MIPS: Prevent buffer overrun in uninitialised variable fix

On Thu, Apr 20, 2017 at 12:49:49PM +, Matthew Fortune wrote: > Hi Jeff, > > I missed a load of test failures while on vacation and just noticed > that the fix you did for a potentially uninitialized variable warning > is overwriting the stack and breaking MSA in MIPS. > > I guess you may

Re: [PR 80293] Don't totally-sRA char arrays

Hi, On Mon, Apr 17, 2017 at 09:35:18PM +0200, Martin Jambor wrote: > On Thu, Apr 13, 2017 at 08:48:38PM +0200, Richard Biener wrote: > > On April 13, 2017 7:41:29 PM GMT+02:00, Martin Jambor > > wrote: ... > > >Therefore, I have adapted the patch to allow char arrays for

Re: [PATCH] Add test-case (PR tree-optimization/66278).

On Thu, Apr 20, 2017 at 9:35 AM, Martin Liška wrote: > Hello. > > The patch adds a new test-case for the mentioned PR. Tested on > x86_64-linux-gnu > and ppc64le-linux-gnu. > > Ready for trunk or should I postpone it for next stage1? Though can't approve, I think it's ok since we

Re: [PATCH][ARM] Remove Thumb-2 iordi_not patterns

ping From: Wilco Dijkstra Sent: 17 January 2017 18:00 To: GCC Patches Cc: nd; Kyrylo Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove Thumb-2 iordi_not patterns   After Bernd's DImode patch [1] almost all DImode operations are expanded early (except for -mfpu=neon). This means the

Re: [PATCH][ARM] Remove movdi_vfp_cortexa8

ping From: Wilco Dijkstra Sent: 29 November 2016 11:05 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Remove movdi_vfp_cortexa8   Merge the movdi_vfp_cortexa8 pattern into movdi_vfp and remove it to avoid unnecessary duplication and repeating bugs like PR78439 due to changes being applied only

Re: [RFC][PATCH][AArch64] Cleanup frame pointer usage

ping From: Wilco Dijkstra Sent: 31 October 2016 18:29 To: GCC Patches Cc: nd Subject: [RFC][PATCH][AArch64] Cleanup frame pointer usage   This patch cleans up all code related to the frame pointer.  On AArch64 we emit a frame chain even in cases where the frame pointer is not required. So

Re: [PATCH] PR c++/80473 allow suppressing notes about over-aligned new

On 20/04/17 17:33 +0200, Marek Polacek wrote: On Thu, Apr 20, 2017 at 05:22:00PM +0200, Jakub Jelinek wrote: On Thu, Apr 20, 2017 at 04:09:20PM +0100, Jonathan Wakely wrote: > --- a/gcc/cp/init.c > +++ b/gcc/cp/init.c > @@ -3128,11 +3128,14 @@ build_new_1 (vec **placement, tree

Re: [PATCH][AArch64] Enable AES fusion with -mcpu=generic

ping From: Wilco Dijkstra Sent: 16 March 2017 17:22 To: GCC Patches; Evandro Menezes; andrew.pin...@cavium.com; jim.wil...@linaro.org Cc: nd Subject: [PATCH][AArch64] Enable AES fusion with -mcpu=generic   Many supported cores implement fusion of AES instructions.  When fusion happens it can

Re: [PATCH][ARM] Improve max_insns_skipped logic

ping From: Wilco Dijkstra Sent: 10 November 2016 17:19 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Improve max_insns_skipped logic   Improve the logic when setting max_insns_skipped.  Limit the maximum size of IT to MAX_INSN_PER_IT_BLOCK as otherwise multiple IT instructions are needed,

Re: [PATCH][ARM] Fix ldrd offsets

ping From: Wilco Dijkstra Sent: 03 November 2016 12:20 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Fix ldrd offsets   Fix ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020, without -255..4091.  This reduces the number of addressing instructions when using DI mode operations (such

Re: [PATCH 2/5] omp-low: implement SIMT privatization, part 1

On Thu, Apr 20, 2017 at 07:37:13PM +0300, Alexander Monakov wrote: > On Thu, 20 Apr 2017, Jakub Jelinek wrote: > > > This wasn't caught in testing, as apparently all testcases that have > > > target > > > simd loops with linear/lastprivate clauses also have the corresponding > > > variables > >

Re: [PATCH][ARM] Remove DImode expansions for 1-bit shifts

ping From: Wilco Dijkstra Sent: 17 January 2017 19:23 To: GCC Patches Cc: nd; Kyrill Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove DImode expansions for 1-bit shifts   A left shift of 1 can always be done using an add, so slightly adjust rtx cost for DImode left shift by 1 so that

Re: [PATCH v3][AArch64] Fix symbol offset limit

ping From: Wilco Dijkstra Sent: 17 January 2017 15:14 To: Richard Earnshaw; GCC Patches; James Greenhalgh Cc: nd Subject: Re: [PATCH v3][AArch64] Fix symbol offset limit   Here is v3 of the patch - tree_fits_uhwi_p was necessary to ensure the size of a declaration is an integer. So the

Re: [PATCH 2/5] omp-low: implement SIMT privatization, part 1

On Thu, 20 Apr 2017, Jakub Jelinek wrote: > > This wasn't caught in testing, as apparently all testcases that have target > > simd loops with linear/lastprivate clauses also have the corresponding > > variables > > mentioned in target map clause, which makes them addressable (is that > >

[PING] [PATCH, ARM] correctly encode the CC reg data flow

Ping... for this patch: https://gcc.gnu.org/ml/gcc-patches/2017-01/msg01351.html On 01/18/17 16:36, Bernd Edlinger wrote: > On 01/13/17 19:28, Bernd Edlinger wrote: >> On 01/13/17 17:10, Bernd Edlinger wrote: >>> On 01/13/17 14:50, Richard Earnshaw (lists) wrote: On 18/12/16 12:58, Bernd

Re: [CHKP] Fix for PR79990

2017-04-20 12:27 GMT+03:00 Alexander Ivchenko : > Thanks for correcting the usage of get_base_address. I fixed that. > Plus addressed the comment about the avoiding the usage of > chkp_find_bounds. > > > gcc/testsuite/ChangeLog: > > 2017-04-20 Alexander Ivchenko

Re: [CHKP] Fix for PR79988

Hi, Please put comment to code explaining why you don't use gimple_call_builtin_p to avoid similar issues in the future. Also please follow Rainer's comments. OK with these fixes. Thanks, Ilya 2017-04-20 15:27 GMT+03:00 Rainer Orth : > Hi Alexander, > > just a

Re: [PATCH] PR c++/80473 allow suppressing notes about over-aligned new

On 20/04/17 17:43 +0100, Jonathan Wakely wrote: On 20/04/17 17:33 +0200, Marek Polacek wrote: On Thu, Apr 20, 2017 at 05:22:00PM +0200, Jakub Jelinek wrote: On Thu, Apr 20, 2017 at 04:09:20PM +0100, Jonathan Wakely wrote: --- a/gcc/cp/init.c +++ b/gcc/cp/init.c @@ -3128,11 +3128,14 @@

Re: [PATCH] Fix TYPE_TYPELESS_STORAGE handling (PR middle-end/80423)

On Wed, Apr 19, 2017 at 08:22:23AM +0200, Jakub Jelinek wrote: > Here in (so far untested) patch form: > > 2017-04-19 Jakub Jelinek > > PR middle-end/80423 > * tree.h (build_array_type): Add typeless_storage default argument. > * tree.c

Re: [PATCH] Fix PR51513, switch statement with default case containing __builtin_unreachable leads to wild branch

On Thu, 13 Apr 2017, Peter Bergner wrote: > Bah, fixing up my return address. > > > On 4/13/17 3:14 AM, Richard Biener wrote: > > To recap the situation (from what I can deciper out of the ppc asm > > and the expand RTL) we seem to expand to > > > > if (cond > 2) > >

Re: [PATCH] Fix PR80457

On Wed, Apr 19, 2017 at 12:38 AM, Bill Schmidt wrote: > Hi, > > While investigating a performance issue, I happened to notice that vectorized > COND_EXPRs were not contributing to the vectorizer cost model. This patch > addresses that. > > Bootstrapped and tested on