Committed, thanks kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Monday, May 15, 2023 1:01 PM
To: 钟居哲
Cc: GCC Patches ; Kito Cheng ;
Palmer Dabbelt ; Palmer Dabbelt ; Jeff
Law ; rdapp@gmail.co
Subject: Re: [PATCH V2] RISC-V: Support
Hi Jeff,
on 2022/12/12 09:38, Jiufu Guo wrote:
> Hi,
>
> For constant C:
> If '(c & 0xULL) == 0x' or say:
> 32(1) || 1(0) || 15(x) || 16(0), we could use "lis; xoris" to build.
>
> Here N(M) means N continuous bit M, x for M means it is ok for either
> 1 or 0;
Do not perform a libc function call into memcpy in case the size is not
a compile-time constant but bounded and the upper bound is less than or
equal to 256 bytes.
gcc/ChangeLog:
* config/s390/s390-protos.h (s390_expand_cpymem): Change
function signature.
*
gcc/ChangeLog:
* config/s390/s390-protos.h (s390_expand_movmem): New.
* config/s390/s390.cc (s390_expand_movmem): New.
* config/s390/s390.md (movmem): New.
(*mvcrl): New.
(mvcrl): New.
---
gcc/config/s390/s390-protos.h | 1 +
gcc/config/s390/s390.cc
On Sun, May 14, 2023 at 1:32 AM Bernhard Reutner-Fischer via
Gcc-patches wrote:
>
> From: Bernhard Reutner-Fischer
>
> gcc/ChangeLog:
This piece looks OK to me.
> * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
> * attribs.cc (diag_attr_exclusions): Ditto.
On Sun, May 14, 2023 at 10:22 AM Iain Sandoe wrote:
>
> Hi Bernhard
>
> > On 14 May 2023, at 00:23, Bernhard Reutner-Fischer via Gcc-patches
> > wrote:
> >
> > From: Bernhard Reutner-Fischer
> >
> > gcc/ChangeLog:
> >
>
> > * config/darwin-c.cc (darwin_pragma_unused): Ditto.
> > *
On Sun, May 14, 2023 at 1:40 AM Bernhard Reutner-Fischer via
Gcc-patches wrote:
>
> From: Bernhard Reutner-Fischer
OK.
> gcc/ChangeLog:
>
> * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
> tree.h.
> (lto_read_body_or_constructor): Ditto.
> *
Hi!
On 2023-05-08T21:50:56+0200, I wrote:
> Ping: OK to push to newlib main branch the attached
> "For GCC, newlib combined tree, newlib build-tree testing, use standard
> search paths"?
> Or, has anybody got adverse comments/insight into this?
Given that nobody has any comments, I'll push this
Hi all,
Straightforward like previous patches in this series.
Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
Pushing to trunk.
Thanks,
Kyrill
gcc/ChangeLog:
PR target/99195
* config/aarch64/aarch64-simd.md (aarch64_s): Rename to...
Evandro Menezes via Gcc-patches writes:
> This patch adds the attribute `type` to most SVE1 instructions, as in the
> other
> instructions.
Thanks for doing this.
Could you say what criteria you used for picking the granularity? Other
maintainers might disagree, but personally I'd prefer to
Hi Carl,
on 2023/4/14 03:42, Carl Love via Gcc-patches wrote:
>
> GCC maintainers:
>
> The following patch fixes the dg-options for test powerpc/rs600-
> fpint.c. The test now works correctly on Power 10. The patch has been
> tested on Power10 with no regressions.
>
> Please let me know if
After this patch, RVV GCC by default support alignment of RVV modes according
to riscv-modes.def.
In riscv-modes.def, we define each RVV modes are element align which is aligned
to RVV ISA spec.
If you want to support other alignment, you should add tunning info for this in
the future.
And the
From: Juzhe-Zhong
Since we are going to have fixed-point intrinsics that are modeling rounding
mode
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
We should have operand to specify rounding mode in fixed-point instructions.
We don't support these modeling rounding mode intrinsics
On the branch ranger isn't powerful enough to handle some cases
appearing with logical-op-non-short-circuit evaluating to false
causing FAILs of the testcase for ppc64le and s390x. The following
foces logical-op-non-short-circuit to true for this testcase
on the branch.
Tested on
I've put the preparation stmt in the wrong place.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/109848
* tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
TARGET_MEM_REF address preparation before the store, not
before the
Bootstrapped and regtested. Ok for mainline?
Stefan Schulze Frielinghaus (3):
s390: Refactor block operation cpymem
s390: Add block operation movmem
s390: Refactor block operation setmem
gcc/config/s390/s390-protos.h| 5 +-
gcc/config/s390/s390.cc | 301
On Fri, May 12, 2023 at 10:35 PM Eugene Rozenfeld
wrote:
>
> Thank you, Richard. I went with your suggestion. New patch:
>
>
> [PATCH] Disable warnings as errors for STAGEautofeedback.
>
> Compilation during STAGEautofeedback produces additional warnings
> since inlining decisions with
On Fri, May 12, 2023 at 10:54 PM Jason Merrill via Gcc-patches
wrote:
>
> In the context of the recent discussion, it occurred to me that this semantic
> would be useful, but currently there is no easy way to access it.
> Bikeshedding
> welcome; the use of this flag is a bit odd, but it has the
The following puts the dg-require-effective-target properly after
the dg-do.
Tested on ppc64le pushed to all affected branches.
* gcc.dg/vect/pr108950.c: Re-order dg-require-effective-target
and dg-do.
---
gcc/testsuite/gcc.dg/vect/pr108950.c | 2 +-
1 file changed, 1
Address comments.
Thanks.
juzhe.zh...@rivai.ai
From: Philipp Tomsich
Date: 2023-05-15 16:21
To: juzhe.zhong
CC: gcc-patches; kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; rdapp.gcc
Subject: Re: [PATCH] RISC-V: Add rounding mode operand for fixed-point patterns
On Mon, 15 May 2023 at
From: Pan Li
This patch is optimizing the AVL for VLS auto-vectorzation.
Given below sample code:
typedef int8_t vnx2qi __attribute__ ((vector_size (2)));
__attribute__ ((noipa)) void
f_vnx2qi (int8_t a, int8_t b, int8_t *out)
{
vnx2qi v = {a, b};
*(vnx2qi *) out = v;
}
Before this
From: Juzhe-Zhong
Address comments from Philipp.
Since we are going to have fixed-point intrinsics that are modeling rounding
mode
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
We should have operand to specify rounding mode in fixed-point instructions.
We don't support these
> After this patch, RVV GCC by default support alignment of RVV modes
> according to riscv-modes.def. In riscv-modes.def, we define each RVV
> modes are element align which is aligned to RVV ISA spec.
>
> If you want to support other alignment, you should add tunning info
> for this in the
Hi kito,
Per off-line sync with Juzhe, I can help the rest part of this PATCH, will try
the suggested approach and keep you posted.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Saturday, May 13, 2023 11:14 AM
To: juzhe.zh...@rivai.ai
Cc:
Hi Carl,
on 2023/4/14 01:58, Carl Love via Gcc-patches wrote:
> GCC maintainers:
>
> The following fix updates the expected instruction counts for the
> test int_128bit-runnable.c test. The counts changed as a result of a
> commit to support 128-bit integer divide and modulus. The change
>
Vectorize memset with a constant length of less than or equal to 64
bytes.
Do not perform a libc function call into memset in case the size is not
a compile-time constant but bounded and the upper bound is less than or
equal to 256 bytes.
gcc/ChangeLog:
* config/s390/s390-protos.h
Hi,
we need to discern what we want to achieve here. The goal might
be to prevent the vectorizer from performing peeling or versioning
for alignment. I realize the peeling code looks ugly but it's
actually for a good cause when the target does not support
misaligned vector access or only with
On 11/04/2023 15:23, Jørgen Kvalsvik wrote:
> On 05/12/2022 10:40, Jørgen Kvalsvik wrote:
>> This patch adds support in gcc+gcov for modified condition/decision
>> coverage (MC/DC) with the -fprofile-conditions flag. MC/DC is a type of
>> test/code coverage and it is particularly important in the
On Sun, May 14, 2023 at 9:00 PM Thomas Neumann via Gcc-patches
wrote:
>
> Dear Sören,
>
> > we ran into a regression introduced by these changes. The regression
> > manifests itself in a failing assertion in __deregister_frame_info_bases.
> > The assertion failure was observed while using
> we need to discern what we want to achieve here. The goal might
> be to prevent the vectorizer from performing peeling or versioning
> for alignment. I realize the peeling code looks ugly but it's
> actually for a good cause when the target does not support
> misaligned vector access or only
On Mon, 15 May 2023 at 10:18, wrote:
>
> From: Juzhe-Zhong
>
> Since we are going to have fixed-point intrinsics that are modeling rounding
> mode
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
>
> We should have operand to specify rounding mode in fixed-point instructions.
> We
LGTM, thanks :)
On Mon, May 15, 2023 at 4:33 PM Pan Li via Gcc-patches
wrote:
>
> From: Pan Li
>
> This patch is optimizing the AVL for VLS auto-vectorzation.
>
> Given below sample code:
>
> typedef int8_t vnx2qi __attribute__ ((vector_size (2)));
>
> __attribute__ ((noipa)) void
> f_vnx2qi
On Thu, May 04, 2023 at 01:54:46PM +0800, liuhongt wrote:
> r14-172-g0368d169492017 use NO_REGS instead of GENERAL_REGS in memory cost
> calculation when preferred register class is unkown.
> + /* Costs for NO_REGS are used in cost calculation on the
> +1st pass when the preferred
Committed. Thank you, Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, May 15, 2023 4:35 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang,
Yanzhang
Subject: Re: [PATCH v2] RISC-V: Optimize vsetvl AVL for VLS VLMAX
Hi all,
This instalment of the series goes through the vector comparison patterns in
the backend.
One wart are the int64x1_t comparisons that this patch doesn't touch.
Those are a bit trickier because they have define_insn_and_split mechanisms for
falling back to
GP reg comparisons after reload
In file included from /usr/include/features.h:515,
from /usr/include/bits/libc-header-start.h:33,
from /usr/include/stdint.h:26,
from
/daten/riscv64/gcc/gcc-20230512/Build/gcc/include/stdint.h:9,
from
I think it is the issue of include file.
Kito may know the better the solution instead of changing stdint.h into
stdint-gcc.h.
Thanks.
juzhe.zh...@rivai.ai
From: Andreas Schwab
Date: 2023-05-15 17:10
To: Robin Dapp via Gcc-patches
CC: juzhe.zh...@rivai.ai; Kito Cheng; Michael Collison;
On 15 May 2023 10:25:30 CEST, "juzhe.zh...@rivai.ai"
wrote:
>Address comments.
s/VXRM_RENUM/VXRM_REGNUM/g
thanks,
From: Yannick Moy
Pragma Warnings On/Off with a preceding toolname (which could be GNAT
or GNATprove) was ignored due an error in accessing the expression of
a pragma association in the parser. Now fixed.
gcc/ada/
* par-prag.adb (First_Arg_Is_Matching_Tool_Name): Fix access to
From: Eric Botcazou
This plugs a small loophole in the procedure responsible for attempting to
hide entities that have been previously made public by the semantic analyzer
in package bodies.
gcc/ada/
* sem_ch7.adb (Hide_Public_Entities): Use the same condition for
subprogram
From: Bob Duff
We shouldn't raise Bad_Attribute if there is no error.
This patch adds a call to Check_Error_Detected to make sure that's true.
(There are other cases where we raise Bad_Attribute;
this patch doesn't try to fix them all.)
gcc/ada/
* sem_attr.adb
From: Bob Duff
Proc_Next_Component_Or_Discriminant was duplicating the code
in Next_Component_Or_Discriminant.
gcc/ada/
* einfo-utils.adb:
(Proc_Next_Component_Or_Discriminant): Call
Next_Component_Or_Discriminant.
Tested on x86_64-pc-linux-gnu, committed on master.
From: Bob Duff
This package was using the Ada 83 renaming idiom for inlining
Next_Component and other Next_... procedures without inlining the
same-named functions. Using the Inline aspect avoids that sort
of horsing around.
We change all the other pragmas Inline in this package to aspects
as
From: Bob Duff
Clarify that "act as scope" overlaps with "[sub]type".
gcc/ada/
* einfo.ads:
(First_Entity): Update comment explaining why this exists on all
[sub]types, as opposed to just the ones with associated entities.
Tested on x86_64-pc-linux-gnu, committed on
From: Yannick Moy
GNATprove reports possible non-terminating loops in functions
marked as terminating. Add loop variants to prove loop termination.
gcc/ada/
* libgnat/i-c.adb: Add loop variants. Remove useless
initialization.
Tested on x86_64-pc-linux-gnu, committed on master.
From: Yannick Moy
Changes needed to make proof go through, after some change in
GNAT and SPARK.
gcc/ada/
* libgnat/a-strsup.adb (Super_Slice): Reorder component assignment
to avoid failing predicate check related to initialization.
* libgnat/s-expmod.adb (Exp_Modular):
gcc/ada/
* exp_ch3.adb (Make_Allocator_For_Return): Fix typo in comment.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_ch3.adb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/ada/exp_ch3.adb b/gcc/ada/exp_ch3.adb
index
On Fri, Mar 24, 2023 at 04:30:38PM +0100, Frederik Harwath wrote:
> this patch series implements the OpenMP 5.1 "unroll" and "tile"
> constructs. It includes changes to the C,C++, and Fortran front end
> for parsing the new constructs and a new middle-end
> "omp_transform_loops" pass which
On Fri, 12 May 2023, Richard Sandiford wrote:
> Richard Biener writes:
> > On Fri, 12 May 2023, Andre Vieira (lists) wrote:
> >
> >> I have dealt with, I think..., most of your comments. There's quite a few
> >> changes, I think it's all a bit simpler now. I made some other changes to
> >> the
No, ARM SVE is 128bit alignment instead of element align (in aarch64-modes.def).
If you want to tune the alignment, you should add tunning info into
riscv-modes.def
instead of this target hook.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-05-15 16:58
To: juzhe.zh...@rivai.ai;
On Wed, Dec 21, 2022 at 2:12 PM Dimitrije Milošević
wrote:
>
> When there are enough registers, the register pressure cost is
> unnecessarily bumped by adding another n_cands.
>
> This behavior may result in register pressure costs for the case
> when there are enough registers being higher than
On Mon, 15 May 2023, Richard Sandiford wrote:
> Richard Biener writes:
> > On Fri, 12 May 2023, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >> > On Fri, 12 May 2023, Andre Vieira (lists) wrote:
> >> >
> >> >> I have dealt with, I think..., most of your comments. There's quite a
Hi all,
We are missing cases for combining of FACGE/FACGT instructions. In the testcase
of the patch we generate:
foo:
fabsv3.4s, v0.4s
fabsv0.4s, v1.4s
fabsv1.4s, v2.4s
fcmgt v0.4s, v3.4s, v0.4s
fcmgt v1.4s, v3.4s, v1.4s
b g
On Mon, May 15, 2023 at 12:35 PM Aldy Hernandez wrote:
>
>
> We can now have int_range for automatically
> resizable ranges. int_range_max is now int_range<3, true>
> for a 69X reduction in size from current trunk, and 6.9X reduction from
> GCC12. This incurs a 5% performance penalty for VRP
Address comments.
juzhe.zh...@rivai.ai
From: Bernhard Reutner-Fischer
Date: 2023-05-15 17:22
To: juzhe.zh...@rivai.ai; philipp.tomsich
CC: gcc-patches; kito.cheng; Kito.cheng; palmer; palmer; jeffreyalaw; Robin Dapp
Subject: Re: Re: [PATCH] RISC-V: Add rounding mode operand for fixed-point
From: Javier Miranda
gcc/ada/
* doc/gnat_rm/implementation_defined_pragmas.rst
(Extensions_Allowed): Document string interpolation.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
Tested on x86_64-pc-linux-gnu, committed on master.
---
From: Piotr Trojanek
When flag More_Ids is set on a node, then syntactic children will have
their Parent link set to the last node in the chain of Mode_Ids.
For example, parameter associations in declaration like:
procedure P (X, Y : T);
will have More_Ids set for "X", Prev_Ids set on "Y"
From: Ronan Desplanques
Before this patch, Set_Can_Use_Internal_Rep was called on access
to subprogram subtypes when instantiating Unchecked_Conversion
from System.Address to an access to subprogram subtype (or the
reverse). This was incorrect and caused an assertion failure.
This patch fixes
From: Claire Dross
Use cut operations to restore the proof of System.Value*.
gcc/ada/
* libgnat/s-valueu.adb: Use cut operations inside assertion to
restore proofs
* gcc-interface/Make-lang.in (GNAT_ADA_OBJS): Add s-spark and
s-spcuop dependencies.
Tested on
From: Ronan Desplanques
gcc/ada/
* doc/gnat_rm/implementation_defined_characteristics.rst: Fix
minor documentation formatting issue.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
Tested on x86_64-pc-linux-gnu, committed on master.
---
From: Yannick Moy
Pragma Annotate is now allowed between loop pragmas, in order to
be able to justify separate loop checks in GNATprove.
gcc/ada/
* sem_prag.adb (Check_Grouping): Allow Annotate pragmas between
loop pragmas.
Tested on x86_64-pc-linux-gnu, committed on master.
From: Bob Duff
Fix all the failures caused by enabling Check_Vanishing_Fields on
entities in all cases except the case of converting to or from E_Void.
But leave Check_Vanishing_Fields disabled by default (controlled by
-gnatd_v flag), because it might be too slow even for assertions-on
mode,
From: Ronan Desplanques
gcc/ada/
* sem_ch8.adb (End_Scope): Simplify lookup of predecessor in
homonym chain.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_ch8.adb | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/gcc/ada/sem_ch8.adb
From: Piotr Trojanek
Calls to First on No_List intentionally return Empty node, so explicit
guards against No_List are unnecessary. Code cleanup; semantics is
unaffected.
gcc/ada/
* sem_util.adb (New_Copy_Tree): Remove redundant calls to Present.
Tested on x86_64-pc-linux-gnu,
> && DECL_RETURN_VALUE_P (inner))
> diff --git a/gcc/ada/gcc-interface/utils.cc b/gcc/ada/gcc-interface/utils.cc
> index 0c4f8b90c8e..460ef6f1f01 100644
> --- a/gcc/ada/gcc-interface/utils.cc
> +++ b/gcc/ada/gcc-interface/utils.cc
> @@ -1966,7 +1966,7 @@ finish_record_type (tree
We can now have int_range for automatically
resizable ranges. int_range_max is now int_range<3, true>
for a 69X reduction in size from current trunk, and 6.9X reduction from
GCC12. This incurs a 5% performance penalty for VRP that is more than
covered by our > 13% improvements recently.
On Mon, May 15, 2023 at 12:19:00PM +0200, Jakub Jelinek via Gcc-patches wrote:
> For C++ in templates we obviously need to defer that until instantiations,
> the constants in the clauses etc. could be template parameters etc.
Even in C++ the how many canonical loop nest form loops does this
Richard Biener writes:
> On Mon, 15 May 2023, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > But I'm also not sure
>> > how much of that is really needed (it seems to be tied around
>> > optimizing optabs space?)
>>
>> Not sure what you mean by "this". Optabs space shouldn't be a
From: Joel Brobecker
This commit updates the Linux-specific chapter to add a new section
documenting the fact that PIE is enabled by default, and provides
some information about the impact that this might have on some
projects, as well as recommendations on how to handle issues.
gcc/ada/
From: Bob Duff
The compiler usually turns 2**N into Shift_Left(1,N).
This patch removes the check for "shift amount too big" in the
modular case, because Shift_Left works properly in that case
(i.e. if N is very large, it returns 0).
This removes a redundant check on most hardware; Shift_Left
From: Javier Miranda
gcc/ada/
* exp_disp.adb
(Has_Dispatching_Constructor_Call): New subprogram.
(Expand_Interface_Conversion): No need to perform dynamic
interface conversion when the operand and the target type are
interface types and the target
From: Piotr Trojanek
Attribute Initialized is expanded into Valid_Scalars, which can't work
on unchecked unions, so Initialized on unchecked unions needs to be
rejected before expansion.
gcc/ada/
* sem_attr.adb (Analyze_Attribute): Reject attribute Initialized
on unchecked
From: Eric Botcazou
This fixes the output of -gnatRj for an extension of a tagged type which has
a variant part and also deals with the case where the parent type is private
with unknown discriminants.
gcc/ada/
* repinfo.ads (JSON output format): Document special case of
From: Steve Baird
Generate a warning if a static predicate tests for a value that
does not belong to the parent subtype. For example, in
subtype S is Positive with Static_Predicate => S not in 0 | 11 | 222;
the 0 is ineffective because Positive already excludes that value.
Generation of this
From: Yannick Moy
gcc/ada/
* sem_attr.adb: Update comment referring to rule number.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_attr.adb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
index
From: Bob Duff
Correction to previous check-in: Remove comment about
Proc_Next_... procedures, which were deleted.
gcc/ada/
* einfo-utils.ads: Remove comment.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/einfo-utils.ads | 4 +---
1 file changed, 1 insertion(+), 3
From: Ronan Desplanques
Before this patch, the front end failed to catch many illegal uses
of access attributes of task types.
This patch makes referring to the access attributes of a task type
raise an error, except in the current instance case defined in
clause 8.6 of the reference manual.
From: Piotr Trojanek
When inlining subprogram calls in GNATprove mode, the actual parameter
is wrapped in an unchecked conversion. If this actual parameter is an
aggregate OTHERS clause, then the type of unchecked conversion allows us
to resolve this clause (just like for aggregates wrapped in a
From: Yannick Moy
String-manipulating functions should always terminate. Add justification
for the termination of Mapping function parameter, and loop variants
where needed. This is needed for GNATprove to prove termination.
gcc/ada/
* libgnat/a-strbou.ads: Add justifications for
From: Ronan Desplanques
gcc/ada/
* doc/gnat_ugn/gnat_utility_programs.rst: Fix formatting
inconsistency.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
> -Original Message-
> From: Richard Sandiford
> Sent: Monday, May 15, 2023 10:01 AM
> To: Evandro Menezes via Gcc-patches
> Cc: evandro+...@gcc.gnu.org; Evandro Menezes ;
> Kyrylo Tkachov ; Tamar Christina
>
> Subject: Re: [PATCH] aarch64: Add SVE instruction types
>
> Evandro
From: Juzhe-Zhong
Since we are going to have fixed-point intrinsics that are modeling rounding
mode
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
We should have operand to specify rounding mode in fixed-point instructions.
We don't support these modeling rounding mode intrinsics
On Mon, May 15, 2023 at 12:35:23PM +0200, Aldy Hernandez wrote:
> gcc/ChangeLog:
>
> PR tree-optimization/109695
> * value-range.cc (irange::operator=): Resize range.
> (irange::union_): Same.
> (irange::intersect): Same.
> (irange::invert): Same.
>
Richard Biener writes:
> On Fri, 12 May 2023, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > On Fri, 12 May 2023, Andre Vieira (lists) wrote:
>> >
>> >> I have dealt with, I think..., most of your comments. There's quite a few
>> >> changes, I think it's all a bit simpler now. I made
On Mon, May 15, 2023 at 01:08:51PM +0200, Richard Biener wrote:
> Btw, why's there a trailing underscore for union but not intersect?
Because union is a C++ keyword, while intersect is not.
Jakub
From: Juzhe-Zhong
This patch is adding rounding mode operand and FRM_REGNUM dependency
into floating-point instructions.
The floating-point instructions we added FRM and rounding mode operand:
1. vfadd/vfsub
2. vfwadd/vfwsub
3. vfmul
4. vfdiv
5. vfwmul
6. vfwmacc/vfwnmacc/vfwmsac/vfwnmsac
7.
On Friday 12 May 2023 at 11:32:56 +0100, Jonathan Wakely wrote:
> On Fri, 12 May 2023 at 11:30, Mike Crowe wrote:
> > On Thursday 11 May 2023 at 21:52:22 +0100, Jonathan Wakely wrote:
> > > On Thu, 11 May 2023 at 13:42, Jonathan Wakely
> > wrote:
> > > > On Thu, 11 May 2023 at 13:19, Mike Crowe
From: Juzhe-Zhong
This patch is adding FRM and rounding mode into floating-point ternary
instructions.
This patch should be merged after optabs.cc patch.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc
(function_expander::use_ternop_insn): Add default rounding mode.
*
On Mon, 15 May 2023, Andre Vieira (lists) wrote:
>
>
> On 15/05/2023 12:01, Richard Biener wrote:
> > On Mon, 15 May 2023, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >>> On Fri, 12 May 2023, Richard Sandiford wrote:
> >>>
> Richard Biener writes:
> > On Fri, 12 May
From: Juzhe-Zhong
Hi, Richi.
We (RVV) is going to add a rounding mode operand into floating-point
instructions
which have 11 operands.
Since we are going have intrinsic that is adding rounding mode argument:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226
This is the patch that
From: Oluwatamilore Adebayo
Sent: Wednesday, May 10, 2023 14:29
To: Richard Biener ; gcc-patches@gcc.gnu.org;
Richard Sandiford
Subject: Re: [PATCH] vect: Missed opportunity to use [SU]ABD
When using inputs of 0x7fff and 0x8000 the result yielded is -1.
When using inputs of -1 and 0x7fff the
On 15/05/2023 12:01, Richard Biener wrote:
On Mon, 15 May 2023, Richard Sandiford wrote:
Richard Biener writes:
On Fri, 12 May 2023, Richard Sandiford wrote:
Richard Biener writes:
On Fri, 12 May 2023, Andre Vieira (lists) wrote:
I have dealt with, I think..., most of your comments.
From: Juzhe-Zhong
This patch is adding FRM and rounding mode into floating-point ternary
instructions.
This patch should be merged after optabs.cc patch.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc
(function_expander::use_ternop_insn): Add default rounding mode.
*
On Mon, May 15, 2023 at 12:44 PM Richard Biener
wrote:
>
> On Wed, Dec 21, 2022 at 2:12 PM Dimitrije Milošević
> wrote:
> >
> > When there are enough registers, the register pressure cost is
> > unnecessarily bumped by adding another n_cands.
> >
> > This behavior may result in register pressure
> -Original Message-
> From: Gcc-patches bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Richard Biener
> via Gcc-patches
> Sent: Monday, May 15, 2023 8:59 AM
> To: Thomas Neumann
> Cc: Sören Tempel ; gcc-patches@gcc.gnu.org;
> al...@ayaya.dev
> Subject: Re: [PATCH] Fix
On Mon, 15 May 2023, juzhe.zh...@rivai.ai wrote:
> From: Juzhe-Zhong
>
> Hi, Richi.
>
> We (RVV) is going to add a rounding mode operand into floating-point
> instructions
> which have 11 operands.
>
> Since we are going have intrinsic that is adding rounding mode argument:
>
Hello, this patch breaks the build on targets where range is not declared i.e.
where the #ifdef ATOMIC_FDE_FAST_PATH path is not taken.
argh, I did not realize I tested the patch only on atomic fast path
platforms. The patch below fixes that by moving the check inside the #ifdef.
I will
On Fri, May 12, 2023 at 11:05 AM Cui, Lili wrote:
>
> > ISTR there were no sufficient comments in the code explaining why
> > rewrite_expr_tree_parallel_for_fma is better by design. In fact ...
> >
> > >
> > > >
> > > > > if (!reassoc_insert_powi_p
> > > > > -
This patch adds the 'Zfa' extension for riscv, which is based on:
https://github.com/riscv/riscv-isa-manual/commits/zfb
The binutils-gdb for 'Zfa' extension:
https://sourceware.org/pipermail/binutils/2023-April/127060.html
What needs special explanation is:
1, The immediate number of the
On 5/15/23 16:24, Bernhard Reutner-Fischer wrote:
On Mon, 15 May 2023 12:35:23 +0200
Aldy Hernandez via Gcc-patches wrote:
+// For resizable ranges, resize the range up to HARD_MAX_RANGES if the
+// NEEDED pairs is greater than the current capacity of the range.
+
+inline void
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