Re: [RFC] libstdc++: Make --enable-libstdcxx-backtrace=auto default to yes

2023-09-06 Thread Hans-Peter Nilsson via Gcc-patches
> Date: Thu, 7 Sep 2023 00:11:04 +0100 > From: Jonathan Wakely via Gcc-patches > On Thu, 7 Sept 2023 at 00:10, Jonathan Wakely wrote: > > I don't think there's a bug. $is_hosted is true for > > --enable-hosted-libstdcxx which is on by default. > > And IIRC __STDC_HOSTED__ is defined unless you

Re: [PATCH 3/5] RISC-V: Add Types to Un-Typed Zicond Instructions

2023-09-06 Thread Tsukasa OI via Gcc-patches
On 2023/09/07 2:50, Edwin Lu wrote: > This patch creates a new "zicond" type and updates all zicond instructions > with that type. > > gcc/ChangeLog: > > * config/riscv/riscv.md: Add "zicond" type > * config/riscv/zicond.md: Update types > > Signed-off-by: Edwin Lu > --- > gcc/conf

Re: [PATCH v3] RISC-V:Optimize the MASK opt generation

2023-09-06 Thread Tsukasa OI via Gcc-patches
Hi, I will need to notify you that x_riscv_xventana_subext, MASK_XVENTANACONDOPS and TARGET_XVENTANACONDOPS are added (I think you want to rewrite those definitions like the rest). Also, be careful not to remove TARGET_ZICOND_LIKE. Thanks, Tsukasa On 2023/09/06 11:02, Feng Wang wrote: > This pa

Re: Re: [PATCH v3] RISC-V:Optimize the MASK opt generation

2023-09-06 Thread Feng Wang
Thanks reminder, I should rebase again. -- Feng Wang >Hi, > >I will need to notify you that x_riscv_xventana_subext, >MASK_XVENTANACONDOPS and TARGET_XVENTANACONDOPS are added (I think you >want to rewrite those definitions like the rest).  Also, be careful not >to remove TARGET_ZICOND_

Re: [PATCH v1 1/4] LoongArch: Add tests of -mstrict-align option.

2023-09-06 Thread chenglulu
在 2023/9/6 下午7:10, Xi Ruoyao 写道: On Wed, 2023-09-06 at 18:43 +0800, Xiaolong Chen wrote: gcc/testsuite/ChangeLog: * gcc.target/loongarch/strict-align.c: New test. A question: is there really a CPU model with LSX/LASX but without unaligned access support? If not I think we'd just re

[PATCH] Support vpermw/vpermi2w/vpermt2w instructions for vector HF/BFmodes.

2023-09-06 Thread liuhongt via Gcc-patches
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: * config/i386/sse.md (_vpermt2var3): New define_insn. (VHFBF_AVX512VL): New mode iterator. (VI2HFBF_AVX512VL): New mode iterator. --- gcc/config/i386/sse.md | 32

Re: [PATCH] LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]

2023-09-06 Thread chenglulu
在 2023/9/6 下午6:58, Xi Ruoyao 写道: Forgot to mention: I've bootstrapped and regtested this patch on loongarch64-linux-gnu (with PR110939 patch applied to unbreak the bootstrapping). Ok for trunk? LGTM! Thanks! On Wed, 2023-09-06 at 18:46 +0800, Xi Ruoyao wrote: If mask is a constant with

[RFC PATCH 0/2] RISC-V: Change RISC-V bit manipulation / scalar crypto builtin types

2023-09-06 Thread Tsukasa OI via Gcc-patches
Hello, Many RISC-V builtins operate in signed integer types but in many cases, they are better to be unsigned. There are a few reasons to do that: 1. Being more natural For bit manipulation operations, the direct input and the result should have an unsigned type. e.g. __builtin_bswa

[RFC PATCH 1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned

2023-09-06 Thread Tsukasa OI via Gcc-patches
From: Tsukasa OI For bit manipulation operations, inputs and the manipulated output are better to be unsigned like other target-independent builtins like __builtin_bswap32 and __builtin_popcount. Although this is not completely compatible as before (as the type changes), most code will run norma

[RFC PATCH 2/2] RISC-V: Update testsuite for type-changed builtins

2023-09-06 Thread Tsukasa OI via Gcc-patches
From: Tsukasa OI This commit replaces the type of the builtin used in the testsuite. Even without this commit, it won't cause any test failures but changed so that no confusion occurs. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbc32.c: Make signed type to unsigned. * gcc.targ

[PATCH v4] RISC-V:Optimize the MASK opt generation

2023-09-06 Thread Feng Wang
This patch rebases the change of "[PATCH] RISC-V: Optimize the MASK opt generation" and add the new explanation in the options.texi. gcc/ChangeLog: * config/riscv/riscv-opts.h (MASK_ZICSR): (MASK_ZIFENCEI): Delete; (MASK_ZIHINTNTL):Ditto; (MASK_ZIHINTPAUSE):

Re: [PATCH v1 4/4] LoongArch: Add tests for Loongson SX floating-point conversion instructions.

2023-09-06 Thread chenxiaolong
在 2023-09-06三的 18:56 +0800,Xi Ruoyao写道: > On Wed, 2023-09-06 at 18:45 +0800, Xiaolong Chen wrote: > > + *((int*)& __m128_op0[3]) = 0x004200a0; > > + *((int*)& __m128_op0[2]) = 0x; > > + *((int*)& __m128_op0[1]) = 0x004200a0; > > + *((int*)& __m128_op0[0]) = 0x0021; > > These are al

Re: [PATCH] LoongArch: Link c++ header directory in the default ABI to the toplevel.

2023-09-06 Thread Yang Yujie
On Wed, Sep 06, 2023 at 06:38:25PM +0800, Xi Ruoyao wrote: > On Wed, 2023-09-06 at 18:06 +0800, Yang Yujie wrote: > > When multilib is enabled, the c++ header directory of the default multilib > > variant needs to be linked to the toplevel since g++ does not search the > > toplevel in this case. >

Re: [PATCH v3] RISC-V: Add autovec FP binary operations.

2023-09-06 Thread Lehua Ding
Hi Robin, Yes, you're right, this should not be necessary. This is more of a test for the execution environment than the compiler. I think Juzhe removed it already in his patch that enables the vector test suite. In the future we would use the checks that Joern added, not sure if they are alre

[PATCH] Checking undefined_p before using the vr

2023-09-06 Thread Jiufu Guo via Gcc-patches
Hi, As discussed in PR111303: For pattern "(X + C) / N": "div (plus@3 @0 INTEGER_CST@1) INTEGER_CST@2)", Even if "X" has value-range and "X + C" does not overflow, "@3" may still be undefined. Like below example: _3 = _2 + -5; if (0 != 0) goto ; [34.00%] else goto ; [66.00%] ;; succ:

[PATCH] RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]

2023-09-06 Thread Juzhe-Zhong
This patch removes the incorrect earliest poset vsetvl optimization, such bug was found in vect-double-reduc-5.c which is runtime(execution fail) and also in PR111313. For VLMAX intrinsics, we always emit a bogus patter which is vlmax_avl (see vector.md) to occupy a scalar register which is used

Re: [PATCH] RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]

2023-09-06 Thread Kito Cheng via Gcc-patches
LGTM Juzhe-Zhong 於 2023年9月7日 週四 11:36 寫道: > This patch removes the incorrect earliest poset vsetvl optimization, > such bug was found in vect-double-reduc-5.c which is runtime(execution > fail) and also in PR111313. > > For VLMAX intrinsics, we always emit a bogus patter which is vlmax_avl > (se

RE: [PATCH] RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]

2023-09-06 Thread Li, Pan2 via Gcc-patches
Committed, thanks Kito. Pan -Original Message- From: Gcc-patches On Behalf Of Kito Cheng via Gcc-patches Sent: Thursday, September 7, 2023 11:39 AM To: Juzhe-Zhong Cc: GCC Patches ; Kito Cheng Subject: Re: [PATCH] RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]

Re: [PATCH 01/13] [APX EGPR] middle-end: Add insn argument to base_reg_class

2023-09-06 Thread Uros Bizjak via Gcc-patches
On Wed, Sep 6, 2023 at 9:43 PM Vladimir Makarov wrote: > > > On 9/1/23 05:07, Hongyu Wang wrote: > > Uros Bizjak via Gcc-patches 于2023年8月31日周四 18:16写道: > >> On Thu, Aug 31, 2023 at 10:20 AM Hongyu Wang wrote: > >>> From: Kong Lingling > >>> > >>> Current reload infrastructure does not support s

[PATCH v2] LoongArch: Adjust C++ multilib header layout.

2023-09-06 Thread Yang Yujie
For LoongArch, the toplevel library build is always aliased to one of the multilib variants. This patch installs it with the actual MULTISUBDIR (instead of ".") so that the headers can be reached by the compiler. This patch is an update of https://gcc.gnu.org/pipermail/gcc-patches/2023-September/

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