Re: [PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

LGTM from myside. Give another a few more days that some one want to chime in. juzhe.zh...@rivai.ai From: Jun Sha (Joshua) Date: 2024-01-10 14:51 To: gcc-patches CC: jim.wilson.gcc; palmer; andrew; philipp.tomsich; jeffreyalaw; christoph.muellner; juzhe.zhong; Jun Sha (Joshua); Jin Ma;

[PATCH][wwwdoc] gcc-14: Add arm cortex-m52 cpu support

Hi Gerald, The Arm Cortex-M52 CPU has been added to the upstream: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642230.html I would like to document this on the gcc-14 changes.html page. Attached is the patch for gcc-wwwdocs repository. Is it OK? Regards, jasonwucjFrom

RE: [PATCH] RISC-V: Refine unsigned avg_floor/avg_ceil

Committed, thanks Kito. Pan -Original Message- From: Kito Cheng Sent: Wednesday, January 10, 2024 3:12 PM To: Juzhe-Zhong Cc: gcc-patches@gcc.gnu.org; kito.ch...@sifive.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH] RISC-V: Refine unsigned avg_floor/avg_ceil

[PATCH] i386: Add AVX10.1 related macros

Hi all, This patch aims to add AVX10.1 related macros for libgomp's request. The request comes following: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642025.html Ok for trunk? Thx, Haochen gcc/ChangeLog: PR target/113288 * config/i386/i386-c.cc

[PATCH v2] LoongArch: testsuite:Added support for loongarch.

The function of this test is to check that the compiler supports vectorization using SLP and vec_{load/store/*}_lanes. However, vec_{load/store/*}_lanes are not supported on LoongArch, such as the corresponding "st4/ld4" directives on aarch64. gcc/testsuite/ChangeLog: *

[PATCH v1] LoongArch: testsuite:Fixed a bug that added a target check error.

After the code is committed in r14-6948, GCC regression testing on some architectures will produce the following error: "error executing dg-final: unknown effective target keyword `loongarch*-*-*'" gcc/testsuite/ChangeLog: * lib/target-supports.exp: Removed an issue with "target

Re：Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector

These xttheadvector speical intrinsics are different from rvv1.0 in determining function name from base name. We cannot directly reuse the existing shapes. In order not to invade existing shapes, we add new shapes for new functions. Also, we create new thead-vector-builtins.cc for xtheadvector

回复：Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector

For example +/* th_loadstore_width_def class. */ +struct th_loadstore_width_def : public build_base +{ + void build (function_builder , + const function_group_info ) const override + { +/* Report an error if there is no xtheadvector. */ +if (!TARGET_XTHEADVECTOR) +

Re：Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector

I'm confused why I cannot add new shapes. I think adding new shapes is the basic part in implementation for new intrinsics. -- 发件人：juzhe.zh...@rivai.ai 发送时间：2024年1月10日(星期三) 15:17 收件人："cooper.joshua"; "gcc-patches" 抄　送：Jim

[PATCH] Document refactoring of the option -fcf-protection=x.

To override -fcf-protection, -fcf-protection=none needs to be added and then with -fcf-protection=xxx. --- htdocs/gcc-14/changes.html | 6 ++ 1 file changed, 6 insertions(+) diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index e3a68998..72b0d291 100644 ---

Re: Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector

Why do you add theadvector shapes ? I think you can reuse the current existing shapes. +thead-vector-builtins.o: \ + $(srcdir)/config/riscv/thead-vector-builtins.cc \ + $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \ + $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H)

Re: Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector

Why do you need to invade existing shapes ? juzhe.zh...@rivai.ai 发件人： joshua 发送时间： 2024-01-10 15:16 收件人： juzhe.zh...@rivai.ai; gcc-patches 抄送： Jim Wilson; palmer; andrew; philipp.tomsich; jeffreyalaw; christoph.muellner; jinma; cooper.qu 主题： Re：Re：[PATCH v5] RISC-V: Handle differences

Re: [PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

+ (and (eq_attr "group_overlap" "th") + (match_test "TARGET_XTHEADVECTOR")) + (const_string "no") + + (and (eq_attr "group_overlap" "rvv") + (match_test "TARGET_VECTOR && !TARGET_XTHEADVECTOR")) + (const_string "no") + ] Change it into: + (and (eq_attr "group_overlap"

[PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

For th.vmadc/th.vmsbc as well as narrowing arithmetic instructions and floating-point compare instructions, an illegal instruction exception will be raised if the destination vector register overlaps a source vector register group. To handle this issue, we use "group_overlap" and "enabled"

Re: Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector

https://gcc.gnu.org/pipermail/gcc-patches/2024-January/641733.html This patch is ok from my side. juzhe.zh...@rivai.ai 发件人： joshua 发送时间： 2024-01-10 10:57 收件人： juzhe.zh...@rivai.ai; gcc-patches 抄送： Jim Wilson; palmer; andrew; philipp.tomsich; jeffreyalaw; christoph.muellner; jinma;

Re: [PATCH] RISC-V: Refine unsigned avg_floor/avg_ceil

LGTM! On Wed, Jan 10, 2024 at 1:05 PM Juzhe-Zhong wrote: > > This patch is inspired by LLVM patches: > https://github.com/llvm/llvm-project/pull/76550 > https://github.com/llvm/llvm-project/pull/77473 > > Use vaaddu for AVG vectorization. > > Before this patch: > > vsetivli

[PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

For th.vmadc/th.vmsbc as well as narrowing arithmetic instructions and floating-point compare instructions, an illegal instruction exception will be raised if the destination vector register overlaps a source vector register group. To handle this issue, we use "group_overlap" and "enabled"

[PATCH] c++: side effect in nullptr_t conversion fix

According C++ standard [conv.lval]p3.1: If T is cv std::nullptr_t, the result is a null pointer constant. [Note: Since the conversion does not access the object to which the glvalue refers, there is no side effect even if T is volatile-qualified, and the glvalue can refer to an inactive member of

[PATCH] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]

Hi, In r14-6604-gd7ee988c491cde43d04fe25f2b3dbad9d85ded45 we changed the CFI notes attached to callee saves (in aarch64_save_callee_saves). That patch changed the ldp/stp representation to use unspecs instead of PARALLEL moves. This meant that we needed to attach CFI notes to all frame-related

Re: [PATCH]middle-end: check if target can do extract first for early breaks [PR113199]

On Tue, Jan 9, 2024 at 4:13 AM Richard Biener wrote: > > On Tue, 9 Jan 2024, Tamar Christina wrote: > > > > > - > > > > - gimple_seq_add_seq (, tem); > > > > - > > > > - scalar_res = gimple_build (, CFN_EXTRACT_LAST, scalar_type, > > > > - mask, vec_lhs_phi); >

Re: [PATCH V3 0/3] RISC-V: Add intrinsics for Bitmanip and Scalar Crypto extensions

The tests still fail. gcc: Unexpected fails for rv64gc lp64d medlow FAIL: gcc.target/riscv/scalar_bitmanip_intrinsic-32.c -O0 (test for excess errors) FAIL: gcc.target/riscv/scalar_bitmanip_intrinsic-32.c -O1 (test for excess errors) FAIL: gcc.target/riscv/scalar_bitmanip_intrinsic-32.c

Re: [PATCH 3/7] Lockfile.

Hi, > You do not implement GCOV_LINKED_WITH_LOCKING patch, does locking work > with mingw? Or we only build gcc with cygwin emulation layer these days? I tried to test _locking implementation with both mingw and msys2, in both cases fcntl was present and _locking was not. Admittedly I was unable

[committed] Fix minor bug on mn103 port

Richard Sandiford debugged a failure on the mn103 port with his late-combine patches down to the subdi3 pattern not specifying the isa on alternatives which required newer variants of the chip family. This patch adds the missing isa attribute and the port now works with his late-combine

[committed] Fix minor bug in epiphany port

So I consider this port dead as it semi-randomly fails in reload due to unrelated changes earlier in the gimple and RTL pipelines. Regardless Richard S's late-combine work did show a very obvious error in the port that we should go ahead and fix as long as the port is in-tree. The epiphany

Re: [PATCH] SECURITY.txt: Drop "exploitable" in reference to hardening issues

On 2023-12-18 09:35, Siddhesh Poyarekar wrote: The "exploitable vulnerability" may lead to a misunderstanding that missed hardening issues are considered vulnerabilities, just that they're not exploitable.  This is not true, since while hardening bugs may be security-relevant, the absence of

Re: [PATCH] SECURITY.txt: Drop "exploitable" in reference to hardening issues

> Am 09.01.2024 um 16:13 schrieb Siddhesh Poyarekar : > > On 2023-12-18 09:35, Siddhesh Poyarekar wrote: >> The "exploitable vulnerability" may lead to a misunderstanding that missed >> hardening issues are considered vulnerabilities, just that they're not >> exploitable. This is not true,

Re: [PATCH]middle-end: check if target can do extract first for early breaks [PR113199]

Richard Biener writes: > On Tue, 9 Jan 2024, Tamar Christina wrote: > >> > > - >> > > - gimple_seq_add_seq (, tem); >> > > - >> > > - scalar_res = gimple_build (, CFN_EXTRACT_LAST, scalar_type, >> > > - mask, vec_lhs_phi); >> > > +scalar_res =

[PATCH][committed]middle-end: removed unused variable in vectorizable_live_operation_1

Hi All, It looks like the previous patch had an unused variable. It's odd that my bootstrap didn't catch it (I'm assuming -Werror is still on for O3 bootstraps) but this fixes it. Committed to fix bootstrap. Thanks, Tamar gcc/ChangeLog: * tree-vect-loop.cc

[PATCH] hwasan: Check if Intel LAM_U57 is enabled

When -fsanitize=hwaddress is used, libhwasan will try to enable LAM_U57 in the startup code. Update the target check to enable hwaddress tests if LAM_U57 is enabled. Also compile hwaddress tests with -mlam=u57 on x86-64 since hwasan requires LAM_U57 on x86-64. * lib/hwasan-dg.exp

[committed] libstdc++: Simplify some chrono formatters

Tested aarch64-linux. Pushed to trunk. -- >8 -- I don't remember exactly why I made these bits of code reserve space in a COW string and append to it, rather than just use the string returned from std::format (which will undergo copy elision). The _Str_sink type used by std::format means the

Re: [PATCH] libgccjit: Implement sizeof operator

On Fri, 2023-12-22 at 10:25 -0500, Antoni Boucher wrote: > Hi. > This patch adds the support of the sizeof operator. > I was wondering if this new API entrypoint should take a location as > a > parameter. What do you think? I'd prefer it if it did (even if it's currently ignored internally), but

Re: [PATCH] libgccjit: Add missing builtins needed by optimizations

On Fri, 2023-12-22 at 09:39 -0500, Antoni Boucher wrote: > Hi. > This patch adds missing builtins needed by optimizations. > Thanks for the review. The patch looks good to me. Thanks! Dave

[committed] Adding missing prototype for __clzhi2 to xstormy port

xstormy16 has failed since the c99 transition due to a missing prototype for __clzhi2 in the implementation of storm16_count_loaading_zeros. This fixes the missing prototype. Pushed to the trunk. jeffcommit 9f7afa99c67f039e43019ebd08d14a7f01e2d89c Author: Jeff Law Date: Tue Jan 9 10:21:28

Re: [PATCH] sparc: Char arrays are 64-bit aligned on SPARC

> Hello Eric! Thank you for reviewing the patches! You're welcome. > No, this warning is not from GCC, it is from binutils ld. I forgot to > mention that in the message. I get a similar warning from older versions > of ld, so I do not think it is a new warning. It is also there with GCC 10. I

Fix PR rtl-optimization/113140

This is a small regression present on the mainline and 13 branch, although the underlying problem has probably been there for ages, in the form of a segfault during the delay slot scheduling pass, for a function that falls through to exit without any RTL instruction generated for the end of

Re: [PATCH] rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]

On Tue, Jan 09, 2024 at 11:51:16AM +0100, Ilya Leoshkevich wrote: > Bootstrap and regtest running on ppc64le-redhat-linux and > powerpc64-linux-gnu. Ok for trunk when successful? > > > > Use ASM_OUTPUT_FUNCTION_LABEL () instead of ASM_OUTPUT_LABEL () in > the Power ELF V1 ABI branch of

Re: [PATCH] libgccjit: Support signed char flag

On Thu, 2023-12-21 at 08:42 -0500, Antoni Boucher wrote: > Hi. > This patch adds support for the -fsigned-char flag. Thanks. The patch looks correct to me. > I'm not sure how to test it since I stumbled upon this bug when I > found > this other bug

RE: [PATCH]middle-end: check if target can do extract first for early breaks [PR113199]

Hmm I'm confused as to why It didn't break mine.. just did one again.. anyway I'll remove the unused variable. > -Original Message- > From: Rainer Orth > Sent: Tuesday, January 9, 2024 4:06 PM > To: Richard Biener > Cc: Tamar Christina ; gcc-patches@gcc.gnu.org; nd > ;

Re: [PATCH]middle-end: check if target can do extract first for early breaks [PR113199]

On Tue, Jan 9, 2024 at 8:10 AM Tamar Christina wrote: > > Hmm I'm confused as to why It didn't break mine.. just did one again.. anyway > I'll remove the unused variable. Can you also make vectorizable_live_operation_1 static? > > -Original Message- > > From: Rainer Orth > > Sent:

Re: [wwwdocs] gcc-14/changes.html: OpenMP - improve wording

Ups - now attached. Thanks Martin! Martin Jambor wrote: On Mon, Jan 08 2024, Tobias Burnus wrote: The attached patch there was no patch attached to your message. Martin does a tiny updated to the OpenMP features (AMD GCN now also has an optimized memcpy_rect not only nvptx), but the main

[PATCH 2/7 v2] lto: Remove random_seed from section name.

This patch removes suffixes from section names during LTO linking. These suffixes were originally added for ld -r to work (PR lto/44992). They were added to all LTO object files, but are only useful before WPA. After that they waste space, and if kept random, make LTO caching impossible.

RE: [PATCH]middle-end: check if target can do extract first for early breaks [PR113199]

On Tue, 9 Jan 2024, Tamar Christina wrote: > > > - > > > - gimple_seq_add_seq (, tem); > > > - > > > - scalar_res = gimple_build (, CFN_EXTRACT_LAST, scalar_type, > > > - mask, vec_lhs_phi); > > > + scalar_res = gimple_build (, CFN_VEC_EXTRACT, TREE_TYPE > >

[PATCH][gcc-13] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a

I was talking to Matthias Klose about enabling libstdc++_libbacktrace.a for Ubuntu's gcc package and I realised that it would be preferable if the gcc-13 branch had those libbacktrace symbols in libstdc++exp.a. I already did that for trunk with r14-3812-gb96b554592c5cb and trunk no longer installs

Re: [PATCH] Add -mevex512 into invoke.texi

On Tue, Jan 9, 2024 at 8:04 AM Haochen Jiang wrote: > > Hi all, > > In invoke.texi, -mevex512 is missing. This patch adds that. > > Ok for trunk? You add it to the "index" but not document its semantics? > Thx, > Haochen > > gcc/ChangeLog: > > * doc/invoke.texi: Add -mevex512. > --- >

[COMMITTED] ada: Error compiling Ada 2022 object renaming with no subtype mark

From: Steve Baird In some cases the compiler would crash or generate spurious errors compiling a legal object renaming declaration that lacks a subtype mark. In addition to fixing the immediate problem, change Atree.Copy_Slots so that attempts to modify either the Empty or the Error nodes (e.g.,

[COMMITTED] ada: Avoid xref on out params of TSS

From: Bob Duff For an actual passed as an 'in out' parameter of a type support subprogram such as deep finalize, do not count it as a read reference of the actual. Clearly these should not count. Furthermore, counting them causes different warnings in -gnatc mode compared to normal mode, because

[COMMITTED] ada: Fix precondition in Interfaces.C.Strings

From: Joffrey Huguet The precondition of both Update procedures in Interfaces.C.Strings were incorrect. This patch fixes this. gcc/ada/ * libgnat/i-cstrin.ads (Update): Fix precondition. Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/libgnat/i-cstrin.ads | 9

[COMMITTED] ada: Excess elements created for indexed aggregates with iterator_specifications

From: Gary Dismukes In the case of an indexed aggregate of a container type with both Add_Unnamed and New_Indexed specified in the Aggregate aspect of the type (such as for the Vector type in Ada.Containers.Vectors), in cases where a component association is given by an iterator_specification,

[COMMITTED] ada: Preliminary cleanup in aliasing support code

From: Eric Botcazou This declares an explicit temporary for the fields of the fat pointer type in gnat_to_gnu_entity and removes the GNU_ prefix of the parameters of the relate_alias_sets routine for the sake of brevity. No functional changes. gcc/ada/ * gcc-interface/decl.cc

[COMMITTED] ada: More aggressive inlining of subprogram calls in GNATprove mode

From: Piotr Trojanek Previously if a subprogram call could not be inlined in GNATprove mode, then all subsequent calls to the same subprogram were not inlined either (because a failed attempt to inline clears flag Is_Inlined_Always and we tested this flag when attempting to inline subsequent

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

> -Original Message- > From: Richard Biener > Sent: Tuesday, January 9, 2024 12:26 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com > Subject: RE: [PATCH]middle-end: Fix dominators updates when peeling with > multiple exits [PR113144] > > On Tue, 9

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

> -Original Message- > From: Richard Biener > Sent: Tuesday, January 9, 2024 1:51 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com > Subject: RE: [PATCH]middle-end: Fix dominators updates when peeling with > multiple exits [PR113144] > > On Tue, 9 Jan

RE: [PATCH]Arm: Update early-break tests to accept thumb output too.

> -Original Message- > From: Tamar Christina > Sent: Tuesday, January 9, 2024 12:02 PM > To: gcc-patches@gcc.gnu.org > Cc: nd ; Richard Earnshaw ; > ni...@redhat.com; Kyrylo Tkachov > Subject: [PATCH]Arm: Update early-break tests to accept thumb output too. > > Hi All, > > The tests

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

On Tue, 9 Jan 2024, Tamar Christina wrote: > > This makes it quadratic in the number of vectorized early exit loops > > in a function. The vectorizer CFG manipulation operates in a local > > enough bubble that programmatic updating of dominators should be > > possible (after all we manage to

[committed] aarch64: Fix up GC of aarch64_simd_types [PR113270]

Hi! The r14-6524 changes created aarch64-builtins.h header and moved struct aarch64_simd_type_info definition in there. Unfortunately, the new header wasn't added to target_gtfiles, so the trees and const char * pointer elements in the aarch64_simd_types array aren't marked as GC roots anymore.

[COMMITTED] ada: Remove unreachable code in Resolve_Extension_Aggregate

From: Eric Botcazou The only functions using the BIP protocol are now those returning a limited type: Is_Build_In_Place_Result_Type => Is_Inherently_Limited_Type. gcc/ada/ * sem_aggr.adb (Resolve_Extension_Aggregate): Remove the unreachable call to Transform_BIP_Assignment as

[COMMITTED] ada: Fix bug in Sem_Util.Enclosing_Declaration

From: Steve Baird Fix Sem_Util.Enclosing_Declaration to not return an N_Subprogram_Specification node. Remove code in various places that was formerly needed to cope with this misbehavior. gcc/ada/ * sem_util.adb (Enclosing_Declaration): Instead of returning a subprogram

[COMMITTED] ada: Cannot requeue to a procedure implemented by an entry

From: Javier Miranda Add missing support for RM 9.5.4(5.6/4): the target of a requeue statement may be a procedure when its name denotes a renaming of an entry. gcc/ada/ * sem_ch6.adb (Analyze_Subprogram_Specification): Do not replace the type of the formals with its

[COMMITTED] ada: Minor change replacing "not Present" tests with "No" tests

From: Gary Dismukes Fixing two places flagged by gnatcheck to use "No" instead of "not Present". gcc/ada/ * exp_aggr.adb (Expand_Container_Aggregate): Change "not Present" tests to tests using "No" (in two places). Tested on x86_64-pc-linux-gnu, committed on master. ---

[COMMITTED] ada: Allow passing private types to generic formal incomplete types

From: Bob Duff It is legal to pass a private type, or a type with a component whose type is private, as a generic actual type if the formal is a generic formal incomplete type. This patch fixes a bug in which the compiler would give an error in some such cases. Also misc cleanup. gcc/ada/

[COMMITTED] ada: Fix bogus Constraint_Error on allocator for access to array of access type

From: Eric Botcazou This occurs because the access element type is not its own TYPE_CANONICAL, which creates a discrepancy between the aliasing support code, which deals with types directly, and the middle-end which looks at TYPE_CANONICAL only. gcc/ada/ * gcc-interface/decl.cc

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

On Tue, 9 Jan 2024, Richard Biener wrote: > On Tue, 9 Jan 2024, Tamar Christina wrote: > > > > > > > > -Original Message- > > > From: Richard Biener > > > Sent: Tuesday, January 9, 2024 12:26 PM > > > To: Tamar Christina > > > Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com >

Re: [r14-7003 Regression] FAIL: gfortran.dg/power_8.f90 -O3 -g execution test on Linux/x86_64

On Tue, 9 Jan 2024, haochen.jiang wrote: > On Linux/x86_64, > > b3cc5a1efead520bc977b4ba51f1328d01b3e516 is the first bad commit > commit b3cc5a1efead520bc977b4ba51f1328d01b3e516 > Author: Richard Biener > Date: Fri Dec 15 10:32:29 2023 +0100 > > tree-optimization/113026 - avoid vector

Re: [wwwdocs] gcc-14/changes.html: OpenMP - improve wording

Hi Tobias, On Mon, Jan 08 2024, Tobias Burnus wrote: > The attached patch there was no patch attached to your message. Martin > does a tiny updated to the OpenMP features (AMD GCN > now also has an optimized memcpy_rect not only nvptx), but the main > change is some shifting around to make

[COMMITTED] ada: Fix uses of not Present

From: Piotr Trojanek Fix style violation reported by GNATcheck. gcc/ada/ * sem_aggr.adb (Resolve_Container_Aggregate): Use "No". * sem_ch8.adb (Find_Direct_Name): Likewise. Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/sem_aggr.adb | 2 +-

[COMMITTED] ada: Add __atomic_store_n binding to System.Atomic_Primitives

From: Eric Botcazou This is modeled on the existing binding for __atomic_load_n. gcc/ada/ * libgnat/s-atopri.ads (Atomic_Store): New generic procedure. (Atomic_Store_8): New instantiated procedure. (Atomic_Store_16): Likewise. (Atomic_Store_32): Likewise.

[COMMITTED] ada: Remove side effects depending on the context of subtype declaration

From: Piotr Trojanek In GNATprove mode the removal of side effects is only needed in certain syntactic contexts, which include subtype declarations. Now this removal is limited to genuine subtype declarations and not to itypes coming from expressions where side effects are not expected.

[COMMITTED] ada: Remove dead code for GNATprove inlining

From: Piotr Trojanek Removed code was dead because it could only be executed when Back_End_Inlining is True and that flag is always false in GNATprove_Mode. gcc/ada/ * inline.adb (Cannot_Inline): Cleanup use of 'Length; remove dead code. Tested on x86_64-pc-linux-gnu,

[COMMITTED] ada: Remove unused runtime entity

From: Eric Botcazou The compiler has not generated direct attachments for a long time. gcc/ada/ * rtsfind.ads (RE_Id): Remove RE_Attach. (RE_Unit_Table): Likewise. * libgnat/s-finmas.ads (Attach): Delete. * libgnat/s-finmas.adb (Attach): Likewise. Tested on

[COMMITTED] ada: Document new SPARK aspect and pragma Always_Terminates

From: Piotr Trojanek Add description of a recently added SPARK contract. gcc/ada/ * doc/gnat_rm/implementation_defined_aspects.rst, doc/gnat_rm/implementation_defined_pragmas.rst: Add sections for Always_Terminates. * gnat-style.texi: Regenerate. *

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

On Tue, 9 Jan 2024, Tamar Christina wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Tuesday, January 9, 2024 12:26 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com > > Subject: RE: [PATCH]middle-end: Fix dominators updates

Re: [PATCH] arm/aarch64: Add bti for all functions [PR106671]

Feng Xue OS via Gcc-patches writes: > This patch extends option -mbranch-protection=bti with an optional argument > as bti[+all] to force compiler to unconditionally insert bti for all > functions. Because a direct function call at the stage of compiling might be > rewritten to an indirect call

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

On Tue, 9 Jan 2024, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Tuesday, January 9, 2024 1:51 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com > > Subject: RE: [PATCH]middle-end: Fix dominators updates when

Re: [PATCH] arm/aarch64: Add bti for all functions [PR106671]

Andrea Corallo writes: > Feng Xue OS via Gcc-patches writes: > >> This patch extends option -mbranch-protection=bti with an optional argument >> as bti[+all] to force compiler to unconditionally insert bti for all >> functions. Because a direct function call at the stage of compiling might be

Re: [Committed] RISC-V: Use MAX instead of std::max [VSETVL PASS]

On 1/7/24 16:07, 钟居哲 wrote: Since in the previous review from Robin, he have ever asked me change std::max into MAX, I thought the policy is preferring MAX instead of std::max. I change the codes to make them consistent but it seems I am wrong. So is it reasonable that I change all

[PATCH] tree-optimization/113026 - fix vector epilogue maximum iter bound

The late amendment with a limit based on VF was redundant and wrong for peeled early exits. The following moves the adjustment done when we don't have a skip edge down to the place where the already existing VF based max iter check is done and removes the amendment. Bootstrapped and tested on

RE: [PATCH]Arm: Update early-break tests to accept thumb output too.

> > 3f40b2a241953 100644 > > --- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c > > +++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c > > @@ -16,8 +16,12 @@ int b[N] = {0}; > > ** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+ > > ** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+ >

Re: [PATCH v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option

On Tue, Jan 9, 2024 at 8:17 AM Li, Pan2 wrote: > > The test case pr30957-1.c first comes from this commit about 19 years ago > which expect the -1.0 for testing. > > https://github.com/gcc-mirror/gcc/commit/290358f770d21d9204ea621f839ee8fba606a275 > > Then the below commit changes from -1.0 to

[COMMITTED] ada: Fix limited_with in Check_Scil; allow for <> in pp of aggregate

From: Tucker Taft Check_Scil failed due to not handling a type that came from a package that was mentioned in a limited-with clause. Also, an aggregate with an uninitialized component was not being pretty-printed properly. gcc/ada/ * pprint.adb (List_Name): Check for "Box_Present"

[COMMITTED] ada: Fix internal error on class-wide allocator inside if-expression

From: Eric Botcazou The problem is that the freeze node for the class-wide subtype built for the expression of the allocator escapes from the dependent expression instead of being stored in its list of actions. gcc/ada/ * freeze.adb (Freeze_Expression.Has_Decl_In_List): Deal

[COMMITTED] ada: Remove dead detection of recursive inlined subprograms

From: Piotr Trojanek Inlining of subprogram calls happens in routine Expand_Inlined_Call which calls Establish_Actual_Mapping_For_Inlined_Call. Both routines had detection of recursive calls. The detection in the second routine was dead code. gcc/ada/ * inline.adb

[COMMITTED] ada: Do not count comparison of addresses as a modification

From: Viljar Indus In some extended code we generate comparisons between the Addresses of some variables. This causes those variables to be considered modified. Whereas in this particular scenario the variables are just referenced. gcc/ada/ * sem_attr.adb: avoid marking a use of the

Re: [PATCH] c-family: copy attribute diagnostic fixes [PR113262]

On Tue, Jan 09, 2024 at 09:52:17AM +0100, Jakub Jelinek wrote: > Hi! > > The copy attributes is allowed on decls as well as types and even has > checks whether decl (set to *node) is DECL_P or TYPE_P, but for diagnostics > unconditionally uses DECL_SOURCE_LOCATION (decl), which obviously only

Re: [PATCH] RISC-V: Also handle sign extension in branch costing

On 1/7/24 17:06, Maciej W. Rozycki wrote: Complement commit c1e8cb3d9f94 ("RISC-V: Rework branch costing model for if-conversion") and also handle extraneous sign extend operations that are sometimes produced by `noce_try_cmove_arith' instead of zero extend operations, making branch costing

Re: [PATCH] testsuite: Skip ifcvt-4.c for SPARC V8

> Conditional moves are not available in SPARC V8. > > gcc/testsuite/ChangeLog: > > * gcc.dg/ifcvt-4.c: Skip for SPARC V8 OK. -- Eric Botcazou

Re:[PATCH v2] RISC-V: T-HEAD: Add support for the XTheadInt ISA extension

ping Ref: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636932.html

Re: [PATCH] RISC-V: Fix loop invariant check

OK. I'm still a bit unsure about whether SSA_NAME_IS_DEFAULT_DEF can really occur but if it does it's not wrong to treat it as loop invariant. Regards Robin

RE: [PATCH]middle-end: Fix dominators updates when peeling with multiple exits [PR113144]

> This makes it quadratic in the number of vectorized early exit loops > in a function. The vectorizer CFG manipulation operates in a local > enough bubble that programmatic updating of dominators should be > possible (after all we manage to produce correct SSA form!), the > proposed change gets

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

On Tue, Jan 09, 2024 at 10:39:50AM +0100, Richard Biener wrote: > > x86 can't combine IOR/XOR in any meaningful way, but can combine the > > sequence of PLUS (together with MULT) RTXes to LEA. > > Btw, this looks like a three-insn combination even with IOR so a > pattern for this case would work

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

On Tue, Jan 9, 2024 at 10:44 AM Richard Biener wrote: > > On Tue, 9 Jan 2024, Uros Bizjak wrote: > > > On Tue, Jan 9, 2024 at 9:58?AM Richard Biener wrote: > > > > > > On Mon, 8 Jan 2024, Uros Bizjak wrote: > > > > > > > On Mon, Jan 8, 2024 at 5:57?PM Andrew Pinski wrote: > > > > > > > > > > On

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

On Tue, 9 Jan 2024, Uros Bizjak wrote: > On Tue, Jan 9, 2024 at 10:44?AM Richard Biener wrote: > > > > On Tue, 9 Jan 2024, Uros Bizjak wrote: > > > > > On Tue, Jan 9, 2024 at 9:58?AM Richard Biener wrote: > > > > > > > > On Mon, 8 Jan 2024, Uros Bizjak wrote: > > > > > > > > > On Mon, Jan 8,

Re: [PATCH] c++: side effect in nullptr_t conversion fix

On Tue, Jan 09, 2024 at 11:20:02AM +0300, Dmitry Drozodv wrote: > diff --git a/gcc/cp/cvt.cc b/gcc/cp/cvt.cc > index cbed847b343..14462356a0e 100644 > --- a/gcc/cp/cvt.cc > +++ b/gcc/cp/cvt.cc > @@ -218,8 +218,9 @@ cp_convert_to_pointer (tree type, tree expr, bool > dofold, > ?

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

On Mon, 8 Jan 2024, Uros Bizjak wrote: > On Mon, Jan 8, 2024 at 5:57?PM Andrew Pinski wrote: > > > > On Mon, Jan 8, 2024 at 6:44?AM Uros Bizjak wrote: > > > > > > Instead of converting XOR or PLUS of two values, ANDed with two constants > > > that > > > have no bits in common, to IOR

Fix PR rtl-optimization/113140

This is a small regression present on the mainline and 13 branch, although the underlying problem has probably been there for ages, in the form of a segfault during the delay slot scheduling pass, for a function that falls through to exit without any RTL instruction generated for the end of

[Ada] Fix PR ada/113195

This is a small regression present on the mainline and 13 branch, in the form of an internal error in gigi on anonymous access type equality. We now need to also accept them too for anonymous access types that point to compatible object subtypes in the language sense. Tested on SPARC64/Linux,

Re:[PATCH] Support libcall __float{,un}sibf by SF when it is not supported for _bf16

ping

Re: [PATCH]middle-end: thread through existing LCSSA variable for alternative exits too [PR113237]

On Sun, 7 Jan 2024, Tamar Christina wrote: > Hi All, > > Builing on top of the previous patch, similar to when we have a single exit if > we have a case where all exits are considered early exits and there are > existing > non virtual phi then in order to maintain LCSSA we have to use the

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

On Tue, Jan 9, 2024 at 11:19 AM Uros Bizjak wrote: > > On Tue, Jan 9, 2024 at 11:06 AM Richard Biener wrote: > > > > On Tue, 9 Jan 2024, Uros Bizjak wrote: > > > > > On Tue, Jan 9, 2024 at 10:44?AM Richard Biener wrote: > > > > > > > > On Tue, 9 Jan 2024, Uros Bizjak wrote: > > > > > > > > > On

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

On Mon, 8 Jan 2024, Jeff Law wrote: > > > On 1/8/24 09:57, Andrew Pinski wrote: > > On Mon, Jan 8, 2024 at 6:44?AM Uros Bizjak wrote: > >> > >> Instead of converting XOR or PLUS of two values, ANDed with two constants > >> that > >> have no bits in common, to IOR expression, convert IOR or XOR

[PATCH] vect: Ensure both NITERSM1 and NITERS are INTEGER_CSTs or neither of them [PR113210]

Hi! On the following testcase e.g. on riscv64 or aarch64 (latter with -O3 -march=armv8-a+sve ) we ICE, because while NITERS is INTEGER_CST, NITERSM1 is a complex expression like (short unsigned int) (a.0_1 + 255) + 1 > 256 ? ~(short unsigned int) (a.0_1 + 255) : 0 where a.0_1 is unsigned char.

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