Re: Repost [PATCH 1/6] Add -mcpu=future

2024-02-20 Thread Michael Meissner
On Tue, Feb 20, 2024 at 06:35:34PM +0800, Kewen.Lin wrote: > Hi Mike, > > Sorry for late reply (just back from vacation). > > on 2024/2/8 03:58, Michael Meissner wrote: > > On Wed, Feb 07, 2024 at 05:21:10PM +0800, Kewen.Lin wrote: > >> on 2024/2/6 14:01, Michael Meissner wrote: > >> Sorry for

Re: [PATCH] rs6000: Neuter option -mpower{8,9}-vector [PR109987]

2024-02-20 Thread Kewen.Lin
on 2024/2/21 09:37, Peter Bergner wrote: > On 2/20/24 3:27 AM, Kewen.Lin wrote: >> on 2024/2/20 02:45, Segher Boessenkool wrote: >>> On Tue, Jan 16, 2024 at 10:50:01AM +0800, Kewen.Lin wrote: it consists of some aspects: - effective target powerpc_p{8,9}vector_ok are removed

[PATCH v11 23/24] c++: Implement __is_invocable built-in trait

2024-02-20 Thread Ken Matsui
This patch implements built-in trait for std::is_invocable. gcc/cp/ChangeLog: * cp-trait.def: Define __is_invocable. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_INVOCABLE. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewise.

Re: [PATCH] rs6000: Neuter option -mpower{8,9}-vector [PR109987]

2024-02-20 Thread Kewen.Lin
on 2024/2/20 19:19, Segher Boessenkool wrote: > On Tue, Feb 20, 2024 at 05:27:07PM +0800, Kewen.Lin wrote: >> Good question, it mainly follows the practice of option direct-move here. >> IMHO at least for power8-vector we want WarnRemoved for now as it's >> documented before, and we can probably

RE: [PATCH v1] RISC-V: Upgrade RVV intrinsic version to 0.12

2024-02-20 Thread Li, Pan2
Hi kito and juzhe. There may be 2 items for double-confirm. Thanks a lot. 1. Not very sure if we need to upgrade the version for __riscv_th_v_intrinsic. 2. Do we need to upgrade the even a newer version (like 1.0) for the GCC 14 release, or we can do it later. Pan -Original Message-

[PATCH v1] RISC-V: Upgrade RVV intrinsic version to 0.12

2024-02-20 Thread pan2 . li
From: Pan Li Upgrade the version of RVV intrinsic from 0.11 to 0.12. PR target/114017 gcc/ChangeLog: * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade the version to 0.12. gcc/testsuite/ChangeLog: * gcc.target/riscv/predef-__riscv_v_intrinsic.c:

Re: [PATCH v2] LoongArch: Split loongarch_option_override_internal into smaller procedures

2024-02-20 Thread Yang Yujie
v1 -> v2: - Rebased to master. - Specifies "(void)" for the empty parameter list of loongarch_global_init.

[PATCH v2] LoongArch: Split loongarch_option_override_internal into smaller procedures

2024-02-20 Thread Yang Yujie
gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as aliases to -mrecip={all,none}. * config/loongarch/loongarch.opt: Same. * config/loongarch/loongarch-def.h: Modify ABI condition macros for convenience. *

[PATCH v1] LoongArch: When checking whether the assembler supports conditional branch relaxation, add compilation parameter "--fatal-warnings" to the assembler.

2024-02-20 Thread Lulu Cheng
In binutils 2.40 and earlier versions, only a warning will be reported when a relocation immediate value is out of bounds. As a result, the value of the macro HAVE_AS_COND_BRANCH_RELAXATION will also be defined as 1 when the assembler does not support conditional branch relaxation. Therefore, add

Re: [PATCH v1 0/4] Fix a series of problems caused by

2024-02-20 Thread chenglulu
Sorry, this title is incomplete and has been resent. 在 2024/2/21 上午11:08, Lulu Cheng 写道: Because binutils2.42 corrects the implementation of ".align [abs-expr,[abs-expr[,abs-expr]]]". The macro ASM_OUTPUT_ALIGN_WITH_NOP in GCC uses this assembler directive, and an error occurs. See link below

[PATCH v1 4/4] LoongArch: Define HAVE_AS_TLS to 0 if it's undefined [PR112299]

2024-02-20 Thread Lulu Cheng
From: Xi Ruoyao Now loongarch.md uses HAVE_AS_TLS, we need this to fix the failure building a cross compiler if the cross assembler is not installed yet. gcc/ChangeLog: PR target/112299 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0 if not defined yet.

[PATCH v1 3/4] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

2024-02-20 Thread Lulu Cheng
From: Xi Ruoyao As the commit message of r14-4674 has indicated, if the assembler does not support conditional branch relaxation, a relocation overflow may happen on conditional branches when relaxation is enabled because the number of NOP instructions inserted by the assembler will be more than

[PATCH v1 2/4] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default.

2024-02-20 Thread Lulu Cheng
gcc/ChangeLog: * config.in: Regenerate. * config/loongarch/genopts/loongarch.opt.in: Add compilation option mrelax. And set the initial value of explicit-relocs according to the detection status. * config/loongarch/gnu-user.h: When compiling with

[PATCH v1 1/4] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.

2024-02-20 Thread Lulu Cheng
There are two reasons for removing this macro definition: 1. The default in the assembler is to use the nop instruction for filling. 2. For assembly directives: .align [abs-expr[, abs-expr[, abs-expr]]] The third expression it is the maximum number of bytes that should be skipped by this

[PATCH v1 0/4] Fix a series of problems caused by ASM_OUTPUT_ALIGN_WITH_NOP (release/gcc-12).

2024-02-20 Thread Lulu Cheng
Because binutils2.42 corrects the implementation of ".align [abs-expr,[abs-expr[,abs-expr]]]". The macro ASM_OUTPUT_ALIGN_WITH_NOP in GCC uses this assembler directive, and an error occurs. See link below for detailed description. https://gcc.gnu.org/pipermail/gcc-patches/2024-February/645067.html

[PATCH v1 3/4] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

2024-02-20 Thread Lulu Cheng
From: Xi Ruoyao As the commit message of r14-4674 has indicated, if the assembler does not support conditional branch relaxation, a relocation overflow may happen on conditional branches when relaxation is enabled because the number of NOP instructions inserted by the assembler will be more than

[PATCH v1 2/4] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default.

2024-02-20 Thread Lulu Cheng
gcc/ChangeLog: * config.in: Regenerate. * config/loongarch/genopts/loongarch.opt.in: Add compilation option mrelax. And set the initial value of explicit-relocs according to the detection status. * config/loongarch/gnu-user.h: When compiling with

[PATCH v1 4/4] LoongArch: Define HAVE_AS_TLS to 0 if it's undefined [PR112299]

2024-02-20 Thread Lulu Cheng
From: Xi Ruoyao Now loongarch.md uses HAVE_AS_TLS, we need this to fix the failure building a cross compiler if the cross assembler is not installed yet. gcc/ChangeLog: PR target/112299 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0 if not defined yet.

[PATCH v1 1/4] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.

2024-02-20 Thread Lulu Cheng
There are two reasons for removing this macro definition: 1. The default in the assembler is to use the nop instruction for filling. 2. For assembly directives: .align [abs-expr[, abs-expr[, abs-expr]]] The third expression it is the maximum number of bytes that should be skipped by this

[PATCH v1 0/4] Fix a series of problems caused by

2024-02-20 Thread Lulu Cheng
Because binutils2.42 corrects the implementation of ".align [abs-expr,[abs-expr[,abs-expr]]]". The macro ASM_OUTPUT_ALIGN_WITH_NOP in GCC uses this assembler directive, and an error occurs. See link below for detailed description. https://gcc.gnu.org/pipermail/gcc-patches/2024-February/645067.html

[PATCH] c++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector types [PR89224]

2024-02-20 Thread Andrew Pinski
After r7-987-gf17a223de829cb, the access for the elements of a vector type would lose the qualifiers. So if we had `constvector[0]`, the type of the element of the array would not have const on it. This was due to a missing build_qualified_type for the inner type of the vector when building the

[PATCH v1 2/4] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default.

2024-02-20 Thread Lulu Cheng
gcc/ChangeLog: * config.in: Regenerate. * config/loongarch/genopts/loongarch.opt.in: Add compilation option mrelax. And set the initial value of explicit-relocs according to the detection status. * config/loongarch/gnu-user.h: When compiling with

[PATCH v1 3/4] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

2024-02-20 Thread Lulu Cheng
From: Xi Ruoyao As the commit message of r14-4674 has indicated, if the assembler does not support conditional branch relaxation, a relocation overflow may happen on conditional branches when relaxation is enabled because the number of NOP instructions inserted by the assembler will be more than

[PATCH v1 0/4] Fix a series of problems caused by

2024-02-20 Thread Lulu Cheng
Because binutils2.42 corrects the implementation of ".align [abs-expr,[abs-expr[,abs-expr]]]". The macro ASM_OUTPUT_ALIGN_WITH_NOP in GCC uses this assembler directive, and an error occurs. See link below for detailed description. https://gcc.gnu.org/pipermail/gcc-patches/2024-February/645067.html

[PATCH v1 1/4] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.

2024-02-20 Thread Lulu Cheng
There are two reasons for removing this macro definition: 1. The default in the assembler is to use the nop instruction for filling. 2. For assembly directives: .align [abs-expr[, abs-expr[, abs-expr]]] The third expression it is the maximum number of bytes that should be skipped by this

[PATCH v1 4/4] LoongArch: Define HAVE_AS_TLS to 0 if it's undefined [PR112299]

2024-02-20 Thread Lulu Cheng
From: Xi Ruoyao Now loongarch.md uses HAVE_AS_TLS, we need this to fix the failure building a cross compiler if the cross assembler is not installed yet. gcc/ChangeLog: PR target/112299 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0 if not defined yet.

Re: [PATCH] rs6000: Neuter option -mpower{8,9}-vector [PR109987]

2024-02-20 Thread Peter Bergner
On 2/20/24 3:27 AM, Kewen.Lin wrote: > on 2024/2/20 02:45, Segher Boessenkool wrote: >> On Tue, Jan 16, 2024 at 10:50:01AM +0800, Kewen.Lin wrote: >>> it consists of some aspects: >>> - effective target powerpc_p{8,9}vector_ok are removed >>> and replaced with powerpc_vsx_ok. >> >> So all

Re: [PATCH V2] RISC-V: Specify mtune and march for PR113742

2024-02-20 Thread Kito Cheng
LGTM, thanks for fixing that issue :) On Wed, Feb 21, 2024 at 6:03 AM Edwin Lu wrote: > > The testcase pr113742.c is failing for 32 bit targets due to the following cc1 > error: > cc1: error: ABI requries '-march=rv64' > > Specify '-march=rv64gc' with '-mtune=sifive-p600-series' > > V1:

[pushed] analyzer: handle array-initialization from a string_cst [PR113999]

2024-02-20 Thread David Malcolm
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Successful run of analyzer integration tests on x86_64-pc-linux-gnu. Pushed to trunk as r14-9091-g0a6a5f8656ccf9. gcc/analyzer/ChangeLog: PR analyzer/113999 * analyzer.h (get_string_cst_size): New decl. *

[pushed] analyzer: handle empty ranges in symbolic_byte_range::intersection [PR113998]

2024-02-20 Thread David Malcolm
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Successful run of analyzer integration tests on x86_64-pc-linux-gnu. Pushed to trunk as r14-9090-g79d4c7ddc83e00. gcc/analyzer/ChangeLog: PR analyzer/113998 * ranges.cc (symbolic_byte_range::intersection): Handle empty

[PATCH] c++: -Wuninitialized when binding a ref to uninit DM [PR113987]

2024-02-20 Thread Marek Polacek
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? -- >8 -- This PR asks that our -Wuninitialized for mem-initializers does not warn when binding a reference to an uninitialized data member. We already check !INDIRECT_TYPE_P in find_uninit_fields_r, but that won't catch binding a

[PATCH v3] bpf: add inline memmove and memcpy expansion

2024-02-20 Thread David Faust
[Changes from v2: - Fix incorrectly passing a location instead of OPT_W* for warning (). - Reword warning/error message and test accordingly. ] [Changes from v1: Jose's review comments, all of which I agree with. - Fix 'implments' typo in commit message. - Change check that alignment is

Re: [PATCH v2] bpf: add inline memmove and memcpy expansion

2024-02-20 Thread David Faust
On 2/20/24 12:37, Jose E. Marchesi wrote: > > Hi Faust. > >> +bool >> +bpf_expand_cpymem (rtx *operands, bool is_move) >> +{ >> + /* Size must be constant for this expansion to work. */ >> + if (!CONST_INT_P (operands[2])) >> +{ >> + const char *name = is_move ? "memmove" :

Re: [PATCH] rs6000: Update instruction counts due to combine changes [PR112103]

2024-02-20 Thread Segher Boessenkool
On Tue, Feb 20, 2024 at 01:49:30PM -0600, Peter Bergner wrote: > I think this will become less fragile after we fix PR114004 which is You call it "fragile". I call it the testcase found the exact kind of bug this testcase was meant to find! Yes, the test should become quieter when the compiler

[PATCH v10 24/24] libstdc++: Optimize std::is_invocable compilation performance

2024-02-20 Thread Ken Matsui
This patch optimizes the compilation performance of std::is_invocable by dispatching to the new __is_invocable built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_invocable): Use __is_invocable built-in trait. *

[PATCH V2] RISC-V: Specify mtune and march for PR113742

2024-02-20 Thread Edwin Lu
The testcase pr113742.c is failing for 32 bit targets due to the following cc1 error: cc1: error: ABI requries '-march=rv64' Specify '-march=rv64gc' with '-mtune=sifive-p600-series' V1: https://gcc.gnu.org/pipermail/gcc-patches/2024-February/645609.html PR target/113742

Re: [PATCH] libgccjit: Add option to allow special characters in function names

2024-02-20 Thread Iain Sandoe
> On 20 Feb 2024, at 20:50, David Malcolm wrote: > > On Thu, 2024-02-15 at 17:08 -0500, Antoni Boucher wrote: >> Hi. >> This patch adds a new option to allow special characters like . and $ >> in function names. >> This is useful to allow for mangling using those characters. >> Thanks for the

Re: [PATCH] libgccjit: Add option to allow special characters in function names

2024-02-20 Thread David Malcolm
On Thu, 2024-02-15 at 17:08 -0500, Antoni Boucher wrote: > Hi. > This patch adds a new option to allow special characters like . and $ > in function names. > This is useful to allow for mangling using those characters. > Thanks for the review. Thanks for the patch. > diff --git

Re: [PATCH 3/5] btf: moved btf deallocation to final.

2024-02-20 Thread David Faust
Hi Cupertino, On 2/20/24 02:24, Cupertino Miranda wrote: > Dissociated .BTF.ext from the CO-RE relocations creation. Improvement of > allocation/deallocation of BTF structures. Moving deallocation to final > when needed. > > gcc/ChangeLog: > > * config/bpf/bpf.cc (bpf_option_override):

Re: [PATCH v2] bpf: add inline memmove and memcpy expansion

2024-02-20 Thread Jose E. Marchesi
Hi Faust. > +bool > +bpf_expand_cpymem (rtx *operands, bool is_move) > +{ > + /* Size must be constant for this expansion to work. */ > + if (!CONST_INT_P (operands[2])) > +{ > + const char *name = is_move ? "memmove" : "memcpy"; > + if (flag_building_libgcc) > + warning

Re: [PATCH] libgcc, aarch64: Allow for BE platforms in heap trampolines.

2024-02-20 Thread Richard Sandiford
Iain Sandoe writes: > Andrew Pinski pointed out on irc, that the current implementation of the > heap trampoline code fragment would make the instruction byte order follow > memory byte order for BE AArch64, which is not what is required. > > This patch revises the initializers so that

Re: [PATCH] Fortran: fix passing array component to polymorphic argument [PR105658]

2024-02-20 Thread Steve Kargl
On Tue, Feb 20, 2024 at 08:53:37PM +0100, Harald Anlauf wrote: > On 2/19/24 16:19, Peter Hill wrote: > > Hi Harald, > > > > Thanks for your help, please see the updated and signed-off patch below. > > Pushed: https://gcc.gnu.org/g:14ba8d5b87acd5f91ab8b8c02165a0fd53dcc2f2 > Harald, Thanks for

Re: [PATCH 1/5] btf: fixed type id in BTF_KIND_FUNC struct data.

2024-02-20 Thread David Faust
On 2/20/24 02:24, Cupertino Miranda wrote: > This patch correct the aditition of +1 on the type id, which originally > was done in the wrong location and leaded to func_sts->dtd_type for > BTF_KIND_FUNCS struct data to contain the type id of the previous entry. > > gcc/ChangeLog: > *

Re: [PATCH] Fortran: fix passing array component to polymorphic argument [PR105658]

2024-02-20 Thread Harald Anlauf
On 2/19/24 16:19, Peter Hill wrote: Hi Harald, Thanks for your help, please see the updated and signed-off patch below. Pushed: https://gcc.gnu.org/g:14ba8d5b87acd5f91ab8b8c02165a0fd53dcc2f2

Re: [PATCH] rs6000: Update instruction counts due to combine changes [PR112103]

2024-02-20 Thread Peter Bergner
On 2/20/24 3:29 AM, Kewen.Lin wrote: > on 2024/2/20 06:35, Peter Bergner wrote: >> rs6000: Update instruction counts due to combine changes [PR112103] >> >> The PR91865 combine fix changed instruction counts slightly for rlwinm-0.c. >> Adjust expected instruction counts accordingly. >> >> This

[PATCH v2] bpf: add inline memmove and memcpy expansion

2024-02-20 Thread David Faust
[Changes from v1: Jose's review comments, all of which I agree with. - Fix 'implments' typo in commit message. - Change check that alignment is CONST_INT to gcc_assert (). - Change default case in alignment switch to gcc_unreachable (). - Reword error message for non-constant size

Re: [PATCH][_GLIBCXX_DEBUG] Fix std::__niter_base behavior

2024-02-20 Thread Jonathan Wakely
On Tue, 20 Feb 2024 at 18:43, François Dumont wrote: > >libstdc++: [_GLIBCXX_DEBUG] Fix std::__niter_wrap behavior > > In _GLIBCXX_DEBUG mode the std::__niter_base can remove 2 layers, the > __gnu_debug::_Safe_iterator<> and the __gnu_cxx::__normal_iterator<>. > When

Re: [PATCH][_GLIBCXX_DEBUG] Fix std::__niter_base behavior

2024-02-20 Thread François Dumont
   libstdc++: [_GLIBCXX_DEBUG] Fix std::__niter_wrap behavior     In _GLIBCXX_DEBUG mode the std::__niter_base can remove 2 layers, the     __gnu_debug::_Safe_iterator<> and the __gnu_cxx::__normal_iterator<>.     When std::__niter_wrap is called to build a __gnu_debug::_Safe_iterator<>    

PATCH 11/11] rs6000, make test vec-cmpne.c a runnable test

2024-02-20 Thread Carl Love
GCC maintainers: The patch changes the vec-cmpne.c from a compile only test to a runnable test. The macros to create the functions needed to test the built-ins and verify the restults are all there in the include file. The .c file just needed to have the macro definitions inserted and

PATCH 10/11] rs6000, add test cases for __builtin_vec_init* and, __builtin_vec_set*

2024-02-20 Thread Carl Love
GCC maintainers: The patch adds test cases for the __builtin_vec_init* and __builtin_vec_set* built-ins. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable for mainline. Thanks. Carl

[PATCH 09/11] rs6000, add test cases for the vec_cmpne built-ins

2024-02-20 Thread Carl Love
GCC maintainers: The patch adds test cases for the vec_cmpne of built-ins. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable for mainline. Thanks. Carl

[PATCH 07/11] rs6000, __builtin_vsx_xvcmpeq[sp, dp, sp_p] add, documentation and test case

2024-02-20 Thread Carl Love
GCC maintainers: The patch adds documentation and test case for the __builtin_vsx_xvcmpeq[sp, dp, sp_p] built-ins. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable for mainline. Thanks. Carl

[PATCH 03/11] rs6000, remove duplicated built-ins

2024-02-20 Thread Carl Love
GCC maintainers: There are a number of undocumented built-ins that are duplicates of other documented built-ins. This patch removes the duplicates so users will only use the documented built-in. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is

[PATCH 08/11] rs6000, add tests and documentation for various, built-ins

2024-02-20 Thread Carl Love
GCC maintainers: The patch adds documentation a number of built-ins. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable for mainline. Thanks. Carl

[PATCH 04/11] rs6000, Update comment for the __builtin_vsx_vper*, built-ins.

2024-02-20 Thread Carl Love
GCC maintainers: The patch expands an existing comment to document that the duplicates are covered by an overloaded built-in. I am wondering if we should just go ahead and remove the duplicates? The patch has been tested on Power 10 with no regressions. Please let me know if this patch is

[PATCH 06/11] rs6000, __builtin_vsx_xxpermdi_1ti add documentation, and test case

2024-02-20 Thread Carl Love
GCC maintainers: The patch adds documentation and test case for the __builtin_vsx_xxpermdi_1ti built-in. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable for mainline. Thanks. Carl

[PATCH 05/11] rs6000, __builtin_vsx_xvneg[sp,dp] add documentation, and test cases

2024-02-20 Thread Carl Love
GCC maintainers: The patch adds documentation and test cases for the __builtin_vsx_xvnegsp, __builtin_vsx_xvnegdp built-ins. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable for mainline. Thanks. Carl

[PATCH 02/11] rs6000, fix arguments, add documentation for vector, element conversions

2024-02-20 Thread Carl Love
GCC maintainers: This patch fixes the return type for the __builtin_vsx_xvcvdpuxws and __builtin_vsx_xvcvspuxds built-ins. They were defined as signed but should have been defined as unsigned. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is

[PATCH 01/11] rs6000, Fix __builtin_vsx_cmple* args and documentation, builtins

2024-02-20 Thread Carl Love
GCC maintainers: This patch fixes the arguments and return type for the various __builtin_vsx_cmple* built-ins. They were defined as signed but should have been defined as unsigned. The patch has been tested on Power 10 with no regressions. Please let me know if this patch is acceptable

Re: [PATCH] bpf: Add documentation for the -mcpu option

2024-02-20 Thread Will Hawkins
On Tue, Feb 20, 2024 at 7:35 AM Jose E. Marchesi wrote: > > > Hello Will. > > Thanks for the patch. > I just installed it on your behalf. Thank you! > > > Add documentation describing the meaning and values for the -mcpu > > command-line option. > > > > Tested for bpf-unknown-none on

rs6000, built-in cleanup patch series

2024-02-20 Thread Carl Love
GCC maintainers: The following series of patches cleanup some of the rs6000 built-in support. Some of the first patches fix errors in the definition of a few of the built-ins. The built-ins are supposed to have unsigned arguments but are listed as signed. Some of the built-ins are supposed

Re: [Patch] OpenMP/nvptx: support 'arch(nvptx64)' as context selector

2024-02-20 Thread Jakub Jelinek
On Tue, Feb 20, 2024 at 05:39:39PM +0100, Tobias Burnus wrote: > clang/lib/Headers/openmp_wrappers/complex:device = {arch(amdgcn, nvptx, > nvptx64)}, \ That one doesn't really need the nvptx64 support. > --- a/gcc/config/nvptx/nvptx.cc > +++

[Patch] OpenMP/nvptx: support 'arch(nvptx64)' as context selector

2024-02-20 Thread Tobias Burnus
I just encountered 'arch(nvptx64)'. I think it makes sense to support it as alias for 'nvptx' in the context selector for better compatibility. Comments, remarks, suggestions? Tobias PS: See the LLVM documentation below. I do note that those are not identical as LLVM uses 'nvptx' for 32bit

[PATCH v9 23/24] c++: Implement __is_invocable built-in trait

2024-02-20 Thread Ken Matsui
This patch implements built-in trait for std::is_invocable. gcc/cp/ChangeLog: * cp-trait.def: Define __is_invocable. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_INVOCABLE. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewise.

[PATCH] doc: RISC-V: Document that -mcpu doesn't override -march or -mtune

2024-02-20 Thread Palmer Dabbelt
This came up recently as Edwin was looking through the test suite. A few of us were talking about this during the patchwork meeting and were surprised. Looks like this is the desired behavior, so let's at least document it. gcc/ChangeLog: * doc/invoke.texi: Document -mcpu.

[patch,avr,applied] Use int types of exact width and signedness in built-ins prototypes

2024-02-20 Thread Georg-Johann Lay
AVR: Use types of exact size and signedness in built-ins. The AVR built-ins used types like "int" or "char" that don't have exact signedness or type size which depend on -mint8 and -f[no-][un-]signed-char etc. As the built-ins are modelling machine instructions of given type sizes and

Re: [PATCH] libcpp: Improve location for macro names [PR66290]

2024-02-20 Thread Lewis Hyatt
On Mon, Feb 19, 2024 at 11:36 PM Alexandre Oliva wrote: > > This backport for gcc-13 is the first of two required for the > g++.dg/pch/line-map-3.C test to stop hitting a variant of the known > problem mentioned in that testcase: on riscv64-elf and riscv32-elf, > after restoring the PCH, the

Re: [PATCH] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]

2024-02-20 Thread Alexandre Oliva
On Feb 20, 2024, Jeff Law wrote: > On 2/19/24 21:26, Alexandre Oliva wrote: >> This backport for gcc-13 is required for pr90838.c to get the expected >> count of andi instructions on riscv64-elf . > In general, shouldn't backports be focused on correctness issues? *nod*. > It's unclear what

Re: [PATCH] RISC-V: Fix riscv/arch-19.c with different ISA spec version

2024-02-20 Thread Kito Cheng
LGTM :) On Tue, Feb 20, 2024 at 12:03 PM Alexandre Oliva wrote: > > This testcase is failing with riscv64-elf and riscv32-elf in the gcc-13 > branch, if configured to use an assembler that supports -misa-spec; with > an assembler that doesn't, the test passes both with and without the >

Re: [PATCH] aarch64: Allow aarch64-linux-muscl for heap trampolines [PR113971].

2024-02-20 Thread Richard Biener
On Tue, Feb 20, 2024 at 11:27 AM Iain Sandoe wrote: > > Tested on aarch64-linux-gnu, aarch64-darwin by me and on aarch64-linux-musl > by Sam James (thanks!). OK for trunk? OK > thanks > Iain > > --- 8< --- > > > This allows the same trampoline pattern to be used on all linux variants > rather

[patch,avr,applied] Use @defbuiltin to document built-ins.

2024-02-20 Thread Georg-Johann Lay
This patch uses @defbuiltin to document built-in functions so that the functions are listed in the index. Previously, @table @code was used. Johann -- AVR: extend.texi - Use @defbuiltin to document built-ins. gcc/ * doc/extend.texi (AVR Built-in Functions): Use @defbuiltin

Re: [PATCH] bpf: Add documentation for the -mcpu option

2024-02-20 Thread Jose E. Marchesi
Hello Will. Thanks for the patch. I just installed it on your behalf. > Add documentation describing the meaning and values for the -mcpu > command-line option. > > Tested for bpf-unknown-none on x86_64-linux-gnu host. > > gcc/ChangeLog: > > * config/bpf/bpf.opt: Add help information for

Re: LoongArch: Backport r14-4674 "LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP."?

2024-02-20 Thread chenglulu
在 2024/2/20 下午7:54, Xi Ruoyao 写道: On Tue, 2024-02-20 at 19:50 +0800, chenglulu wrote: 在 2024/2/20 下午7:31, Xi Ruoyao 写道: On Tue, 2024-02-20 at 19:25 +0800, Xi Ruoyao wrote: On Tue, 2024-02-20 at 10:07 +0800, chenglulu wrote: So I think that without worrying about performance and ensuring

Re: LoongArch: Backport r14-4674 "LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP."?

2024-02-20 Thread Xi Ruoyao
On Tue, 2024-02-20 at 19:50 +0800, chenglulu wrote: > > 在 2024/2/20 下午7:31, Xi Ruoyao 写道: > > On Tue, 2024-02-20 at 19:25 +0800, Xi Ruoyao wrote: > > > On Tue, 2024-02-20 at 10:07 +0800, chenglulu wrote: > > > > > > > So I think that without worrying about performance and ensuring that > > > >

Re: LoongArch: Backport r14-4674 "LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP."?

2024-02-20 Thread chenglulu
在 2024/2/20 下午7:31, Xi Ruoyao 写道: On Tue, 2024-02-20 at 19:25 +0800, Xi Ruoyao wrote: On Tue, 2024-02-20 at 10:07 +0800, chenglulu wrote: So I think that without worrying about performance and ensuring that there is no problem with binutils, I think we can make the following modifications:

Re: LoongArch: Backport r14-4674 "LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP."?

2024-02-20 Thread Xi Ruoyao
On Tue, 2024-02-20 at 19:25 +0800, Xi Ruoyao wrote: > On Tue, 2024-02-20 at 10:07 +0800, chenglulu wrote: > > > So I think that without worrying about performance and ensuring that > > there is no problem > > > > with binutils, I think we can make the following modifications: > > > >    -/*

[pushed] aarch64: Fix streaming-compatible code with -mtrack-speculation [PR113805]

2024-02-20 Thread Richard Sandiford
This patch makes -mtrack-speculation work on streaming-compatible functions. There were two related issues. The first is that the streaming-compatible code was using TB(N)Z unconditionally, whereas those instructions are not allowed with speculation tracking. That part can be fixed in a similar

Re: LoongArch: Backport r14-4674 "LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP."?

2024-02-20 Thread Xi Ruoyao
On Tue, 2024-02-20 at 10:07 +0800, chenglulu wrote: > So I think that without worrying about performance and ensuring that > there is no problem > > with binutils, I think we can make the following modifications: > >    -/* "nop" instruction 54525952 (andi $r0,$r0,0) is >    -   used for

Re: [PATCH] rs6000: Neuter option -mpower{8,9}-vector [PR109987]

2024-02-20 Thread Segher Boessenkool
On Tue, Feb 20, 2024 at 05:27:07PM +0800, Kewen.Lin wrote: > > -mcpu=power8 implies -mvsx already. > > Yes, but users can specify -mno-vsx in RUNTESTFLAGS, dejagnu > framework can have different behaviors (options order) for > different versions, this explicit -mvsx is mainly for the >

Re: Repost [PATCH 1/6] Add -mcpu=future

2024-02-20 Thread Kewen.Lin
Hi Mike, Sorry for late reply (just back from vacation). on 2024/2/8 03:58, Michael Meissner wrote: > On Wed, Feb 07, 2024 at 05:21:10PM +0800, Kewen.Lin wrote: >> on 2024/2/6 14:01, Michael Meissner wrote: >> Sorry for the possible confusion here, the "tune_proc" that I referred to is >> the

[PATCH] libgcc, aarch64: Allow for BE platforms in heap trampolines.

2024-02-20 Thread Iain Sandoe
Andrew Pinski pointed out on irc, that the current implementation of the heap trampoline code fragment would make the instruction byte order follow memory byte order for BE AArch64, which is not what is required. This patch revises the initializers so that instruction byte order is independent of

Re: [PATCH]AArch64: update vget_set_lane_1.c test output

2024-02-20 Thread Richard Sandiford
Tamar Christina writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Thursday, February 1, 2024 4:42 PM >> To: Tamar Christina >> Cc: Andrew Pinski ; gcc-patches@gcc.gnu.org; nd >> ; Richard Earnshaw ; Marcus >> Shawcroft ; Kyrylo Tkachov >> >> Subject: Re: [PATCH]AArch64:

Re: [PATCH] c-family, c++, v2: Fix up handling of types which may have padding in __atomic_{compare_}exchange

2024-02-20 Thread Jakub Jelinek
On Tue, Feb 20, 2024 at 11:11:22AM +0100, Richard Biener wrote: > > --- gcc/c-family/c-common.cc.jj 2024-02-17 16:40:42.831571693 +0100 > > +++ gcc/c-family/c-common.cc2024-02-20 10:58:56.599865656 +0100 > > @@ -7793,9 +7793,14 @@ resolve_overloaded_atomic_exchange (loca > >/*

[PATCH] aarch64: Allow aarch64-linux-muscl for heap trampolines [PR113971].

2024-02-20 Thread Iain Sandoe
Tested on aarch64-linux-gnu, aarch64-darwin by me and on aarch64-linux-musl by Sam James (thanks!). OK for trunk? thanks Iain --- 8< --- This allows the same trampoline pattern to be used on all linux variants rather than restricting it to linux gnu. PR target/113971.

[PATCH 4/5] bpf: implementation of func_info in .BTF.ext.

2024-02-20 Thread Cupertino Miranda
Kernel verifier complains in some particular cases for missing func_info implementation in .BTF.ext. This patch implements it. Strings are cached locally in coreout.cc to avoid adding duplicated strings in the string list. This string deduplication should eventually be moved to the CTFC functions

[PATCH 5/5] bpf: renamed coreout.* files to btfext-out.*.

2024-02-20 Thread Cupertino Miranda
gcc/ChangeLog: * config.gcc (target_gtfiles): changed coreout to btfext-out. (extra_objs): changed coreout to btfext-out. * config/bpf/coreout.cc: Renamed to btfext-out.cc * config/bpf/btfext-out.cc: Added * config/bpf/coreout.h: Renamed to btfext-out.h

[PATCH 3/5] btf: moved btf deallocation to final.

2024-02-20 Thread Cupertino Miranda
Dissociated .BTF.ext from the CO-RE relocations creation. Improvement of allocation/deallocation of BTF structures. Moving deallocation to final when needed. gcc/ChangeLog: * config/bpf/bpf.cc (bpf_option_override): Make BTF.ext enabled by default for BPF.

[PATCH 2/5] btf: added KIND_FUNC traversal function.

2024-02-20 Thread Cupertino Miranda
Added a traversal function to traverse all BTF_KIND_FUNC nodes with a callback function. Used for .BTF.ext section content creation. gcc/ChangeLog * btfout.cc (output_btf_func_types): use FOR_EACH_VEC_ELT. (traverse_btf_func_types): Defined function. * ctfc.h

[PATCH 1/5] btf: fixed type id in BTF_KIND_FUNC struct data.

2024-02-20 Thread Cupertino Miranda
This patch correct the aditition of +1 on the type id, which originally was done in the wrong location and leaded to func_sts->dtd_type for BTF_KIND_FUNCS struct data to contain the type id of the previous entry. gcc/ChangeLog: * btfout.cc (btf_collect_dataset): Corrected BTF type id. ---

bpf: PR target/113453 func_info .BTF.ext implementation

2024-02-20 Thread Cupertino Miranda
Good morning, This is a patch series with the implementation of func_info region within bpf target .BTF.ext section. Considering the required changes it also implied some changes in BTF and in the original CO-RE implementation, more specifically the structure used and how the relocations were

Re: [PATCH] ipa: Convert lattices from pure array to vector (PR 113476)

2024-02-20 Thread Jan Hubicka
> On Tue, Feb 13 2024, Martin Jambor wrote: > > On Mon, Feb 12 2024, Jan Hubicka wrote: > >>> Believe it or not, even though I have re-worked the internals of the > >>> lattices completely, the array itself is older than my involvement with > >>> GCC (or at least with ipa-cp.c ;-). > >>> > >>> So

Re: [PATCH] c-family, c++, v2: Fix up handling of types which may have padding in __atomic_{compare_}exchange

2024-02-20 Thread Richard Biener
On Tue, 20 Feb 2024, Jakub Jelinek wrote: > On Tue, Feb 20, 2024 at 09:01:10AM +0100, Richard Biener wrote: > > I'm not sure those would be really equivalent (MEM_REF vs. V_C_E > > as well as combined vs. split). It really depends how RTL expansion > > handles this (as you can see padding can be

Re: [PATCH][GCC 12] aarch64: Avoid out-of-range shrink-wrapped saves [PR111677]

2024-02-20 Thread Richard Sandiford
Alex Coplan writes: > On 14/02/2024 11:18, Richard Sandiford wrote: >> Alex Coplan writes: >> > This is a backport of the GCC 13 fix for PR111677 to the GCC 12 branch. >> > The only part of the patch that isn't a straight cherry-pick is due to >> > the TX iterator lacking TDmode for GCC 12, so

Re: [PATCH]AArch64: remove ls64 from being mandatory on armv8.7-a..

2024-02-20 Thread Richard Sandiford
Tamar Christina writes: > Hi, this I a new version of the patch updating some additional tests > because some of the LTO tests required a newer binutils than my distro had. > > --- > > The Arm Architectural Reference Manual (Version J.a, section A2.9 on > FEAT_LS64) > shows that ls64 is an

[PATCH] c-family, c++, v2: Fix up handling of types which may have padding in __atomic_{compare_}exchange

2024-02-20 Thread Jakub Jelinek
On Tue, Feb 20, 2024 at 09:01:10AM +0100, Richard Biener wrote: > I'm not sure those would be really equivalent (MEM_REF vs. V_C_E > as well as combined vs. split). It really depends how RTL expansion > handles this (as you can see padding can be fun here). > > So I'd be nervous for a match.pd

Re: [PATCH] AArch64: Update system register database.

2024-02-20 Thread Richard Sandiford
Victor Do Nascimento writes: > [...] > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index 157a0b9dfa5..45e901cda64 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -297,6 +297,26 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = >

[PATCH] c++: Fix explicit instantiation of const variable templates after earlier implicit instantation [PR113976]

2024-02-20 Thread Jakub Jelinek
Hi! Already previously instantiated const variable templates had cp_apply_type_quals_to_decl called when they were instantiated, but if they need runtime initialization, their TREE_READONLY flag has been subsequently cleared. Explicit variable template instantiation calls grokdeclarator which

Re: [Committed] analyzer: Fix maybe_undo_optimize_bit_field_compare vs non-scalar types [PR113983]

2024-02-20 Thread Jakub Jelinek
On Mon, Feb 19, 2024 at 01:33:33PM -0800, Andrew Pinski wrote: > * gcc.dg/analyzer/torture/vector-extract-1.c: New test. The testcase fails on i686-linux with .../gcc/testsuite/gcc.dg/analyzer/torture/vector-extract-1.c:11:1: warning: MMX vector return without MMX enabled changes the ABI

Re: [PATCH] bpf: add inline memmove and memcpy expansion

2024-02-20 Thread Jose E. Marchesi
Hi David. Thanks for the patch. See a couple of comments regarding error handling below. > BPF programs are not typically linked, which means we cannot fall back > on library calls to implement __builtin_{memmove,memcpy} and should > always expand them inline if possible. > > GCC already

Re: [PATCH] RISC-V: Set require-effective-target rv64 for PR113742

2024-02-20 Thread Monk Chiang
Hi Edwin, I think just replace to: /* { dg-options "-O2 -finstrument-functions -mabi=lp64d -march=rv64gc -mtune=sifive-p600-series" } */ On Thu, Feb 15, 2024 at 7:43 PM Robin Dapp wrote: > > Ah oops I glanced over the /* { dg-do compile } */part. It should be > > fine to add '-march=rv64gc'

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