Re: [libitm] Link with -litm and -pthread
It broke all targets that don't implement threads and as such
don't support -pthread. And you need to gate *all* tm-related
tests on something like check_effective_target_pthread.
The question is, how is libitm supposed to work on these systems? The
configure.ac file contains:
# Check to see if -pthread or -lpthread is needed. Prefer the former.
# In case the pthread.h system header is not found, this test will fail.
XPCFLAGS=
CFLAGS=$CFLAGS -pthread
AC_LINK_IFELSE(
[AC_LANG_PROGRAM(
[#include pthread.h
void *g(void *d) { return NULL; }],
[pthread_t t; pthread_create(t,NULL,g,NULL);])],
[XPCFLAGS= -Wc,-pthread],
[CFLAGS=$save_CFLAGS LIBS=-lpthread $LIBS
AC_LINK_IFELSE(
[AC_LANG_PROGRAM(
[#include pthread.h
void *g(void *d) { return NULL; }],
[pthread_t t; pthread_create(t,NULL,g,NULL);])],
[],
[AC_MSG_ERROR([Pthreads are required to build libitm])])])
Can't you just limit adding -pthread to Solaris 8 or something?
I didn't invent anything here, this is exactly how -fopenmp/libgomp works.
Just define GTM_SELF_SPECS to like Darwin and Windows.
--
Eric Botcazou
Re: trans-mem: virtual ops for gimple_transaction
On Mon, 13 Feb 2012, Richard Henderson wrote: On 02/13/2012 01:35 AM, Richard Guenther wrote: On Fri, 10 Feb 2012, Richard Henderson wrote: On 02/10/2012 01:44 AM, Richard Guenther wrote: What is the reason to keep a GIMPLE_TRANSACTION stmt after TM lowering and not lower it to a builtin function call? Because real optimization hasn't happened yet, and we hold out hope that we'll be able to delete stuff as unreachable. Especially all instances of transaction_cancel. It seems the body is empty after lowering (what's the label thing?) The label is the transaction cancel label. When we finally convert GIMPLE_TRANSACTION a builtin, we'll generate different code layouts with and without a cancel. Ah, I see. But wouldn't a placeholder builtin function be effectively the same as using a new GIMPLE stmt kind? Except for the whole need to hold on to a label thing. Honestly, think about that for 10 seconds and tell me that a builtin is better than simply re-tasking the gimple code that we already have around. I'm only worried about passes that would need to explicitely care about new gimple codes (like the DCE case you spotted). All passes have to handle calls already - and apart from the label thingie a call would work (well, you could pass the label by reference, but that would probably make it a possible target for a computed goto ...). So, well ... I guess a new gimple code is ok (we don't want to change that now), but in general trying a little harder to avoid new kinds of gimple in the optimizer IL is always good. Richard.
C++ PATCH for c++/39055 (accepts-valid with 'this' in default argument)
This is a regression since 3.3; discussion at the C++ meeting last week
concluded both that yes, this is ill-formed, and we think it should be
ill-formed.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 399365c251914176b5b34076e5a7b4658c06e917
Author: Jason Merrill ja...@redhat.com
Date: Fri Feb 10 22:57:05 2012 -1000
PR c++/39055
* decl.c (local_variable_p_walkfn): Don't check DECL_ARTIFICIAL.
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 8fcfbd5..f0ba181 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -10509,7 +10509,9 @@ static tree
local_variable_p_walkfn (tree *tp, int *walk_subtrees,
void *data ATTRIBUTE_UNUSED)
{
- if (local_variable_p (*tp) !DECL_ARTIFICIAL (*tp))
+ /* Check DECL_NAME to avoid including temporaries. We don't check
+ DECL_ARTIFICIAL because we do want to complain about 'this'. */
+ if (local_variable_p (*tp) DECL_NAME (*tp))
return *tp;
else if (TYPE_P (*tp))
*walk_subtrees = 0;
@@ -10517,7 +10519,6 @@ local_variable_p_walkfn (tree *tp, int *walk_subtrees,
return NULL_TREE;
}
-
/* Check that ARG, which is a default-argument expression for a
parameter DECL, is valid. Returns ARG, or ERROR_MARK_NODE, if
something goes wrong. DECL may also be a _TYPE node, rather than a
@@ -10578,7 +10579,10 @@ check_default_argument (tree decl, tree arg)
var = cp_walk_tree_without_duplicates (arg, local_variable_p_walkfn, NULL);
if (var)
{
- error (default argument %qE uses local variable %qD, arg, var);
+ if (DECL_NAME (var) == this_identifier)
+ permerror (input_location, default argument %qE uses %qD, arg, var);
+ else
+ error (default argument %qE uses local variable %qD, arg, var);
return error_mark_node;
}
diff --git a/gcc/testsuite/g++.dg/overload/defarg5.C b/gcc/testsuite/g++.dg/overload/defarg5.C
new file mode 100644
index 000..06ea6bf
--- /dev/null
+++ b/gcc/testsuite/g++.dg/overload/defarg5.C
@@ -0,0 +1,7 @@
+// PR c++/39055
+
+struct A
+{
+ int i;
+ A() { void foo(int=i); } // { dg-error this }
+};
Re: [PATCH] Fix up vectorizer cost model use of uninitialized value (PR tree-optimization/52210)
On Mon, 13 Feb 2012, Jakub Jelinek wrote:
Hi!
The PR50912 changed vect_get_and_check_slp_defs dt from
array into scalar, which fails when calling vect_model_simple_cost
which looks at two array members. I believe even 4.6 checked just
the first operand, as it called it when processing the first operand,
so IMHO this patch doesn't regress (the very incomplete) cost model
handling and doesn't introduce undefined behavior.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
Ok.
Thanks,
Richard.
2012-02-13 Jakub Jelinek ja...@redhat.com
PR tree-optimization/52210
* tree-vect-slp.c (vect_get_and_check_slp_defs): Call
vect_model_simple_cost with two entry vect_def_type array instead
of an address of dt.
* gcc.dg/pr52210.c: New test.
--- gcc/tree-vect-slp.c.jj2012-02-07 16:05:51.0 +0100
+++ gcc/tree-vect-slp.c 2012-02-13 10:14:28.017357662 +0100
@@ -321,10 +321,15 @@ vect_get_and_check_slp_defs (loop_vec_in
vect_model_store_cost (stmt_info, ncopies_for_cost, false,
dt, slp_node);
else
- /* Not memory operation (we don't call this function for
-loads). */
- vect_model_simple_cost (stmt_info, ncopies_for_cost, dt,
- slp_node);
+ {
+ enum vect_def_type dts[2];
+ dts[0] = dt;
+ dts[1] = vect_uninitialized_def;
+ /* Not memory operation (we don't call this function for
+ loads). */
+ vect_model_simple_cost (stmt_info, ncopies_for_cost, dts,
+ slp_node);
+ }
}
}
else
--- gcc/testsuite/gcc.dg/pr52210.c.jj 2012-02-13 10:27:46.692809216 +0100
+++ gcc/testsuite/gcc.dg/pr52210.c2012-02-13 10:25:31.0 +0100
@@ -0,0 +1,12 @@
+/* PR tree-optimization/52210 */
+/* { dg-do compile } */
+/* { dg-options -O3 } */
+
+void
+foo (long *x, long y, long z)
+{
+ long a = x[0];
+ long b = x[1];
+ x[0] = a ~y;
+ x[1] = b ~z;
+}
Jakub
--
Richard Guenther rguent...@suse.de
SUSE / SUSE Labs
SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer
Re: [libitm] Add SPARC bits
I think you really need to put the proper value into the %fp register atomically here. If an interrupt comes in before you STACK_BIAS adjust the %fp, a debugger or similar could see a corrupt frame pointer. OK, I'm going to make the change. -- Eric Botcazou
Re: [libitm] Add SPARC bits
We probably want to do some nop'ish thing here which will yield the cpu thread on Niagara cpus, I'd recommend something along the lines of rd %ccr, %g0 or rd %y, %g0 I'm going for the former, thanks. -- Eric Botcazou
Re: [PATCH] Prefer reg as first operand in commutative operator
On Tue, Feb 14, 2012 at 07:27:21AM +, Paulo J. Matos wrote: case RTX_OBJ: /* Complex expressions should be the first, so decrease priority of objects. Prefer pointer objects over non pointer objects. */ - if ((REG_P (op) REG_POINTER (op)) - || (MEM_P (op) MEM_POINTER (op))) - return -1; - return -2; + if(REG_P(op)) + return -1; + else if ((REG_P (op) REG_POINTER (op)) + || (MEM_P (op) MEM_POINTER (op))) + return -2; + return -3; The above is definitely wrong, I think it will penalize e.g. Power6/7 a lot. Note that the REG_P REG_POINTER testis then useless because of your change. So, if anything, you'd need to use highest priority for REG_P REG_POINTER, then MEM_P MEM_POINTER, then REG_P and then MEM_P and verify it doesn't regress on any major target on SPEC etc. Watch your formatting and I don't think this is stage4 material in any case, it is extremely risky change. Jakub
Patch ping
Hi! I'd like to ping two patches: - http://gcc.gnu.org/ml/gcc-patches/2012-01/msg01335.html PR debug/51950P2 -gdwarf-4 -fdebug-types-section cloning bug - http://gcc.gnu.org/ml/gcc-patches/2012-02/msg00496.html PR middle-end/51929 P1 cgraph verification failure with same body aliases and cloning Jakub
Re: [PING] New port resubmission for TILEPro and TILE-Gx
On 2/13/2012 6:30 PM, Mike Stump wrote: On Feb 13, 2012, at 1:43 PM, Walter Lee wrote: Thanks for the review. Do I have permission to commit, Yes, you do. Richard can approve this, and when he says, Ok., you're good to go. or is there anything else I need to do? Nope. (Assuming you have write after approval to the tree.) Great. Thanks. I have committed the changes. Walter
Re: [C++ Patch] PR 51494 (and 52183)
Hi, This patch fixes this particular bug, but there are some issues. First, non_static_member_function_p only checks the first function in the overload set, which may not be representative of all of them. It really shouldn't look through OVERLOADs, we need to defer this decision until build_over_call. Second, the uses of maybe_dummy_object in build_offset_ref, finish_qualified_id_expr and finish_id_expression could also be dealing with static member functions. The underlying problem here is that we're only supposed to capture a variable/this when it is odr-used, which we can't know until we finish overload resolution. Ah, thanks for your explanations, let's see if I can make some progress. Or maybe Dodji can kick in? Thanks, Paolo.
Re: [RFC, 4.8] Magic matching for flags clobbering and setting
On 02/14/2012 12:52 AM, Steven Bosscher wrote: Other than that: To convert a port, there is still a lot of work to be done to define and handle the various CC modes properly (well, not for the pdp11, because it writes out 1 insn for most define_insns), but it is great not having to define all the pairs of clobber-flags and set-flags insns. At least, I didn't end up rewriting the complete .md file. It was relatively easy. Less book-keeping involved, etc. And where's the patch? :) Paolo
Re: [patch] libitm: Add multi-lock, write-through TM method.
On Mon, 2012-02-13 at 14:50 -0800, Richard Henderson wrote: On 02/13/2012 01:47 PM, Torvald Riegel wrote: + // Location-to-orec mapping. Stripes of 16B mapped to 2^19 orecs. + static const gtm_word L2O_ORECS = 1 19; + static const gtm_word L2O_SHIFT = 4; Is it just easier to say 16B or did we really want CACHELINE_SIZE? The 16B stripes where quite good in past experiments with TinySTM, IIRC. The problem with the simple hash function that we use currently is that if you make #shifts too small, you acquire and check more locks (so higher cache footprint too), and the lock array covers less space before it wraps around. However, if you make #shifts too large, you increase false sharing. Cacheline granularity could be too large already, unless the user has put all independent variables on separate cache lines (but this is often too much bloat, e.g., think about the layout of the nodes of a tree...). The best choice here is more or less workload-dependent, and still an open question. In the past, I also experimented with less simple hash functions, with mixed results. Optimizing / tuning this hash function is on my performance todo list. Otherwise ok. Committed (with the formatting fixed, and the 16B stripes kept as before).
Re: libgo patch committed: Update to weekly.2011-12-22
Ian Lance Taylor i...@google.com writes: Most of them are like Start pollServer: epoll_ctl: Bad file descriptor panic: runtime error: invalid memory address or nil pointer dereference FAIL: net That sort of problem should be fixed now, by http://gcc.gnu.org/ml/gcc-patches/2012-02/msg00110.html Indeed, thanks. I only see a small number of unrelated FAILs on CentOS 5.6 now: === libgo tests === Running target unix FAIL: compress/flate FAIL: image/jpeg === libgo Summary for unix === # of expected passes121 # of unexpected failures2 Running target unix/-m32 FAIL: compress/flate FAIL: database/sql FAIL: image/jpeg === libgo Summary for unix/-m32 === # of expected passes120 # of unexpected failures3 === libgo Summary === # of expected passes241 # of unexpected failures5 /var/gcc/regression/trunk/2.6.18-gcc-gas-gld/build/./gcc/gccgo version 4.7.0 20120210 (experimental) [trunk revision 184103] (GCC) The compress/flate and image/jpeg failures seem to be races creating the testdata symlink during a highly parallel make check: ln: creating symbolic link `../testdata/testdata' to `/vol/gcc/src/hg/trunk/local/libgo/go/compress/flate/../testdata': File exists --- FAIL: flate.TestDeflateInflateString (0.00 seconds) ???:1: open ../testdata/e.txt: No such file or directory ???:1: open ../testdata/Mark.Twain-Tom.Sawyer.txt: No such file or directory FAIL FAIL: compress/flate --- FAIL: jpeg.TestWriter (0.05 seconds) ???:1: ../testdata/video-001.png open ../testdata/video-001.png: No such file or directory ???:1: ../testdata/video-001.png open ../testdata/video-001.png: No such file or directory ???:1: ../testdata/video-001.png open ../testdata/video-001.png: No such file or directory ???:1: ../testdata/video-001.png open ../testdata/video-001.png: No such file or directory ???:1: ../testdata/video-001.png open ../testdata/video-001.png: No such file or directory ???:1: ../testdata/video-001.png open ../testdata/video-001.png: No such file or directory FAIL FAIL: image/jpeg The 32-bit database/sql failure also occurs when using gld on Solaris: /vol/gcc/bin/gld-2.22: dynamic variable `libgo_database_sql.driver.Bool' is zero size /vol/gcc/bin/gld-2.22: dynamic variable `libgo_database_sql.driver.DefaultParameterConverter' is zero size /vol/gcc/bin/gld-2.22: _gotest_.o(.text+0xba12): unresolvable R_386_32 relocation against symbol `libgo_database_sql.driver.Bool' /vol/gcc/bin/gld-2.22: final link failed: Nonrepresentable section on output collect2: error: ld returned 1 exit status FAIL: database/sql Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [PATCH] Prefer reg as first operand in commutative operator
On 14/02/12 09:52, Jakub Jelinek wrote: On Tue, Feb 14, 2012 at 07:27:21AM +, Paulo J. Matos wrote: case RTX_OBJ: /* Complex expressions should be the first, so decrease priority of objects. Prefer pointer objects over non pointer objects. */ - if ((REG_P (op) REG_POINTER (op)) - || (MEM_P (op) MEM_POINTER (op))) - return -1; - return -2; + if(REG_P(op)) + return -1; + else if ((REG_P (op) REG_POINTER (op)) + || (MEM_P (op) MEM_POINTER (op))) + return -2; + return -3; The above is definitely wrong, I think it will penalize e.g. Power6/7 a lot. Note that the REG_P REG_POINTER testis then useless because of your change. So, if anything, you'd need to use highest priority for REG_P REG_POINTER, then MEM_P MEM_POINTER, then REG_P and then MEM_P and verify it doesn't regress on any major target on SPEC etc. Watch your formatting and I don't think this is stage4 material in any case, it is extremely risky change. Jakub Thanks for the comments Jakub. I submitted the bug report since it helped me (my backend generated code is better) and Richard in the gcc mailing list agreed it to be unintuitive. It is true that my test makes the following test on REG_P and REG_POINTER useless. My mistake, will fix. I haven't tested it on any major target and the submission as a bug was in order to see if it has any interest for gcc main targets. -- PMatos
Re: [PATCH] Prefer reg as first operand in commutative operator
On 14/02/12 13:46, Paolo Bonzini wrote: On 02/14/2012 10:52 AM, Jakub Jelinek wrote: /* Complex expressions should be the first, so decrease priority of objects. Prefer pointer objects over non pointer objects. */ - if ((REG_P (op) REG_POINTER (op)) - || (MEM_P (op) MEM_POINTER (op))) - return -1; - return -2; + if(REG_P(op)) + return -1; + else if ((REG_P (op) REG_POINTER (op)) + || (MEM_P (op) MEM_POINTER (op))) + return -2; + return -3; The above is definitely wrong, I think it will penalize e.g. Power6/7 a lot. Even if this was fixed, I'm not sure it is always the correct thing to do, because it would override swap_commutative_operands_with_target. If the target is memory, you'd want the memory to come first. I was unaware of swap_commutative_operands_with_target, therefore the patch change makes things a lot trickier. In other words, there is no right answer as to whether REG or MEM should come first. I think the register allocator will generate good code using % if you make your predicate nonimmediate_operand in operand 1: (define_insn iorqi3 [(set (match_operand:QI 0 register_operand =c) (ior:QI (match_operand:QI 1 nonimmediate_operand %0) (match_operand:QI 2 general_operand cwmi))) (clobber (reg:CC RCC))] register_operand(operands[1], QImode) || register_operand(operands[2], QImode) or\\t%0,%f2) Paolo Yes, I think in general that seems to be the right procedure. In my case, unfortunately it does not work. The reason is that it allows: (set (reg:QI ...) (ior:QI (mem:QI (reg:QI ...)) (mem:QI (reg:QI ... This wouldn't in general be a problem except that my backend only has one register that can be used for a memory dereference, which means that BASE_REG_CLASS is a class with a single register. This seriously breaks IRA, which doesn't have two registers to allocate for that rule. I always try to change my backend before changing my port of GCC and unfortunately in this case I saw no alternative my to change commutative_operand_precedence. It might be the wrong solution in the general case, therefore just disregard it. Thanks for the comments, -- PMatos
Re: [PATCH] Prefer reg as first operand in commutative operator
On Tue, Feb 14, 2012 at 02:05:30PM +, Paulo J. Matos wrote: I think the register allocator will generate good code using % if you make your predicate nonimmediate_operand in operand 1: (define_insn iorqi3 [(set (match_operand:QI 0 register_operand =c) (ior:QI (match_operand:QI 1 nonimmediate_operand %0) (match_operand:QI 2 general_operand cwmi))) (clobber (reg:CC RCC))] register_operand(operands[1], QImode) || register_operand(operands[2], QImode) or\\t%0,%f2) Yes, I think in general that seems to be the right procedure. In my case, unfortunately it does not work. The reason is that it allows: (set (reg:QI ...) (ior:QI (mem:QI (reg:QI ...)) (mem:QI (reg:QI ... This wouldn't in general be a problem except that my backend only has one register that can be used for a memory dereference, which means that BASE_REG_CLASS is a class with a single register. It doesn't allow that, because the condition on the insn then fails, as neither operand 1 nor operand 2 is register_operand. Jakub
Re: [PATCH] Prefer reg as first operand in commutative operator
On 14/02/12 14:10, Jakub Jelinek wrote: It doesn't allow that, because the condition on the insn then fails, as neither operand 1 nor operand 2 is register_operand. Jakub Oh!!! I incorrectly read the instruction as I had initially tried it and I knew it was failing, however, I didn't have the predicate Paolo suggested. I will give it a go. It does look good and it would avoid touching core GCC. :) Thanks guys, -- PMatos
Re: [libitm] Link with -litm and -pthread
On 02/11/2012 03:14 PM, Eric Botcazou wrote: Hi, this completes the half-implemented linking scheme of libitm and makes it mimic that of libgomp entirely. We need the -pthread thing on Solaris 8. Tested on SPARC/Solaris 8 9 and i586/Linux, OK for the mainline? 2012-02-11 Eric Botcazou ebotca...@adacore.com * gcc.c (LINK_COMMAND_SPEC): Deal with -fgnu-tm. (GTM_SELF_SPECS): Define if not already defined. (driver_self_specs): Add GTM_SELF_SPECS. * config/darwin.h (GTM_SELF_SPECS): Define. * config/i386/cygwin.h (GTM_SELF_SPECS): Likewise. * config/i386/mingw32.h (GTM_SELF_SPECS): Likewise. 2012-02-11 Eric Botcazou ebotca...@adacore.com * configure.ac (link_itm): Fix comment. * configure: Regenerate. * testsuite/lib/libitm.exp: Do not pass -litm for the link. Hi, I see several new fails on s390x with that patch (r184174): FAIL: gcc.dg/lto/trans-mem-1 c_lto_trans-mem-1_0.o-c_lto_trans-mem-1_1.o link, -flto -fgnu-tm UNRESOLVED: gcc.dg/lto/trans-mem-1 c_lto_trans-mem-1_0.o-c_lto_trans-mem-1_1.o execute -flto -fgnu-tm FAIL: gcc.dg/lto/trans-mem-2 c_lto_trans-mem-2_0.o-c_lto_trans-mem-2_1.o link, -flto -fgnu-tm UNRESOLVED: gcc.dg/lto/trans-mem-2 c_lto_trans-mem-2_0.o-c_lto_trans-mem-2_1.o execute -flto -fgnu-tm FAIL: gcc.dg/lto/trans-mem-4 c_lto_trans-mem-4_0.o-c_lto_trans-mem-4_1.o link, -flto -fgnu-tm UNRESOLVED: gcc.dg/lto/trans-mem-4 c_lto_trans-mem-4_0.o-c_lto_trans-mem-4_1.o execute -flto -fgnu-tm Executing on host: /home/andreas/patched/gcc-head-build/gcc/xgcc -B/home/andreas/patched/gcc-head-build/gcc/ c_lto_trans-mem-2_0.o c_lto_trans-mem-2_1.o -flto -fgnu-tm -o gcc-dg-lto-trans-mem-2-01.exe(timeout = 300) xgcc: error: libitm.spec: No such file or directory^M compiler exited with status 1 Bye, -Andreas-
Re: [libitm] Link with -litm and -pthread
On 14 Feb 2012, at 16:08, Andreas Krebbel wrote: On 02/11/2012 03:14 PM, Eric Botcazou wrote: Hi, this completes the half-implemented linking scheme of libitm and makes it mimic that of libgomp entirely. We need the -pthread thing on Solaris 8. Tested on SPARC/Solaris 8 9 and i586/Linux, OK for the mainline? 2012-02-11 Eric Botcazou ebotca...@adacore.com * gcc.c (LINK_COMMAND_SPEC): Deal with -fgnu-tm. (GTM_SELF_SPECS): Define if not already defined. (driver_self_specs): Add GTM_SELF_SPECS. * config/darwin.h (GTM_SELF_SPECS): Define. * config/i386/cygwin.h (GTM_SELF_SPECS): Likewise. * config/i386/mingw32.h (GTM_SELF_SPECS): Likewise. 2012-02-11 Eric Botcazou ebotca...@adacore.com * configure.ac (link_itm): Fix comment. * configure: Regenerate. * testsuite/lib/libitm.exp: Do not pass -litm for the link. Hi, I see several new fails on s390x with that patch (r184174): FAIL: gcc.dg/lto/trans-mem-1 c_lto_trans-mem-1_0.o-c_lto_trans- mem-1_1.o link, -flto -fgnu-tm UNRESOLVED: gcc.dg/lto/trans-mem-1 c_lto_trans-mem-1_0.o- c_lto_trans-mem-1_1.o execute -flto -fgnu-tm FAIL: gcc.dg/lto/trans-mem-2 c_lto_trans-mem-2_0.o-c_lto_trans- mem-2_1.o link, -flto -fgnu-tm UNRESOLVED: gcc.dg/lto/trans-mem-2 c_lto_trans-mem-2_0.o- c_lto_trans-mem-2_1.o execute -flto -fgnu-tm FAIL: gcc.dg/lto/trans-mem-4 c_lto_trans-mem-4_0.o-c_lto_trans- mem-4_1.o link, -flto -fgnu-tm UNRESOLVED: gcc.dg/lto/trans-mem-4 c_lto_trans-mem-4_0.o- c_lto_trans-mem-4_1.o execute -flto -fgnu-tm Executing on host: /home/andreas/patched/gcc-head-build/gcc/xgcc -B/home/andreas/patched/gcc-head-build/gcc/ c_lto_trans-mem-2_0.o c_lto_trans-mem-2_1.o -flto -fgnu-tm -o gcc-dg-lto-trans-mem-2-01.exe(timeout = 300) xgcc: error: libitm.spec: No such file or directory^M ... any .exp causing use of the libitm spec will need to arrange for - B /path/to/libitm/build to be appended to the options?
Re: [PATCH] Reserve upper bits of memory model for future use
On Tue, Feb 14, 2012 at 11:23:58AM -0500, Andrew MacLeod wrote:
This patch just modifies the documention to indicate that the upper
bits of the memory model parameter are reserved for future use.
(We're already looking at using it for HLE hints)
I've already made a change on the wiki page.
Ok for mainline?
Looks good to me, but would like Richard to chime in too.
BTW, I wonder if we shouldn't error out on
int
foo (int *p)
{
return __atomic_fetch_add (p, 4, __ATOMIC_SEQ_CST | 0x123400);
}
(currently we just warn).
Jakub
Re: PATCH: Add capability to contrib/compare_tests to handle directories
On Sat, Feb 11, 2012 at 8:13 AM, Mike Stump mikest...@comcast.net wrote:
On Nov 4, 2011, at 8:23 PM, Quentin Neill wrote:
My scenario about ANY test results changed is what I added with -strict.
This patch concatenates the common .sum files before comparing.
So, how exactly does this work for you:
+ ( for fname in `cat $lst5`; do cat $1/$fname; done ) $sum1
+ ( for fname in `cat $lst5`; do cat $2/$fname; done ) $sum2
+ echo ## ${CONFIG_SHELL-/bin/sh} $0 $strict $sum1 $sum2
+ ${CONFIG_SHELL-/bin/sh} $0 $strict $sum1 $sum2
sum1 and sum2 appear to be variables that aren't set.
Hi Mike,
Thanks for the fix. This seemed familiar, and upon review it looks
like I never committed this fix:
http://gcc.gnu.org/ml/gcc-patches/2011-11/msg01194.html
Do you prefer this patch with my original intent (declaring sum1/sum2
with other tmps and removing the trap on line 52):
--- a/contrib/compare_tests
+++ b/contrib/compare_tests
@@ -43,7 +43,9 @@ lst2=/tmp/$tool-lst2.$$
lst3=/tmp/$tool-lst3.$$
lst4=/tmp/$tool-lst4.$$
lst5=/tmp/$tool-lst5.$$
-tmps=$tmp1 $tmp2 $now_s $before_s $lst1 $lst2 $lst3 $lst4 $lst5
+sum1=/tmp/$tool-sum1.$$
+sum2=/tmp/$tool-sum2.$$
+tmps=$tmp1 $tmp2 $now_s $before_s $lst1 $lst2 $lst3 $lst4 $lst5 $sum1 $sum2
[ $1 = -strict ] strict=$1 shift
[ $1 = -? ] usage
@@ -60,8 +62,8 @@ if [ -d $1 -a -d $2 ] ; then
echo ## Dir2=$2: `cat $lst2 | wc -l` sum files
echo
# remove leading directory components to compare
- sed -e s|^$1/|| $lst1 | sort $lst3
- sed -e s|^$2/|| $lst2 | sort $lst4
+ sed -e s|^$1[/]*|| $lst1 | sort $lst3
+ sed -e s|^$2[/]*|| $lst2 | sort $lst4
comm -23 $lst3 $lst4 $lst5
if [ -s $lst5 ] ; then
echo # Extra sum files in Dir1=$1
@@ -83,14 +85,11 @@ if [ -d $1 -a -d $2 ] ; then
exit $exit_status
fi
cmnsums=`cat $lst5 | wc -l`
- sum1=/tmp/$tool-sum-1
- sum2=/tmp/$tool-sum-2
echo # Comparing $cmnsums common sum files
( for fname in `cat $lst5`; do cat $1/$fname; done ) $sum1
( for fname in `cat $lst5`; do cat $2/$fname; done ) $sum2
echo ## ${CONFIG_SHELL-/bin/sh} $0 $strict $sum1 $sum2
${CONFIG_SHELL-/bin/sh} $0 $strict $sum1 $sum2
- rm -f $sum1 $sum2
ret=$?
if [ $ret -ne 0 ]; then
exit_status=`expr $exit_status + 1`
Or would you prefer this minimal fix (to remove trailing directory slashes)?
@@ -60,8 +60,8 @@ if [ -d $1 -a -d $2 ] ; then
echo ## Dir2=$2: `cat $lst2 | wc -l` sum files
echo
# remove leading directory components to compare
- sed -e s|^$1/|| $lst1 | sort $lst3
- sed -e s|^$2/|| $lst2 | sort $lst4
+ sed -e s|^$1[/]*|| $lst1 | sort $lst3
+ sed -e s|^$2[/]*|| $lst2 | sort $lst4
comm -23 $lst3 $lst4 $lst5
if [ -s $lst5 ] ; then
echo # Extra sum files in Dir1=$1
And if so, okay to commit?
--
Quentin
PR middle-end/52141: ICE due to asm statement
I swear, these inline asms in transactions are going to be the death of me.
In the attached testcase diagnose_tm_blocks() and lower_tm() do not
recognize the GIMPLE_ASM because early inlining has not yet run, so
there is nothing to see. However, by the time we run the IPA TM pass,
the assembly statement has been inlined but we no longer detect
GIMPLE_ASMs correctly:
/* Now validate all tm_safe functions, and all atomic regions in
other functions. */
for (node = cgraph_nodes; node; node = node-next)
if (node-reachable node-lowered
cgraph_function_body_availability (node) = AVAIL_OVERWRITABLE)
{
d = get_cg_data (node, true);
if (is_tm_safe (node-decl)) -- !! FINDS NOTHING !!
ipa_tm_diagnose_tm_safe (node);
else if (d-all_tm_regions)
ipa_tm_diagnose_transaction (node, d-all_tm_regions);
}
The call to ipa_tm_diagnose_tm_safe() does nothing because there are no
longer any calls in the function, since the function call has been inlined:
f ()
{
bb 2:
__asm__ __volatile__();
return;
}
Perhaps we could issue the error when we notice the GIMPLE_ASM while
scanning for irrevocable blocks earlier. The attached patch does so,
and fixes the PR.
What am I missing, cause I *know* there's a rat's nest somewhere.
Aldy
PR middle-end/52141
* trans-mem.c (ipa_tm_scan_irr_block): Error on GIMPLE_ASM.
Index: testsuite/gcc.dg/tm/pr52141.c
===
--- testsuite/gcc.dg/tm/pr52141.c (revision 0)
+++ testsuite/gcc.dg/tm/pr52141.c (revision 0)
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options -fgnu-tm -O1 } */
+
+inline void asmfunc(void)
+{
+ __asm__ (); /* { dg-error asm not allowed in .transaction_safe } */
+}
+
+__attribute__((transaction_safe))
+static void f(void)
+{
+ asmfunc();
+}
+
+int main()
+{
+ __transaction_atomic {
+f();
+ }
+ return 0;
+}
Index: trans-mem.c
===
--- trans-mem.c (revision 184181)
+++ trans-mem.c (working copy)
@@ -3736,6 +3736,10 @@ ipa_tm_scan_irr_block (basic_block bb)
assembly statement is not relevant to the transaction
is to wrap it in a __tm_waiver block. This is not
yet implemented, so we can't check for it. */
+ if (is_tm_safe (current_function_decl))
+ error_at (gimple_location (stmt),
+ asm not allowed in %transaction_safe% function %qE,
+ current_function_decl);
return true;
default:
[PATCH?, 4.7 regression] Crash in ira-costs.c with -fschedule-insns -fsched-pressure -fdump-rtl-sched1
Hello,
compiling anything, even just an empty function, with
-fschedule-insns -fsched-pressure -fdump-rtl-sched1
causes the compiler to crash:
Program received signal SIGSEGV, Segmentation fault.
0x0840d9e0 in REG_N_REFS (regno=58) at ../../gcc-head/gcc/regs.h:75
75return regstat_n_sets_and_refs[regno].refs;
(gdb) bt
#0 0x0840d9e0 in REG_N_REFS (regno=58) at ../../gcc-head/gcc/regs.h:75
#1 0x08411120 in print_pseudo_costs (f=0x8e3fad0) at
../../gcc-head/gcc/ira-costs.c:1433
#2 0x08412046 in find_costs_and_classes (dump_file=0x8e3fad0) at
../../gcc-head/gcc/ira-costs.c:1806
#3 0x084129f2 in ira_set_pseudo_classes (dump_file=0x8e3fad0) at
../../gcc-head/gcc/ira-costs.c:2067
#4 0x089a9f08 in sched_init () at ../../gcc-head/gcc/haifa-sched.c:4838
This is because sched_init calls ira_set_pseudo_classes without having
called regstat_init_n_sets_and_refs first, but the latter is a prerequisite
for using REG_N_REFS. All other callers of ira_set_pseudo_classes seem to
initialize the regstat array first.
This is fixed by the following patch. However, I'm not quite sure if this is
the best way to fix the problem, given that the REG_N_REFS use occurs only for
debug output purposes -- should we actually do the work to compute the regstat
array just for that, or can print_pseudo_costs be changed instead?
Bye,
Ulrich
ChangeLog:
* haifa-sched.c (sched_init): Call regstat_init_n_sets_and_refs and
regstat_free_n_sets_and_refs before/after ira_set_pseudo_classes call.
=== modified file 'gcc/haifa-sched.c'
--- gcc/haifa-sched.c 2012-02-11 01:34:30 +
+++ gcc/haifa-sched.c 2012-02-14 16:41:47 +
@@ -6281,7 +6281,9 @@
{
int i, max_regno = max_reg_num ();
+ regstat_init_n_sets_and_refs ();
ira_set_pseudo_classes (sched_verbose ? sched_dump : NULL);
+ regstat_free_n_sets_and_refs ();
sched_regno_pressure_class
= (enum reg_class *) xmalloc (max_regno * sizeof (enum reg_class));
for (i = 0; i max_regno; i++)
--
Dr. Ulrich Weigand
GNU Toolchain for Linux on System z and Cell BE
ulrich.weig...@de.ibm.com
[lra] a patch to fix some x86-64 SPECFP2000 regressions
The following patch fixes some x86-64 SPECFP2000 regressions. The
wrong choosing register class for split pseudos resulted in wrong
assignments to reload pseudos afterwards.
The patch was successfully bootstrapped on x86/x86-64.
Committed as rev. 184215.
2012-02-14 Vladimir Makarov vmaka...@redhat.com
* lra-constraints.c (choose_split_class ): Pass hard_regno instead
of its class. Check that the class containts hard_regno.
(split_pseudo): Reject splitting if choose_split_class returns
NO_REGS.
Index: lra-constraints.c
===
--- lra-constraints.c (revision 184146)
+++ lra-constraints.c (working copy)
@@ -3795,12 +3795,12 @@ need_for_split_p (HARD_REG_SET potential
}
/* Return class for the split pseudo created from original pseudo with
- ALLOCNO_CLASS and MODE which got a hard register with
- HARD_REG_CLASS. We choose subclass of ALLOCNO_CLASS which results
- in no secondary memory movements. */
+ ALLOCNO_CLASS and MODE which got a hard register HARD_REGNO We
+ choose subclass of ALLOCNO_CLASS which contains HARD_REGNO and
+ results in no secondary memory movements. */
static enum reg_class
choose_split_class (enum reg_class allocno_class,
- enum reg_class hard_reg_class ATTRIBUTE_UNUSED,
+ int hard_regno ATTRIBUTE_UNUSED,
enum machine_mode mode ATTRIBUTE_UNUSED)
{
#ifndef SECONDARY_MEMORY_NEEDED
@@ -3808,15 +3808,14 @@ choose_split_class (enum reg_class alloc
#else
int i;
enum reg_class cl, best_cl = NO_REGS;
+ enum reg_class hard_reg_class = REGNO_REG_CLASS (hard_regno);
- if (allocno_class == hard_reg_class
- ! SECONDARY_MEMORY_NEEDED (hard_reg_class, hard_reg_class, mode))
-best_cl = hard_reg_class;
for (i = 0;
(cl = reg_class_subclasses[allocno_class][i]) != LIM_REG_CLASSES;
i++)
if (! SECONDARY_MEMORY_NEEDED (cl, hard_reg_class, mode)
! SECONDARY_MEMORY_NEEDED (hard_reg_class, cl, mode)
+ TEST_HARD_REG_BIT (reg_class_contents[cl], hard_regno)
(best_cl == NO_REGS
|| (hard_reg_set_subset_p (reg_class_contents[best_cl],
reg_class_contents[cl])
@@ -3860,9 +3859,6 @@ split_pseudo (bool before_p, int origina
if (lra_dump_file != NULL)
fprintf (lra_dump_file,
\n);
- rclass = choose_split_class (rclass,
- REGNO_REG_CLASS (reg_renumber[original_regno]),
- GET_MODE (original_reg));
if (call_save_p)
{
enum machine_mode sec_mode;
@@ -3877,6 +3873,21 @@ split_pseudo (bool before_p, int origina
}
else
{
+ rclass = choose_split_class (rclass,
+ reg_renumber[original_regno],
+ GET_MODE (original_reg));
+ if (rclass == NO_REGS)
+ {
+ if (lra_dump_file != NULL)
+ {
+ fprintf (lra_dump_file,
+ Rejecting split of %d: no good reg class\n,
+ original_regno);
+ fprintf (lra_dump_file,
+ \n);
+ }
+ return false;
+ }
new_reg = lra_create_new_reg (GET_MODE (original_reg), original_reg,
rclass, split);
reg_renumber[REGNO (new_reg)] = reg_renumber[original_regno];
Re: [PATCH][ARM,ifcvt] Improve use of conditional execution in thumb mode.
On 14/02/12 16:53, Andrew Stubbs wrote:
Hi all,
I've discovered that GCC does not use ARM conditional execution for
16-bit Thumb opcodes in many cases. It's fine for individual
instructions, but if-conversion of basic blocks with more than one
instruction fails.
E.g.
int
foo (int a, int b)
{
if (a != b)
{
a = a b;
a = a 1;
}
return a + b;
}
The current compiler gives:
foo:
cmp r0, r1
beq .L2
lslsr0, r0, r1
asrsr0, r0, #1
.L2:
addsr0, r0, r1
bx lr
With my patch I get this:
foo:
cmp r0, r1
itt ne
lslne r0, r0, r1
asrne r0, r0, #1
addsr0, r0, r1
bx lr
The problem comes from the fact that the compiler prefers lsls over
lsl because the former is a 16-bit encoding, and the latter a 32-bit
encoding. There's actually a peephole optimization defined to make this
happen wherever the CC register is not live.
This is fine in unconditional code, but the CC register clobber means
that it's only possible to convert it to conditional code if it is the
last instruction in the IT block, so if-conversion fails on the above
example.
My patch introduces a new target hook IFCVT_OVERRIDE_MODIFIED_TEST
that allows the CC clobber to be ignored on such instructions, and uses
IFCVT_MODIFY_INSN to convert from lsls to lslc where possible.
I've also introduced a new instruction attribute it_cc to indicate
which instruction patterns are affected.
OK for trunk, once stage 1 reopens?
Andrew
Bernds checked in a patch last year (or maybe even before that) to make
the selection of flags clobbered insns run very late (certainly after
condexec had run), so I'm not sure why you're not seeing this.
R.
ifcvt_modify_insn.patch
2012-02-14 Andrew Stubbs a...@codesourcery.com
gcc/
* config/arm/arm-protos.h (arm_ifcvt_modify_insn): New prototype.
(arm_ifcvt_override_modified_test): New prototype.
* config/arm/arm.c (thumb_insn_suitable_for_ifcvt): New function.
(arm_ifcvt_override_modified_test): New function.
(arm_ifcvt_modify_insn): New function.
* config/arm/arm.h (IFCVT_OVERRIDE_MODIFIED_TEST): New macro.
(IFCVT_MODIFY_INSN): New macro.
* config/arm/thumb2.md (it_cc): New attribute.
(thumb2_alusi3_short): Set it_cc attribute.
(thumb2_shiftsi3_short, thumb2_movmode_shortim): Likewise.
(thumb2_addsi_short, thumb2_subsi_short): Likewise.
(thumb2_mulsi_short, thumb2_one_cmplsi2_short): Likewise.
(thumb2_negsi2_short): Likewise.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (IFCVT_OVERRIDE_MODIFIED_TEST): Document.
* ifcvt.c (cond_exec_process_insns): Add IFCVT_OVERRIDE_MODIFIED_TEST.
gcc/testsuite/
* gcc.target/arm/thumb-ifcvt.c: New test case.
---
gcc/config/arm/arm-protos.h|5 ++
gcc/config/arm/arm.c | 67
gcc/config/arm/arm.h |5 ++
gcc/config/arm/thumb2.md | 11 +
gcc/doc/tm.texi| 13 +
gcc/doc/tm.texi.in | 13 +
gcc/ifcvt.c| 14 +-
gcc/testsuite/gcc.target/arm/thumb-ifcvt.c | 19
8 files changed, 146 insertions(+), 1 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/arm/thumb-ifcvt.c
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 296550a..67396f0 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -244,4 +244,9 @@ extern const struct tune_params *current_tune;
extern int vfp3_const_double_for_fract_bits (rtx);
#endif /* RTX_CODE */
+#ifdef BB_HEAD
+extern int arm_ifcvt_override_modified_test (rtx, rtx);
+extern rtx arm_ifcvt_modify_insn (ce_if_block_t *, rtx, rtx);
+#endif
+
#endif /* ! GCC_ARM_PROTOS_H */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 0bded8d..803e1c9 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -25139,5 +25139,72 @@ vfp3_const_double_for_fract_bits (rtx operand)
return 0;
}
+/* Find the portion of INSN that is suitable for if-conversion.
+
+ Some Thumb mode 16-bit instructions have two variants: one that is
+ unconditional but clobbers the condition flags, and one that is
+ conditional (in an IT block) and does not clobber anything.
+
+ There are 32-bit variants that are unconditional but don't clobber
+ anything, so the peephole2 pass adds the clobber in order to use the
+ smaller instruction encoding. Unfortunately this defeats the
+ if-conversion pass since CC must not be modified in an IT block.
+
+ The peephole can be reversed, and the instruction converted to
+ conditional execution without
RE: [Patch,AVR]: Built-in for non-contiguous port layouts
-Original Message- From: Georg-Johann Lay Sent: Monday, February 13, 2012 9:01 AM To: gcc-patches@gcc.gnu.org Cc: Weddington, Eric; Denis Chertykov Subject: [Patch,AVR]: Built-in for non-contiguous port layouts This patch set removes __builtin_avr_map8 __builtin_avr_map16 built-ins and implements a built-in __builtin_avr_insert_bits instead. Hi Johann, I'm just now starting to review this patch, but I have a quick question... In your avr_fold_builtin function you have switch (fcode) with only one case (and a default that just breaks). Are you planning to add more cases in the near future? If not, wouldn't it be better to just make it an 'if' statement? Thanks, Eric
Re: [PATCH][ARM,ifcvt] Improve use of conditional execution in thumb mode.
On 14/02/12 17:30, Richard Earnshaw wrote:
On 14/02/12 16:53, Andrew Stubbs wrote:
Hi all,
I've discovered that GCC does not use ARM conditional execution for
16-bit Thumb opcodes in many cases. It's fine for individual
instructions, but if-conversion of basic blocks with more than one
instruction fails.
E.g.
int
foo (int a, int b)
{
if (a != b)
{
a = a b;
a = a 1;
}
return a + b;
}
The current compiler gives:
foo:
cmp r0, r1
beq .L2
lslsr0, r0, r1
asrsr0, r0, #1
.L2:
addsr0, r0, r1
bx lr
With my patch I get this:
foo:
cmp r0, r1
itt ne
lslne r0, r0, r1
asrne r0, r0, #1
addsr0, r0, r1
bx lr
The problem comes from the fact that the compiler prefers lsls over
lsl because the former is a 16-bit encoding, and the latter a 32-bit
encoding. There's actually a peephole optimization defined to make this
happen wherever the CC register is not live.
This is fine in unconditional code, but the CC register clobber means
that it's only possible to convert it to conditional code if it is the
last instruction in the IT block, so if-conversion fails on the above
example.
My patch introduces a new target hook IFCVT_OVERRIDE_MODIFIED_TEST
that allows the CC clobber to be ignored on such instructions, and uses
IFCVT_MODIFY_INSN to convert from lsls to lslc where possible.
I've also introduced a new instruction attribute it_cc to indicate
which instruction patterns are affected.
OK for trunk, once stage 1 reopens?
Andrew
Bernds checked in a patch last year (or maybe even before that) to make
the selection of flags clobbered insns run very late (certainly after
condexec had run), so I'm not sure why you're not seeing this.
Hm, you mentioned some peepholes. Try removing them
R.
R.
ifcvt_modify_insn.patch
2012-02-14 Andrew Stubbs a...@codesourcery.com
gcc/
* config/arm/arm-protos.h (arm_ifcvt_modify_insn): New prototype.
(arm_ifcvt_override_modified_test): New prototype.
* config/arm/arm.c (thumb_insn_suitable_for_ifcvt): New function.
(arm_ifcvt_override_modified_test): New function.
(arm_ifcvt_modify_insn): New function.
* config/arm/arm.h (IFCVT_OVERRIDE_MODIFIED_TEST): New macro.
(IFCVT_MODIFY_INSN): New macro.
* config/arm/thumb2.md (it_cc): New attribute.
(thumb2_alusi3_short): Set it_cc attribute.
(thumb2_shiftsi3_short, thumb2_movmode_shortim): Likewise.
(thumb2_addsi_short, thumb2_subsi_short): Likewise.
(thumb2_mulsi_short, thumb2_one_cmplsi2_short): Likewise.
(thumb2_negsi2_short): Likewise.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (IFCVT_OVERRIDE_MODIFIED_TEST): Document.
* ifcvt.c (cond_exec_process_insns): Add IFCVT_OVERRIDE_MODIFIED_TEST.
gcc/testsuite/
* gcc.target/arm/thumb-ifcvt.c: New test case.
---
gcc/config/arm/arm-protos.h|5 ++
gcc/config/arm/arm.c | 67
gcc/config/arm/arm.h |5 ++
gcc/config/arm/thumb2.md | 11 +
gcc/doc/tm.texi| 13 +
gcc/doc/tm.texi.in | 13 +
gcc/ifcvt.c| 14 +-
gcc/testsuite/gcc.target/arm/thumb-ifcvt.c | 19
8 files changed, 146 insertions(+), 1 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/arm/thumb-ifcvt.c
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 296550a..67396f0 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -244,4 +244,9 @@ extern const struct tune_params *current_tune;
extern int vfp3_const_double_for_fract_bits (rtx);
#endif /* RTX_CODE */
+#ifdef BB_HEAD
+extern int arm_ifcvt_override_modified_test (rtx, rtx);
+extern rtx arm_ifcvt_modify_insn (ce_if_block_t *, rtx, rtx);
+#endif
+
#endif /* ! GCC_ARM_PROTOS_H */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 0bded8d..803e1c9 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -25139,5 +25139,72 @@ vfp3_const_double_for_fract_bits (rtx operand)
return 0;
}
+/* Find the portion of INSN that is suitable for if-conversion.
+
+ Some Thumb mode 16-bit instructions have two variants: one that is
+ unconditional but clobbers the condition flags, and one that is
+ conditional (in an IT block) and does not clobber anything.
+
+ There are 32-bit variants that are unconditional but don't clobber
+ anything, so the peephole2 pass adds the clobber in order to use the
+ smaller instruction encoding. Unfortunately this defeats the
+ if-conversion pass since CC must not be modified in an IT block.
+
+ The peephole can be
[wwwdocs] add information on TILE-Gx/TILEPro ports
This patch adds information on the Tile-Gx/TILEPro ports to wwwdocs. Ok to commit? (assuming I have commit rights which I have not tried.) Thanks, Walter Index: backends.html === RCS file: /cvs/gcc/wwwdocs/htdocs/backends.html,v retrieving revision 1.42 diff -u -p -r1.42 backends.html --- backends.html 5 Nov 2011 20:55:57 - 1.42 +++ backends.html 14 Feb 2012 17:24:36 - @@ -99,6 +99,8 @@ sh | Q CB qr da sparc| Q CB qr pda spu | ? Q *C p g bd stormy16 | ???L FIC D l p m a +tilegx | S Q Cq p g bda e +tilepro | S F C p g bda e v850 | ??FI cp gm d s vax | M?I cp a e xtensa | ? C p bd Index: index.html === RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v retrieving revision 1.833 diff -u -p -r1.833 index.html --- index.html 12 Feb 2012 18:55:35 - 1.833 +++ index.html 14 Feb 2012 17:24:36 - @@ -53,6 +53,11 @@ mission statement/a./p dl class=news +dtspanTILE-Gx and TILEPro processor support/span +span class=date[2012-02-14]/span/dt +ddPorts for the TILE-Gx and TILEPro families of processors have been +contributed by Tilera./dd + dtspanAtomic memory model support/span span class=date[2011-11-06]/span/dt ddC++11/C11 a href=http://gcc.gnu.org/wiki/Atomic/GCCMM;memory model/a Index: readings.html === RCS file: /cvs/gcc/wwwdocs/htdocs/readings.html,v retrieving revision 1.216 diff -u -p -r1.216 readings.html --- readings.html 5 Nov 2011 20:55:57 - 1.216 +++ readings.html 14 Feb 2012 17:24:36 - @@ -263,6 +263,16 @@ Intelreg;64 and IA-32 Architectures Sof br /Acronym stands for: Scalable Processor ARChitecture /li + litilegx + br /Manufacturer: Tilera + br /a href=http://www.tilera.com/scm/docs/index.html;Documentation/a + /li + + litilepro + br /Manufacturer: Tilera + br /a href=http://www.tilera.com/scm/docs/index.html;Documentation/a + /li + liv850 br /Manufacturer: NEC /li Index: gcc-4.7/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v retrieving revision 1.82 diff -u -p -r1.82 changes.html --- gcc-4.7/changes.html13 Feb 2012 21:57:31 - 1.82 +++ gcc-4.7/changes.html14 Feb 2012 17:24:37 - @@ -715,6 +715,11 @@ well./p/li default on UltraSPARC T3 (Niagara 3) and later CPUs./li /ul +h3TILE-Gx/TILEPro/h3 + ul +liSupport has been added for the Tilera TILE-Gx and TILEPro families of + processors./li + /ul !-- h2Documentation improvements/h2
Re: PR middle-end/52141: ICE due to asm statement
On 02/14/2012 08:46 AM, Aldy Hernandez wrote:
The call to ipa_tm_diagnose_tm_safe() does nothing because there are no
longer any calls in the function, since the function call has been inlined:
f ()
{
bb 2:
__asm__ __volatile__();
return;
}
Perhaps we could issue the error when we notice the GIMPLE_ASM while scanning
for irrevocable blocks earlier. The attached patch does so, and fixes the PR.
What am I missing, cause I *know* there's a rat's nest somewhere.
Ug.
Which means that the error message is all too likely simply be confusing
rather than anything else, since the asm isn't lexically present in the
transaction.
I wonder, not for the first time, if we shouldn't simply turn off early
inlining with TM, or at least of and into tm-related functions, such as
this. I assume that the IPA inlining pass would take up the slack...
r~
libgo patch committed: Fix hash function for big-endian 32bit systems
This libgo patch fixes the identity hash function for big-endian 32-bit systems. Before this patch the hash code for a 32-bit value always turned out to be zero on a big-endian 32-bit system. This patch fixes the problem. Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu. Committed to mainline. Ian diff -r fcaf380a2380 libgo/runtime/go-type-identity.c --- a/libgo/runtime/go-type-identity.c Mon Feb 13 16:31:57 2012 -0800 +++ b/libgo/runtime/go-type-identity.c Tue Feb 14 09:59:20 2012 -0800 @@ -32,7 +32,10 @@ } u; u.v = 0; __builtin_memcpy (u.a, key, key_size); - return (uintptr_t) u.v; + if (sizeof (uintptr_t) = 8) + return (uintptr_t) u.v; + else + return (uintptr_t) ((u.v 32) ^ (u.v 0x)); } ret = 5381;
PR middle-end/52142: disallow inlining of certain TM_pure functions
Here we inline a transaction_pure function into a non transaction_pure
function, but end up instrumenting all the memory operations in the
tm_pure function regardless.
As discussed in the PR, we should've disallowed inlining of TM_pure
functions into non TM_pure functions. We are currently only disabling a
subset of this, tm_safe callers. The patch below disallows all inlining
of TM_pure functions into non TM_pure functions.
No regressions.
OK? (I'm not sure whether the looks good was because I'm handsome, or
because it was an actual approval).
PR middle-end/52142
* ipa-inline.c (can_inline_edge_p): Do not inline tm_pure
functions into non-tm_pure functions.
Index: testsuite/gcc.dg/tm/pr52142.c
===
--- testsuite/gcc.dg/tm/pr52142.c (revision 0)
+++ testsuite/gcc.dg/tm/pr52142.c (revision 0)
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options -fgnu-tm -O1 } */
+static int global = 0;
+
+__attribute__((transaction_pure))
+static inline void purefunc()
+{
+ global++;
+}
+
+__attribute__((transaction_safe))
+void f();
+
+void push()
+{
+ __transaction_atomic {
+f();
+purefunc();
+ }
+}
+
+/* { dg-final { scan-assembler-not _ITM_RfWU4 } } */
Index: ipa-inline.c
===
--- ipa-inline.c(revision 184181)
+++ ipa-inline.c(working copy)
@@ -284,10 +284,10 @@ can_inline_edge_p (struct cgraph_edge *e
e-inline_failed = CIF_EH_PERSONALITY;
inlinable = false;
}
- /* TM pure functions should not get inlined if the outer function is
- a TM safe function. */
+ /* TM pure functions should not be inlined into non-TM_pure
+ functions. */
else if (is_tm_pure (callee-decl)
- is_tm_safe (e-caller-decl))
+ !is_tm_pure (e-caller-decl))
{
e-inline_failed = CIF_UNSPECIFIED;
inlinable = false;
Re: [PATCH, libitm]: GTM_longjmp: Jump indirect from memory address
On 02/13/2012 11:54 PM, Uros Bizjak wrote: movq48(%rsi), %r15 - movq56(%rsi), %rdx movl%edi, %eax + cfi_offset(%rip, 56) cfi_def_cfa(%rcx, 0) - cfi_register(%rip, %rdx) movq%rcx, %rsp - jmp *%rdx + jmp *56(%rsi) I'm sorry, I was mistaken earlier. The rip value is not at CFA+56, it's at RSI+56. The way to describe this is cfi_def_cfa(%rsi, 0) cfi_offset(%rip, 56) cfi_register(%rsp, %rcx) r~
Re: PR middle-end/52142: disallow inlining of certain TM_pure functions
On 02/14/2012 10:04 AM, Aldy Hernandez wrote: PR middle-end/52142 * ipa-inline.c (can_inline_edge_p): Do not inline tm_pure functions into non-tm_pure functions. Ok. r~
Re: [PATCH, libitm]: GTM_longjmp: Jump indirect from memory address
On Tue, Feb 14, 2012 at 7:07 PM, Richard Henderson r...@redhat.com wrote:
On 02/13/2012 11:54 PM, Uros Bizjak wrote:
movq 48(%rsi), %r15
- movq 56(%rsi), %rdx
movl %edi, %eax
+ cfi_offset(%rip, 56)
cfi_def_cfa(%rcx, 0)
- cfi_register(%rip, %rdx)
movq %rcx, %rsp
- jmp *%rdx
+ jmp *56(%rsi)
I'm sorry, I was mistaken earlier. The rip value is not at CFA+56, it's at
RSI+56.
The way to describe this is
cfi_def_cfa(%rsi, 0)
cfi_offset(%rip, 56)
cfi_register(%rsp, %rcx)
Yes, IMO this now describes correct CFA handling. Following follow-on
patch corrects this issue (and also puts .cfi directions to the place
where they make most sense, mainly a cosmetic change).
Re-tested on x86_64-pc-linux-gnu {,-m32} and committed.
Thanks,
Uros.
Index: config/x86/sjlj.S
===
--- config/x86/sjlj.S (revision 184213)
+++ config/x86/sjlj.S (working copy)
@@ -112,6 +112,7 @@
SYM(GTM_longjmp):
cfi_startproc
#ifdef __x86_64__
+ cfi_def_cfa(%rsi, 0)
movq(%rsi), %rcx
movq8(%rsi), %rbx
movq16(%rsi), %rbp
@@ -119,20 +120,21 @@
movq32(%rsi), %r13
movq40(%rsi), %r14
movq48(%rsi), %r15
+ cfi_offset(%rip, 56)
movl%edi, %eax
- cfi_offset(%rip, 56)
- cfi_def_cfa(%rcx, 0)
movq%rcx, %rsp
+ cfi_register(%rsp, %rcx)
jmp *56(%rsi)
#else
+ cfi_def_cfa(%edx, 0)
movl(%edx), %ecx
movl4(%edx), %ebx
movl8(%edx), %esi
movl12(%edx), %edi
movl16(%edx), %ebp
cfi_offset(%eip, 20)
- cfi_def_cfa(%ecx, 0)
movl%ecx, %esp
+ cfi_register(%esp, %ecx)
jmp *20(%edx)
#endif
cfi_endproc
[Patch,AVR] Add xmega support
This patch adds support for xmega cores and does the following: * Add architectures avrxmega2/4/5/6/7 to avr-devices.c * Add some xmega MCUs to avr-mcus.def * Add new function avr.c:avr_out_movhi_mr_r_xmega that works similar to out_movhi_mr_r except that the low byte is output first. Rationale is that writing SP_L triggers an atomic block of 4 ticks so that no IRQ-disabling is needed when setting SP. * Similar rationale behind changes to __prologue_saves__ and __epilogue_restores__ from libgcc. * ISR pro- and epilogue save/restore RAMPD/X/Y/Z as needed. * At file start, definitions for CCP/RAMPD/X/Y are printed. * While printing asm, RAMPD/X/Y are detected and printed by their name instead of by their I/O address. * Some built-in defines are added The architecture names and MCU assignments follow binutils ./gas/config/tc-avr.c so that the compiler is in sync with binutils. I don't see a reason to have both avrxmega2 and avrxmega4 because from the compiler's perspective they are the same; but that's obviously how things are implemented. There is no native support for big-RAM devices and I can hardly image GCC (in particular IRA/reload) can cope with a modelling of 3-byte RAM pointers. But that's a different story... It might be easier for the compiler if crucial SFRs are not modelled by MEM but as REG instead, but for that change I don't know enough about debugging formats and impact on gdb. Maybe Richard can comment on that? Ok for trunk? Johann libgcc/ Anatoly Sokolov Eric Weddington * config/avr/lib1funcs.S (__prologue_saves__): Handle AVR_XMEGA (__epilogue_restores__): Ditto. gcc/ Anatoly Sokolov Eric Weddington * config/avr/avr-devices.c (avr_arch_types): Add avrxmega2, avrxmega4, avrxmega5, avrxmega6, avrxmega7. Rewrite initializers for .macro. * config/avr/avr-mcus.def (AVR_MCU): Add known MCUs: avrxmega2: atxmega16a4, atxmega16d4, atxmega16x1, atxmega32a4 atxmega32d4, atxmega32x1. avrxmega4: atxmega64a3, atxmega64d3. avrxmega5: atxmega64a1, atxmega64a1u. avrxmega6: atxmega128a3, atxmega128d3, atxmega192a3, atxmega192d3, atxmega256a3, atxmega256a3b, atxmega256a3bu, atxmega256d3. avrxmega7: atxmega128a1, atxmega128a1u. * config/avr/multilib.h: Regenerate. * config/avr/t-multilib: Regenerate. * config/avr/avr-tables.opt: Regenerate. * config/avr/avr.h (enum avr_arch): Add: ARCH_AVRXMEGA2, ARCH_AVRXMEGA4, ARCH_AVRXMEGA5, ARCH_AVRXMEGA6, ARCH_AVRXMEGA7. (struct base_arch_s): Rename reserved to xmega_p. Rename reserved2 to have_rampd. (AVR_XMEGA): New define. (AVR_HAVE_RAMPD, AVR_HAVE_RAMPX, AVR_HAVE_RAMPY): New defines. (AVR_HAVE_RAMPZ): Change definition to fit xmega. * config/avr/predicates.md (io_address_operand): Take into account SFR offset. (low_io_address_operand): Ditto. (high_io_address_operand): Ditto. * config/avr/avr.md (isa): Add alternatives no_xmega, xmega. (enabled, movhi_sp_r): Use them. * config/avr/avr-c.c (avr_cpu_cpp_builtins): Use cpp_define_formatted to built-in define __AVR_ARCH__. (__AVR_XMEGA__): New built-in define. (__AVR_HAVE_RAMPD__): New built-in define. (__AVR_HAVE_RAMPX__): New built-in define. (__AVR_HAVE_RAMPY__): New built-in define. (__AVR_HAVE_RAMPZ__): Change condition when to built-in define it. * config/avr/avr.c (avr_addr_t): Add ccp, rampd, rampx, rampy. (avr_option_override): Initialize them. (sreg_rtx, rampd_rtx, rampx_rtx, rampy_rtx): New GTY rtx. (avr_init_expanders): Initialize them. No more block several calls. (emit_push_sfr): New static function. (avr_prologue_setup_frame): Use it to push SREG, RAMPD/X/Y/Z as needed. Handle AVR_XMEGA. (expand_epilogue): Handle AVR_XMEGA. Pop RAMPD/X/Y/Z as needed. (avr_print_operand): Print addreeses as symbols for RAMPX, RAMPY, RAMPD, CCP. (output_movhi): Handle AVR_XMEGA when writing to SP. (avr_out_movhi_mr_r_xmega): New static function. (out_movhi_mr_r): Forward to avr_out_movhi_mr_r_xmega for AVR_XMEGA. (avr_file_start): Print symbol defines for __RAMPX__, __RAMPY__, __RAMPD__, __CCP__ as needed. Index: libgcc/config/avr/lib1funcs.S === --- libgcc/config/avr/lib1funcs.S (revision 183939) +++ libgcc/config/avr/lib1funcs.S (working copy) @@ -1696,6 +1696,13 @@ DEFUN __prologue_saves__ sub r28,r26 out __SP_L__,r28 clr r29 +#elif defined (__AVR__XMEGA__) + in r28,__SP_L__ + in r29,__SP_H__ + sub r28,r26 + sbc r29,r27 + out __SP_L__,r28 + out __SP_H__,r29 #else in r28,__SP_L__ in r29,__SP_H__ @@ -1745,6 +1752,13 @@ DEFUN __epilogue_restores__ add r28,r30 out
Go patch committed: Fix gccgo cross-install name
PR 48411 points out that when cross-compiling gccgo is being installed under the name $(TARGET)-$(TARGET)-gccgo. This patch fixes it by making it behave like cp/Make-lang.in. Bootstrapped on x86_64-unknown-linux-gnu. Committed to mainline. Ian 2012-02-14 Ian Lance Taylor i...@google.com PR go/48411 * Make-lang.in (gccgo-cross$(exeext)): New target. (go.all.cross): Depend on gccgo-cross$(exeext) instead of gccgo$(exeext). (go.install-common): Only install GCCGO_TARGET_INSTALL_NAME if gccgo-cross$(exeext) does not exist. Index: gcc/go/Make-lang.in === --- gcc/go/Make-lang.in (revision 184188) +++ gcc/go/Make-lang.in (working copy) @@ -42,6 +42,13 @@ gccgo$(exeext): $(GCCGO_OBJS) $(EXTRA_GC $(GCCGO_OBJS) $(EXTRA_GCC_OBJS) libcommon-target.a \ $(EXTRA_GCC_LIBS) $(LIBS) +# The cross-compiler version. This is built mainly as a signal to the +# go.install-common target. If this executable exists, it means that +# go.all.cross was run. +gccgo-cross$(exeext): gccgo$(exeext) + -rm -f gccgo-cross$(exeext) + cp gccgo$(exeext) gccgo-cross$(exeext) + # Use strict warnings. go-warn = $(STRICT_WARN) @@ -107,7 +114,7 @@ gccgo.pod: go/gccgo.texi # Build hooks. -go.all.cross: gccgo$(exeext) +go.all.cross: gccgo-cross$(exeext) go.start.encap: gccgo$(exeext) go.rest.encap: go.info: doc/gccgo.info @@ -136,13 +143,15 @@ check_go_parallelize = go-test.exp=*/tes go.install-common: installdirs -rm -f $(DESTDIR)$(bindir)/$(GCCGO_INSTALL_NAME)$(exeext) - -rm -f $(DESTDIR)$(bindir)/$(GCCGO_TARGET_INSTALL_NAME)$(exeext) $(INSTALL_PROGRAM) gccgo$(exeext) $(DESTDIR)$(bindir)/$(GCCGO_INSTALL_NAME)$(exeext) - if test -f $(DESTDIR)$(bindir)$(GCCGO_TARGET_INSTALL_NAME)$(exeext); then \ - :; \ - else \ - cd $(DESTDIR)$(bindir) \ - $(LN) $(GCCGO_INSTALL_NAME)$(exeext) $(GCCGO_TARGET_INSTALL_NAME)$(exeext); \ + -if test -f go1$(exeext); then \ + if test -f gccgo-cross$(exeext); then \ + :; \ + else \ + rm -f $(DESTDIR)$(bindir)/$(GCCGO_TARGET_INSTALL_NAME)$(exeext); \ + ( cd $(DESTDIR)$(bindir) \ + $(LN) $(GCCGO_INSTALL_NAME)$(exeext) $(GCCGO_TARGET_INSTALL_NAME)$(exeext) ); \ + fi; \ fi go.install-plugin:
[google]Emit GNU-stack note for arm targets by default (issue5649090)
arm-eabi toolchain needs GNU-stack note for security purpose. Will Keep this patch in google branches. OK for google/main? I would like to port this patch to google/gcc-4_6, google/gcc-4_6-mobile, google/gcc-4_6_2-moible. 2012-02-14 Jing Yu jin...@google.com Google ref 42402-p2 * config/arm/arm.h: Emit GNU-stack note for all arm targets by default. Index: gcc/config/arm/arm.h === --- gcc/config/arm/arm.h(revision 184221) +++ gcc/config/arm/arm.h(working copy) @@ -2157,9 +2157,9 @@ : arm_gen_return_addr_mask ()) -/* Do not emit .note.GNU-stack by default. */ +/* Do emit .note.GNU-stack by default. */ #ifndef NEED_INDICATE_EXEC_STACK -#define NEED_INDICATE_EXEC_STACK 0 +#define NEED_INDICATE_EXEC_STACK 1 #endif /* The maximum number of parallel loads or stores we support in an ldm/stm -- This patch is available for review at http://codereview.appspot.com/5649090
libgo patch committed: Change Dup2 to only return an error
In the master Go library the syscall.Dup2 function was changed to only
return an error, rather than returning both the new file descriptor and
and an error (when there is no error the new file descriptor is always
the second argument anyhow). This patch makes the same change to
libgo. Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu.
Committed to mainline.
Ian
diff -r eb004a41aa88 libgo/go/syscall/exec_bsd.go
--- a/libgo/go/syscall/exec_bsd.go Tue Feb 14 10:00:14 2012 -0800
+++ b/libgo/go/syscall/exec_bsd.go Tue Feb 14 11:34:01 2012 -0800
@@ -136,9 +136,8 @@
// so that pass 2 won't stomp on an fd it needs later.
nextfd = int(len(fd))
if pipe nextfd {
- _, err2 := Dup2(pipe, nextfd)
- if err2 != nil {
- err1 = err2.(Errno)
+ err1 = raw_dup2(pipe, nextfd)
+ if err1 != 0 {
goto childerror
}
raw_fcntl(nextfd, F_SETFD, FD_CLOEXEC)
@@ -147,9 +146,8 @@
}
for i = 0; i len(fd); i++ {
if fd[i] = 0 fd[i] int(i) {
- _, err2 := Dup2(fd[i], nextfd)
- if err2 != nil {
-err1 = err2.(Errno)
+ err1 = raw_dup2(fd[i], nextfd)
+ if err1 != 0 {
goto childerror
}
raw_fcntl(nextfd, F_SETFD, FD_CLOEXEC)
@@ -178,9 +176,8 @@
}
// The new fd is created NOT close-on-exec,
// which is exactly what we want.
- _, err2 := Dup2(fd[i], i)
+ err1 = raw_dup2(fd[i], i)
if err1 != 0 {
- err1 = err2.(Errno)
goto childerror
}
}
diff -r eb004a41aa88 libgo/go/syscall/exec_linux.go
--- a/libgo/go/syscall/exec_linux.go Tue Feb 14 10:00:14 2012 -0800
+++ b/libgo/go/syscall/exec_linux.go Tue Feb 14 11:34:01 2012 -0800
@@ -161,9 +161,8 @@
// so that pass 2 won't stomp on an fd it needs later.
nextfd = int(len(fd))
if pipe nextfd {
- _, err2 := Dup2(pipe, nextfd)
- if err2 != nil {
- err1 = err2.(Errno)
+ err1 = raw_dup2(pipe, nextfd)
+ if err1 != 0 {
goto childerror
}
raw_fcntl(nextfd, F_SETFD, FD_CLOEXEC)
@@ -172,9 +171,8 @@
}
for i = 0; i len(fd); i++ {
if fd[i] = 0 fd[i] int(i) {
- _, err2 := Dup2(fd[i], nextfd)
- if err2 != nil {
-err1 = err2.(Errno)
+ err1 = raw_dup2(fd[i], nextfd)
+ if err1 != 0 {
goto childerror
}
raw_fcntl(nextfd, F_SETFD, FD_CLOEXEC)
@@ -203,9 +201,8 @@
}
// The new fd is created NOT close-on-exec,
// which is exactly what we want.
- _, err2 := Dup2(fd[i], i);
- if err2 != nil {
- err1 = err2.(Errno)
+ err1 = raw_dup2(fd[i], i)
+ if err1 != 0 {
goto childerror
}
}
diff -r eb004a41aa88 libgo/go/syscall/exec_unix.go
--- a/libgo/go/syscall/exec_unix.go Tue Feb 14 10:00:14 2012 -0800
+++ b/libgo/go/syscall/exec_unix.go Tue Feb 14 11:34:01 2012 -0800
@@ -47,6 +47,9 @@
//sysnb raw_exit(status int)
//_exit(status int)
+//sysnb raw_dup2(oldfd int, newfd int) (err Errno)
+//dup2(oldfd int, newfd int) int
+
// Note: not raw, returns error rather than Errno.
//sys read(fd int, p *byte, np int) (n int, err error)
//read(fd int, buf *byte, count Size_t) Ssize_t
diff -r eb004a41aa88 libgo/go/syscall/libcall_posix.go
--- a/libgo/go/syscall/libcall_posix.go Tue Feb 14 10:00:14 2012 -0800
+++ b/libgo/go/syscall/libcall_posix.go Tue Feb 14 11:34:01 2012 -0800
@@ -178,7 +178,7 @@
//sysnb Dup(oldfd int) (fd int, err error)
//dup(oldfd int) int
-//sysnb Dup2(oldfd int, newfd int) (fd int, err error)
+//sysnb Dup2(oldfd int, newfd int) (err error)
//dup2(oldfd int, newfd int) int
//sys Exit(code int)
Re: [google]Emit GNU-stack note for arm targets by default (issue5649090)
ok. On Tue, Feb 14, 2012 at 11:34 AM, Jing Yu jin...@google.com wrote: arm-eabi toolchain needs GNU-stack note for security purpose. Will Keep this patch in google branches. OK for google/main? I would like to port this patch to google/gcc-4_6, google/gcc-4_6-mobile, google/gcc-4_6_2-moible. 2012-02-14 Jing Yu jin...@google.com Google ref 42402-p2 * config/arm/arm.h: Emit GNU-stack note for all arm targets by default. Index: gcc/config/arm/arm.h === --- gcc/config/arm/arm.h (revision 184221) +++ gcc/config/arm/arm.h (working copy) @@ -2157,9 +2157,9 @@ : arm_gen_return_addr_mask ()) -/* Do not emit .note.GNU-stack by default. */ +/* Do emit .note.GNU-stack by default. */ #ifndef NEED_INDICATE_EXEC_STACK -#define NEED_INDICATE_EXEC_STACK 0 +#define NEED_INDICATE_EXEC_STACK 1 #endif /* The maximum number of parallel loads or stores we support in an ldm/stm -- This patch is available for review at http://codereview.appspot.com/5649090
libgo patch committed: Don't put .gox files in version-specific dirs
The .gox files are always put in directories whose names include the gcc
version number and the target name. This is because the .gox files are
version specific and not backward compatible. PR 48410 points out that
when using the --enable-version-specific-runtime-libs configure option,
this caused the .gox files to be put in a directory which included the
verison number and target twice, which is useless. This patch fixes the
problem by ignoring --enable-version-specific-runtime-libs for the .gox
files. Bootstrapped on x86_64-unknown-linux-gnu. Committed to
mainline.
Ian
diff -r 201e3b7018f9 libgo/Makefile.am
--- a/libgo/Makefile.am Tue Feb 14 11:35:12 2012 -0800
+++ b/libgo/Makefile.am Tue Feb 14 11:36:44 2012 -0800
@@ -25,6 +25,7 @@
toolexecdir = $(glibgo_toolexecdir)
toolexeclibdir = $(glibgo_toolexeclibdir)
+toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias)
LIBFFI = @LIBFFI@
LIBFFIINCS = @LIBFFIINCS@
@@ -97,8 +98,6 @@
toolexeclib_LTLIBRARIES = libgo.la
toolexeclib_LIBRARIES = libgobegin.a
-toolexeclibgodir = $(toolexeclibdir)/go/$(gcc_version)/$(target_alias)
-
toolexeclibgo_DATA = \
bufio.gox \
bytes.gox \
diff -r 201e3b7018f9 libgo/configure.ac
--- a/libgo/configure.ac Tue Feb 14 11:35:12 2012 -0800
+++ b/libgo/configure.ac Tue Feb 14 11:36:44 2012 -0800
@@ -58,7 +58,6 @@
glibgo_toolexecdir=no
glibgo_toolexeclibdir=no
-glibgo_prefixdir=$prefix
AC_MSG_CHECKING([for --enable-version-specific-runtime-libs])
AC_ARG_ENABLE([version-specific-runtime-libs],
@@ -80,25 +79,28 @@
# Calculate glibgo_toolexecdir, glibgo_toolexeclibdir
# Install a library built with a cross compiler in tooldir, not libdir.
+if test -n $with_cross_host
+ test x$with_cross_host != xno; then
+ nover_glibgo_toolexecdir='${exec_prefix}/${host_alias}'
+ nover_glibgo_toolexeclibdir='${toolexecdir}/lib'
+else
+ nover_glibgo_toolexecdir='${libdir}/gcc/${host_alias}'
+ nover_glibgo_toolexeclibdir='${libdir}'
+fi
+multi_os_directory=`$CC -print-multi-os-directory`
+case $multi_os_directory in
+ .) ;; # Avoid trailing /.
+ *) nover_glibgo_toolexeclibdir=${nover_glibgo_toolexeclibdir}/${multi_os_directory} ;;
+esac
+
if test x$glibgo_toolexecdir = xno; then
- if test -n $with_cross_host
- test x$with_cross_host != xno; then
-glibgo_toolexecdir='${exec_prefix}/${host_alias}'
-glibgo_toolexeclibdir='${toolexecdir}/lib'
- else
-glibgo_toolexecdir='${libdir}/gcc/${host_alias}'
-glibgo_toolexeclibdir='${libdir}'
- fi
- multi_os_directory=`$CC -print-multi-os-directory`
- case $multi_os_directory in
-.) ;; # Avoid trailing /.
-*) glibgo_toolexeclibdir=$glibgo_toolexeclibdir/$multi_os_directory ;;
- esac
+ glibgo_toolexecdir=${nover_glibgo_toolexecdir}
+ glibgo_toolexeclibdir=${nover_glibgo_toolexeclibdir}
fi
-AC_SUBST(glibgo_prefixdir)
AC_SUBST(glibgo_toolexecdir)
AC_SUBST(glibgo_toolexeclibdir)
+AC_SUBST(nover_glibgo_toolexeclibdir)
# See if the user wants to configure without libffi. Some
# architectures don't support it. FIXME: We should set a default
Re: PR middle-end/52142: disallow inlining of certain TM_pure functions
On 02/14/2012 10:39 AM, Torvald Riegel wrote: Will it inline transaction_pure into transaction_callable too? That would not be good if we actually instrument the transaction_callable. No, it restricts pure into pure and into nothing else. Inlining transaction_pure into completely nontransactional code is fine though. We don't know what is in fact nontransactional code until we've examined the entire call graph. And as far as the information available at the spot that Aldy is patching, we don't have all the call graph info anyway. r~
RE: [Patch,AVR]: Built-in for non-contiguous port layouts
-Original Message- From: Georg-Johann Lay Sent: Tuesday, February 14, 2012 10:52 AM To: Weddington, Eric Cc: gcc-patches@gcc.gnu.org; Denis Chertykov Subject: Re: [Patch,AVR]: Built-in for non-contiguous port layouts Weddington, Eric wrote: This patch set removes __builtin_avr_map8 __builtin_avr_map16 built-ins and implements a built-in __builtin_avr_insert_bits instead. In your avr_fold_builtin function you have switch (fcode) with only one case (and a default that just breaks). Are you planning to add more cases in the near future? If not, wouldn't it be better to just make it an 'if' statement? The intention was to facilitate adding of other folds by means of other case entries. Folding swap is pretty much trivial for example. And someone proposed adding things like __builtin_avr_memx_flash_p resp. __builtin_avr_memx_ram_p that could also be folded easily. Ok, thanks. Please commit. Eric
RE: [Patch,AVR] Add xmega support
-Original Message- From: Georg-Johann Lay Sent: Tuesday, February 14, 2012 11:52 AM To: gcc-patches@gcc.gnu.org Cc: Weddington, Eric; Denis Chertykov; Anatoly Sokolov Subject: [Patch,AVR] Add xmega support This patch adds support for xmega cores and does the following: Please commit. And thanks! :-) Eric
Re: [PATCH] Fix cgraph verification (PR middle-end/51929)
On Tue, Feb 14, 2012 at 11:12:31AM -0800, Jason Merrill wrote: On 02/10/2012 06:25 AM, Jakub Jelinek wrote: PR middle-end/51929 * cgraphunit.c (verify_edge_corresponds_to_fndecl): If node is a same_body_alias, also test whether e-callee isn't a former or current clone of the decl this is a same body alias of. Do we want a similar change to the use of former_clone_of in cgraph_update_edges_for_call_stmt_node? Maybe we should wrap the I don't think so. new_call in that case is what we are changing the call to, and we should never change some call into a call to same body alias function, calls to same body alias functions should be just those that haven't been changed yet. former_clone_of checking in a function to make that simpler. Jakub
Re: Patch: fix std::unordered_map (et al) pretty printer
On 14 February 2012 20:16, Tom Tromey wrote: Ok? OK, thanks!
Re: [PATCH] Fix cgraph verification (PR middle-end/51929)
On 02/14/2012 11:49 AM, Jakub Jelinek wrote: Do we want a similar change to the use of former_clone_of in cgraph_update_edges_for_call_stmt_node? I don't think so. Then let's say the patch is OK tomorrow unless Jan objects today. Jason
Re: [Patch,AVR] Add xmega support
Weddington, Eric schrieb: This patch adds support for xmega cores and does the following: Please commit. And thanks! :-) Eric As I wrote, the device - core assignments are the same as in ./gas/config/tc-avr.c: http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-avr.c?rev=1.79content-type=text/x-cvsweb-markupcvsroot=src which I don't understand. The assignments are: avrxmega2: ELPM=0, RAMPD=0, EIND=0 atxmega16a4 atxmega16d4 atxmega16x1 atxmega32a4 atxmega32d4 atxmega32x1 avrxmega4: ELPM=0, RAMPD=0, EIND=0 atxmega64a3 atxmega64d3 avrxmega5: ELPM=0, RAMPD=1, EIND=0 atxmega64a1 atxmega64a1u avrxmega6: ELPM=1, RAMPD=0, EIND=0/1 atxmega128a3 atxmega128b1 atxmega128d3 atxmega192a3 atxmega192d3 atxmega256a3 atxmega256a3b atxmega256a3bu atxmega256d3 avrxmega7: ELPM=1, RAMPD=1, EIND=0 atxmega128a1 atxmega128a1u Thus: * xmega2 and xmega4 are duplicates of each other * xmega6 mixes devices with EIND (128 KiB Flash) with non-EIND (= KiB Flash) devices. There are 8 combinations in the ELPM x RAMPD x EIND cross product. As EIND implies ELPM, 6 combinations remain: ELPM=0, RAMPD=0, EIND=0 - xmega2 = xmega4 ELPM=0, RAMPD=1, EIND=0 - xmega5 ELPM=1, RAMPD=0, EIND=0 - xmega6 *clash* ELPM=1, RAMPD=0, EIND=1 - xmega6 *clash* ELPM=1, RAMPD=1, EIND=0 - xmega7 ELPM=1, RAMPD=1, EIND=1 - --- Can you shed some light on that? The current non-xmega architectures assume that only devices with the same amount of flash segments are present in one archirecture. This is no more true with 192 KiB devices that have 3 segments and are in the same arch with 4-segment and/or 2-segment devices. An ISA-question: Is xmega ISA binary upward compatible to respective non-xmega, i.e. can the same ISA simulator be used, for example? The patches are untested because avrtest does not support xmega. Would you run tests and compare results for ATmega128 against, for example ATXmega128A3? There should be no differences and the same out-of-flash or out-of-ram crashes. Do you have an update for avrtest? I had a look into it but it's complete mess because GPRs are accessed by their RAM address and it would take some time to clean up that mess. Johann
libgo patch committed: Permit building without libffi
This patch to libgo permits building libgo when using --without-libffi.
This is mainly to aid porting. The resulting libgo has some
limitations. Finalizers use libffi, and finalizers are used to arrange
for the garbage collector to close open files when they are garbage
collected. So using libgo built this way means that you must be careful
to explicitly close any open files. Also the reflect.Call function will
not work; it is used by things like the net/rpc package.
Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu.
Committed to mainline.
Ian
diff -r 86e58c4837fc libgo/runtime/go-reflect-call.c
--- a/libgo/runtime/go-reflect-call.c Tue Feb 14 11:38:04 2012 -0800
+++ b/libgo/runtime/go-reflect-call.c Tue Feb 14 12:37:22 2012 -0800
@@ -8,13 +8,17 @@
#include stdint.h
#include stdlib.h
-#include ffi.h
+#include config.h
#include go-alloc.h
#include go-assert.h
#include go-type.h
#include runtime.h
+#ifdef USE_LIBFFI
+
+#include ffi.h
+
/* The functions in this file are only called from reflect_call. As
reflect_call calls a libffi function, which will be compiled
without -fsplit-stack, it will always run with a large stack. */
@@ -500,3 +504,20 @@
free (call_result);
}
+
+#else /* !defined(USE_LIBFFI) */
+
+void
+reflect_call (const struct __go_func_type *func_type __attribute__ ((unused)),
+ const void *func_addr __attribute__ ((unused)),
+ _Bool is_interface __attribute__ ((unused)),
+ _Bool is_method __attribute__ ((unused)),
+ void **params __attribute__ ((unused)),
+ void **results __attribute__ ((unused)))
+{
+ /* Without FFI there is nothing we can do. */
+ runtime_throw(libgo built without FFI does not support
+ reflect.Call or runtime.SetFinalizer);
+}
+
+#endif /* !defined(USE_LIBFFI) */
Fix testsuite regressions with -fgnu-tm
From: Hans-Peter Nilsson h...@bitrange.com
Date: Tue, 14 Feb 2012 03:30:44 +0100
you need to gate *all* tm-related
tests on something like check_effective_target_pthread.
Like this, tested cris-elf, fixes the regressions, does the same
as -fopenmp.
Ok?
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_fgnu_tm): New
proc.
* gfortran.dg/trans-mem-skel.f90: Gate test on effective_target
fgnu_tm.
* gcc.dg/lto/trans-mem-1_0.c, gcc.dg/lto/trans-mem-2_0.c,
gcc.dg/lto/trans-mem-3_0.c, gcc.dg/lto/trans-mem-4_0.c: Ditto.
* gcc.dg/tm/tm.exp: Gate the whole of gcc.dg/tm on
effective_target fgnu_tm.
* g++.dg/tm/tm.exp: Ditto for g++.dg/tm.
Index: lib/target-supports.exp
===
--- lib/target-supports.exp (revision 184203)
+++ lib/target-supports.exp (working copy)
@@ -716,6 +716,15 @@ proc check_effective_target_fopenmp {} {
} -fopenmp]
}
+# Return 1 if compilation with -fgnu-tm is error-free for trivial
+# code, 0 otherwise.
+
+proc check_effective_target_fgnu_tm {} {
+return [check_no_compiler_messages fgnu_tm object {
+ void foo (void) { }
+} -fgnu-tm]
+}
+
# Return 1 if the target supports mmap, 0 otherwise.
proc check_effective_target_mmap {} {
Index: gfortran.dg/trans-mem-skel.f90
===
--- gfortran.dg/trans-mem-skel.f90 (revision 184203)
+++ gfortran.dg/trans-mem-skel.f90 (working copy)
@@ -1,5 +1,6 @@
! { dg-do compile }
! { dg-options -fgnu-tm }
+! { dg-require-effective-target fgnu_tm }
program foo
real x
end program foo
Index: gcc.dg/lto/trans-mem-2_0.c
===
--- gcc.dg/lto/trans-mem-2_0.c (revision 184203)
+++ gcc.dg/lto/trans-mem-2_0.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-lto-options {{-flto -fgnu-tm}} } */
/* { dg-lto-do link } */
/* { dg-require-effective-target stdint_types } */
+/* { dg-require-effective-target fgnu_tm } */
#include trans-mem.h
Index: gcc.dg/lto/trans-mem-4_0.c
===
--- gcc.dg/lto/trans-mem-4_0.c (revision 184203)
+++ gcc.dg/lto/trans-mem-4_0.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-lto-options {{-flto -fgnu-tm}} } */
/* { dg-lto-do link } */
/* { dg-require-effective-target stdint_types } */
+/* { dg-require-effective-target fgnu_tm } */
extern void foo() __attribute__((transaction_safe));
Index: gcc.dg/lto/trans-mem-1_0.c
===
--- gcc.dg/lto/trans-mem-1_0.c (revision 184203)
+++ gcc.dg/lto/trans-mem-1_0.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-lto-options {{-flto -fgnu-tm}} } */
/* { dg-lto-do link } */
/* { dg-require-effective-target stdint_types } */
+/* { dg-require-effective-target fgnu_tm } */
int i;
Index: gcc.dg/lto/trans-mem-3_0.c
===
--- gcc.dg/lto/trans-mem-3_0.c (revision 184203)
+++ gcc.dg/lto/trans-mem-3_0.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-lto-options {{-flto}} } */
/* { dg-lto-do link } */
/* { dg-require-effective-target stdint_types } */
+/* { dg-require-effective-target fgnu_tm } */
/* Test that we can build one object file with -fgnu-tm
(trans-mem-3_1.c), but do the final link of all objects without
Index: gcc.dg/tm/tm.exp
===
--- gcc.dg/tm/tm.exp(revision 184203)
+++ gcc.dg/tm/tm.exp(working copy)
@@ -19,6 +19,10 @@
# Load support procs.
load_lib gcc-dg.exp
+if ![check_effective_target_fgnu_tm] {
+ return
+}
+
# If a testcase doesn't have special options, use these.
global DEFAULT_CFLAGS
if ![info exists DEFAULT_CFLAGS] then {
Index: g++.dg/tm/tm.exp
===
--- g++.dg/tm/tm.exp(revision 184203)
+++ g++.dg/tm/tm.exp(working copy)
@@ -19,6 +19,10 @@
# Load support procs.
load_lib g++-dg.exp
+if ![check_effective_target_fgnu_tm] {
+ return
+}
+
# If a testcase doesn't have special options, use these.
global DEFAULT_CXXFLAGS
if ![info exists DEFAULT_CXXFLAGS] then {
brgds, H-P
Re: Fix testsuite regressions with -fgnu-tm
On 02/14/2012 01:10 PM, Hans-Peter Nilsson wrote: Like this, tested cris-elf, fixes the regressions, does the same as -fopenmp. Ok? gcc/testsuite: * lib/target-supports.exp (check_effective_target_fgnu_tm): New proc. * gfortran.dg/trans-mem-skel.f90: Gate test on effective_target fgnu_tm. * gcc.dg/lto/trans-mem-1_0.c, gcc.dg/lto/trans-mem-2_0.c, gcc.dg/lto/trans-mem-3_0.c, gcc.dg/lto/trans-mem-4_0.c: Ditto. * gcc.dg/tm/tm.exp: Gate the whole of gcc.dg/tm on effective_target fgnu_tm. * g++.dg/tm/tm.exp: Ditto for g++.dg/tm. Ok. r~
Re: [Patch,AVR] Add xmega support
On 02/14/2012 10:52 AM, Georg-Johann Lay wrote: It might be easier for the compiler if crucial SFRs are not modelled by MEM but as REG instead, but for that change I don't know enough about debugging formats and impact on gdb. Maybe Richard can comment on that? It's almost certainly going to be easier for the compiler to model the cpu internal registers as registers. The fact that they're actually accessed via memory-map is implementation detail that should almost certainly *not* be exposed. Dunno what to do about gdb. Probably update the cpu model in a similar fashion. r~
Re: [PATCH] Reserve upper bits of memory model for future use
On 02/14/2012 09:52 AM, Andrew MacLeod wrote:
On 02/14/2012 11:28 AM, Jakub Jelinek wrote:
On Tue, Feb 14, 2012 at 11:23:58AM -0500, Andrew MacLeod wrote:
This patch just modifies the documention to indicate that the upper
bits of the memory model parameter are reserved for future use.
(We're already looking at using it for HLE hints)
I've already made a change on the wiki page.
Ok for mainline?
Looks good to me, but would like Richard to chime in too.
BTW, I wonder if we shouldn't error out on
int
foo (int *p)
{
return __atomic_fetch_add (p, 4, __ATOMIC_SEQ_CST | 0x123400);
}
(currently we just warn).
I think warning is enough. We're planning to use those reserved bits for
something else, so we'd be removing the error in the next release anyway.
The compiler throws those extra bits away now anyway and reverts to SEQ_CST.
I'd say just issue a warning whenever the compiler sees values in that field
which it doesn't support. So next release if we add 2 HLE flags, we'd add
warnings if values outside those are used as well.
Andrew
Indeed, that seems good enough to me.
r~
Re: [wwwdocs] update gcc-4.7/changes.html
On 12 February 2012 21:55, Jonathan Wakely wrote: On 12 February 2012 18:25, Gerald Pfeifer wrote: On Wed, 8 Feb 2012, Jonathan Wakely wrote: Add note on thread improvements to libstdc++ changes. Nice. I have a hunch that many will be interested to learn which targets are now benefiting from this. Do you have a list, even if not complete to add there? Not a precise one, but I think it's basically any POSIX platform supporting pthreads. Previously it was only POSIX platorms supporting pthreads *and* the POSIX Timeouts option. I've made it a bit more specific. Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v retrieving revision 1.82 diff -u -r1.82 changes.html --- changes.html13 Feb 2012 21:57:31 - 1.82 +++ changes.html14 Feb 2012 22:37:15 - @@ -453,7 +453,7 @@ li uses-allocator construction for codetuple/code; /li li codevector/code meets the allocator-aware container requirements; /li li replacing codemonotonic_clock/code with codesteady_clock/code; /li - li enabling the thread support library on a wider range of targets; /li + li enabling the thread support library on most POSIX targets; /li li many small improvements to conform to the FDIS. /li /ul /li
Re: [patch] clean up pdp11.md a bit
On 02/14/2012 02:08 PM, Steven Bosscher wrote: OK for trunk? This can wait for stage1. +;; On PDP-11, DIV always produces a quotient and a remainder. But CSE +;; cannot optimize the divmods away because the SET_DESTs are SUBREGs. +; ;(define_expand divmodhi4 ; [(parallel [(set (subreg:HI (match_dup 1) 0) Which of course begs the question of why that's so. The division patterns can be modeled similarly to s390. Indeed, all of the appearances of subreg in the md file are errors: Should be removed as unnecessary: (define_expand truncsihi2 Should be removed as generated by generic code: (define_insn zero_extendqihi2 (define_expand zero_extendhisi2 r~
Re: Fix testsuite regressions with -fgnu-tm
Like this, tested cris-elf, fixes the regressions, does the same as -fopenmp. Thanks for fixing this. -- Eric Botcazou
Re: [libitm] Link with -litm and -pthread
I see several new fails on s390x with that patch (r184174): People should realize that -fgnu-tm doesn't really work if libitm hasn't been ported to the architecture, for example s390/s390x. My understanding is that Hans-Peter's patch should have taken care of this now. -- Eric Botcazou
New German PO file for 'gcc' (version 4.7-b20120128)
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the German team of translators. The file is available at: http://translationproject.org/latest/gcc/de.po (This file, 'gcc-4.7-b20120128.de.po', has just now been sent to you in a separate email.) All other PO files for your package are available in: http://translationproject.org/latest/gcc/ Please consider including all of these in your next release, whether official or a pretest. Whenever you have a new distribution with a new version number ready, containing a newer POT file, please send the URL of that distribution tarball to the address below. The tarball may be just a pretest or a snapshot, it does not even have to compile. It is just used by the translators when they need some extra translation context. The following HTML page has been updated: http://translationproject.org/domain/gcc.html If any question arises, please contact the translation coordinator. Thank you for all your work, The Translation Project robot, in the name of your translation coordinator. coordina...@translationproject.org
Re: [patch] clean up pdp11.md a bit
On Tue, Feb 14, 2012 at 11:51 PM, Richard Henderson r...@redhat.com wrote: On 02/14/2012 02:08 PM, Steven Bosscher wrote: OK for trunk? This can wait for stage1. +;; On PDP-11, DIV always produces a quotient and a remainder. But CSE +;; cannot optimize the divmods away because the SET_DESTs are SUBREGs. +; ;(define_expand divmodhi4 ; [(parallel [(set (subreg:HI (match_dup 1) 0) Which of course begs the question of why that's so. The division patterns can be modeled similarly to s390. That is what Ian also said on IRC, but I didn't want to go that far (I didn't think this basically cosmetic change would be a problem for stage4 but rewriting patterns, even for a pet target like this, didn't seem appropriate). Anyway, history for this goes back a long long time: http://gcc.gnu.org/viewcvs?view=revisionrevision=10175 The previous div/mod/divmod patterns didn't have subregs. For example: (define_expand divhi3 - [(set (match_dup 3) - (sign_extend:SI (match_operand:HI 1 general_operand g))) - (set (match_operand:HI 0 general_operand g) - (truncate:HI -(div:SI - (match_dup 3) - (sign_extend:SI (match_operand:HI 2 general_operand g)] - TARGET_45 - operands[3] = gen_reg_rtx (SImode);) Not sure why this was changed. What I'd like to do, is remove the divhi3 and movhi3 define_expand and define_insn, and just keep divmodhi4. You point to s390. I suppose you mean the divmoddi4 expander there? Indeed, all of the appearances of subreg in the md file are errors: I was only playing with your match_flags patches. I get the feeling I am going to regret that... :-) Should be removed as unnecessary: (define_expand truncsihi2 Should be removed as generated by generic code: (define_insn zero_extendqihi2 (define_expand zero_extendhisi2 What do you mean with generated by generic code? And the define_insn has to stay, surely? Thanks, and sorry for the novice questions! Ciao! Steven
Backported 6 patches to 4.6 branch
Hi!
Further backported patches, bootstrapped/regtested on x86_64-linux and
i686-linux, committed to 4.6 branch. It has been a while since 4.6.2
has been released, are there any blockers that should be resolved before
4.6.3-rc1?
Jakub
2012-02-14 Jakub Jelinek ja...@redhat.com
PR bootstrap/51969
Backported from mainline
2011-11-08 Michael Matz m...@suse.de
* gengtype.c (write_field_root): Avoid out-of-scope access of newv.
--- gcc/gengtype.c (revision 181171)
+++ gcc/gengtype.c (revision 181172)
@@ -3651,14 +3651,13 @@ write_field_root (outf_p f, pair_p v, ty
int has_length, struct fileloc *line, const char *if_marked,
bool emit_pch, type_p field_type, const char *field_name)
{
+ struct pair newv;
/* If the field reference is relative to V, rather than to some
subcomponent of V, we can mark any subarrays with a single stride.
We're effectively treating the field as a global variable in its
own right. */
if (v type == v-type)
{
- struct pair newv;
-
newv = *v;
newv.type = field_type;
newv.name = ACONCAT ((v-name, ., field_name, NULL));
2012-02-14 Jakub Jelinek ja...@redhat.com
Backported from mainline
2012-02-13 Jakub Jelinek ja...@redhat.com
PR middle-end/52230
* omp-low.c (expand_omp_for): If a static schedule without
chunk size has NULL region-cont, force fd.chunk_size to be
integer_zero_node.
--- gcc/omp-low.c (revision 184164)
+++ gcc/omp-low.c (revision 184165)
@@ -4664,6 +4664,9 @@ expand_omp_for (struct omp_region *regio
{
int fn_index, start_ix, next_ix;
+ if (fd.chunk_size == NULL
+ fd.sched_kind == OMP_CLAUSE_SCHEDULE_STATIC)
+ fd.chunk_size = integer_zero_node;
gcc_assert (fd.sched_kind != OMP_CLAUSE_SCHEDULE_AUTO);
fn_index = (fd.sched_kind == OMP_CLAUSE_SCHEDULE_RUNTIME)
? 3 : fd.sched_kind;
2012-02-14 Jakub Jelinek ja...@redhat.com
Backported from mainline
2012-02-13 Jakub Jelinek ja...@redhat.com
* cselib.c (dump_cselib_val): Don't assume l-setting_insn is
non-NULL.
--- gcc/cselib.c(revision 184167)
+++ gcc/cselib.c(revision 184168)
@@ -2688,8 +2688,11 @@ dump_cselib_val (void **x, void *info)
fputs ( locs:, out);
do
{
- fprintf (out, \n from insn %i ,
- INSN_UID (l-setting_insn));
+ if (l-setting_insn)
+ fprintf (out, \n from insn %i ,
+INSN_UID (l-setting_insn));
+ else
+ fprintf (out, \n );
print_inline_rtx (out, l-loc, 4);
}
while ((l = l-next));
2012-02-14 Jakub Jelinek ja...@redhat.com
Backported from mainline
2012-02-14 Jakub Jelinek ja...@redhat.com
PR c/52181
* c-decl.c (merge_decls): Copy DECL_USER_ALIGN bit from olddecl to
newdecl.
* decl.c (duplicate_decls): If olddecl has bigger DECL_ALIGN than
newdecl, copy DECL_ALIGN to newdecl and or DECL_USER_ALIGN bits.
* c-c++-common/pr52181.c: New test.
--- gcc/c-decl.c(revision 184192)
+++ gcc/c-decl.c(revision 184193)
@@ -2449,6 +2449,7 @@ merge_decls (tree newdecl, tree olddecl,
memcpy ((char *) olddecl + sizeof (struct tree_common),
(char *) newdecl + sizeof (struct tree_common),
sizeof (struct tree_decl_common) - sizeof (struct tree_common));
+DECL_USER_ALIGN (olddecl) = DECL_USER_ALIGN (newdecl);
switch (TREE_CODE (olddecl))
{
case FUNCTION_DECL:
--- gcc/cp/decl.c (revision 184192)
+++ gcc/cp/decl.c (revision 184193)
@@ -2214,7 +2214,12 @@ duplicate_decls (tree newdecl, tree oldd
SET_DECL_INIT_PRIORITY (olddecl, DECL_INIT_PRIORITY (newdecl));
DECL_HAS_INIT_PRIORITY_P (olddecl) = 1;
}
- /* Likewise for DECL_USER_ALIGN and DECL_PACKED. */
+ /* Likewise for DECL_ALIGN, DECL_USER_ALIGN and DECL_PACKED. */
+ if (DECL_ALIGN (olddecl) DECL_ALIGN (newdecl))
+{
+ DECL_ALIGN (newdecl) = DECL_ALIGN (olddecl);
+ DECL_USER_ALIGN (newdecl) |= DECL_USER_ALIGN (olddecl);
+}
DECL_USER_ALIGN (olddecl) = DECL_USER_ALIGN (newdecl);
if (TREE_CODE (newdecl) == FIELD_DECL)
DECL_PACKED (olddecl) = DECL_PACKED (newdecl);
--- gcc/testsuite/c-c++-common/pr52181.c(revision 0)
+++ gcc/testsuite/c-c++-common/pr52181.c(revision 184193)
@@ -0,0 +1,13 @@
+/* PR c/52181 */
+/* { dg-do compile } */
+
+extern const int v1[];
+const int __attribute__((aligned(16))) v1[] = { 1 };
+extern const int __attribute__((aligned(16))) v2[];
+const int v2[] = { 1 };
+extern const int __attribute__((aligned(16))) v3[];
+const int __attribute__((aligned(16))) v3[] = { 1 };
+const int __attribute__((aligned(16))) v4[] = { 1 };
+int test[(__alignof__ (v4) != __alignof__ (v1) /* { dg-bogus is
[v3] disable failing test on cygwin
The native_handle typesize test fails on cygwin, as with other targets
where the assumption about sizes doesn't hold.
Tested x86_64-linux, committed to trunk.
commit 26b8bf489b27e7399305a19384c1cac4829b1a9f
Author: Jonathan Wakely jwakely@gmail.com
Date: Tue Feb 14 22:50:40 2012 +
* 30_threads/thread/native_handle/typesizes.cc: Do not run on cygwin.
diff --git
a/libstdc++-v3/testsuite/30_threads/thread/native_handle/typesizes.cc
b/libstdc++-v3/testsuite/30_threads/thread/native_handle/typesizes.cc
index 79ea99c..3e105d4 100644
--- a/libstdc++-v3/testsuite/30_threads/thread/native_handle/typesizes.cc
+++ b/libstdc++-v3/testsuite/30_threads/thread/native_handle/typesizes.cc
@@ -1,7 +1,6 @@
-// { dg-do run { target *-*-linux* *-*-solaris* *-*-cygwin mips-sgi-irix6*
powerpc-ibm-aix* } }
+// { dg-do run { target *-*-linux* *-*-solaris* mips-sgi-irix6*
powerpc-ibm-aix* } }
// { dg-options -std=gnu++0x -pthread { target *-*-linux* mips-sgi-irix6*
powerpc-ibm-aix* } }
// { dg-options -std=gnu++0x -pthreads { target *-*-solaris* } }
-// { dg-options -std=gnu++0x { target *-*-cygwin } }
// { dg-require-cstdint }
// { dg-require-gthreads }
Re: [patch] clean up pdp11.md a bit
On 02/14/2012 03:41 PM, Steven Bosscher wrote: Not sure why this was changed. What I'd like to do, is remove the divhi3 and movhi3 define_expand and define_insn, and just keep divmodhi4. You point to s390. I suppose you mean the divmoddi4 expander there? Yes. Naturally the TImode stuff becomes SImode in the pdp11 version. (define_insn zero_extendqihi2 (define_expand zero_extendhisi2 What do you mean with generated by generic code? And the define_insn has to stay, surely? I mean that optabs.c will generate the right thing by itself without you providing these patterns at all. r~
Re: Backported 6 patches to 4.6 branch
Further backported patches, bootstrapped/regtested on x86_64-linux and i686-linux, committed to 4.6 branch. It has been a while since 4.6.2 has been released, are there any blockers that should be resolved before 4.6.3-rc1? PR target/51921 (the pending patch is under PR target/52205). Last time I checked, there was a couple of C++ failures on the branch. -- Eric Botcazou
C6X: Fix floating point scheduling scheduling bug
We have code in the backend to predicate instructions with long delays
while scheduling, so that they can be placed in jump delay slots. For
example,
[a1] b label
nop 3
ldw *a2, a0 ;; this insn is from the basic block after the branch
nop
;; branch occurs here
is not safe even if A0 is not used at the branch target, since the load
will place data into A0 after the branch occurs, and we don't know
whether that conflicts with the code there.
We can make this safe by changing it into
[a1] b label
nop 3
[!a1] ldw *a2, a0
nop
;; branch occurs here
since we know we're scheduling extended basic blocks, so we control the
code in the fallthru path.
This all works except for certain floating point instructions, which not
only store their destination after a given number of cycles, but which
also reserve functional units for multiple cycles. In the testcase I
have, it's a CMPLTDP instruction which can't be allowed to be placed in
the last delay cycle of the branch, since it reserves its units for two
cycles.
Fixed with this patch. Committed.
Bernd
* config/c6x/c6x.md (reserve_cycles): New attribute.
* config/c6x/c6x.c (c6x_sched_reorder_1): Ensure insns we predicate
don't reserve functional units after the branch occurs.
Index: gcc/config/c6x/c6x.c
===
--- gcc/config/c6x/c6x.c(revision 184237)
+++ gcc/config/c6x/c6x.c(working copy)
@@ -4196,13 +4196,14 @@ c6x_sched_reorder_1 (rtx *ready, int *pn
bool is_asm = (icode 0
(GET_CODE (PATTERN (insn)) == ASM_INPUT
|| asm_noperands (PATTERN (insn)) = 0));
- int this_cycles;
+ int this_cycles, rsrv_cycles;
enum attr_type type;
gcc_assert (!is_asm);
if (icode 0)
continue;
this_cycles = get_attr_cycles (insn);
+ rsrv_cycles = get_attr_reserve_cycles (insn);
type = get_attr_type (insn);
/* Treat branches specially; there is also a hazard if two jumps
end at the same cycle. */
@@ -4211,6 +4212,7 @@ c6x_sched_reorder_1 (rtx *ready, int *pn
if (clock_var + this_cycles = first_cycle)
continue;
if ((first_jump 0 clock_var + this_cycles second_cycle)
+ || clock_var + rsrv_cycles first_cycle
|| !predicate_insn (insn, first_cond, false))
{
memmove (ready + 1, ready, (insnp - ready) * sizeof (rtx));
Index: gcc/config/c6x/c6x.md
===
--- gcc/config/c6x/c6x.md (revision 184237)
+++ gcc/config/c6x/c6x.md (working copy)
@@ -201,6 +201,17 @@ (define_attr cycles
(eq_attr type mpysp2dp) (const_int 5)]
(const_int 1)))
+;; The number of cycles during which the instruction reserves functional
+;; units.
+(define_attr reserve_cycles
+ (cond [(eq_attr type cmpdp) (const_int 2)
+(eq_attr type adddp) (const_int 2)
+(eq_attr type mpydp) (const_int 4)
+(eq_attr type mpyi) (const_int 4)
+(eq_attr type mpyid) (const_int 4)
+(eq_attr type mpyspdp) (const_int 2)]
+ (const_int 1)))
+
(define_attr predicable no,yes
(const_string yes))
Re: [PR52001] too many cse reverse equiv exprs (take2)
On Feb 13, 2012, Richard Sandiford rdsandif...@googlemail.com wrote: does this avoid the kind of memrefs_conflict_p cycle I was seeing in: I don't know that it does, I'd missed that bit. If you still have a preprocessed testcase, I'd be glad to give it a quick try. Failing that, I can try a build on my yeeloong, but... that takes forever minus a few days ;-) -- Alexandre Oliva, freedom fighterhttp://FSFLA.org/~lxoliva/ You must be the change you wish to see in the world. -- Gandhi Be Free! -- http://FSFLA.org/ FSF Latin America board member Free Software Evangelist Red Hat Brazil Compiler Engineer
Re: [PR52001] too many cse reverse equiv exprs (take2)
On Feb 13, 2012, Jakub Jelinek ja...@redhat.com wrote: I'm not convinced you want the + /* Keep VALUE equivalences around. */ + for (l = v-locs; l; l = l-next) +if (GET_CODE (l-loc) == VALUE) + return true; hunk in invariant_p, Yeah, maybe “invariant_p” is a misnomer. The thinking is that, if we preserve a value, we preserve other values based on it, and we do preserve values with equivalences to avoid having to carry the equivalences in the var-tracking dataflow sets. Otherwise the cselib.c changes look ok to me, but I don't understand why are you removing the var-tracking.c loop. I thought completeness called for retaining those equivalences, but now I see that, since they're always going to be computed values, rather than locations, the constant value provides sufficient and better information for completeness, rendering them irrelevant indeed. I'll put that hunk back in and retest. Thanks, -- Alexandre Oliva, freedom fighterhttp://FSFLA.org/~lxoliva/ You must be the change you wish to see in the world. -- Gandhi Be Free! -- http://FSFLA.org/ FSF Latin America board member Free Software Evangelist Red Hat Brazil Compiler Engineer
C++ PATCH to warn about ignored attributes
While looking at PR 51930, I discovered that we were silently ignoring
attributes on explicit instantiations; this patch warns about this.
This isn't exactly a regression, but the submitter ran into it as a
result of a behavior change in 4.7, and the patch is extremely safe, so
I think it should go in.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit dd0af86e2c58357e5aa83d9791e6bc6ae9c2a418
Author: Jason Merrill ja...@redhat.com
Date: Tue Feb 14 17:25:35 2012 -0800
* parser.c (cp_parser_explicit_instantiation): Give a warning
for ignored attributes on explicit class instantiation.
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 491f48e..3e2be97 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -13122,6 +13122,9 @@ cp_parser_explicit_instantiation (cp_parser* parser)
tree type;
type = check_tag_decl (decl_specifiers);
+ if (decl_specifiers.attributes)
+ warning (OPT_Wattributes,
+ attributes ignored on explicit type instantiation);
/* Turn access control back on for names used during
template instantiation. */
pop_deferring_access_checks ();
diff --git a/gcc/testsuite/g++.dg/ext/attrib43.C b/gcc/testsuite/g++.dg/ext/attrib43.C
new file mode 100644
index 000..fe9f072
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/attrib43.C
@@ -0,0 +1,5 @@
+template class T struct A { };
+
+template
+__attribute__ ((packed))
+struct Aint; // { dg-warning attributes ignored }
Re: PATCH: Add capability to contrib/compare_tests to handle directories
On Feb 14, 2012, at 8:39 AM, Quentin Neill wrote: Thanks for the fix. This seemed familiar, and upon review it looks like I never committed this fix: http://gcc.gnu.org/ml/gcc-patches/2011-11/msg01194.html Ah, ok, let's go with your version, it is much better. Thanks.
Re: Backported 6 patches to 4.6 branch
Are any other recent trunk fixes to be backported - like the wrong-code bugs: PR tree-optimization/50444, PR tree-optimization/51528, or PR tree-optimization/46886 ? thanks, -Kenny
Re: [patch] [4.6] Backport strict-volatile-bitfields fix PR51200
Ping^2 On Mon, Jan 16, 2012 at 11:21 AM, Ye Joey joey.ye...@gmail.com wrote: Ping On Tue, Dec 27, 2011 at 10:19 AM, Ye Joey joey.ye...@gmail.com wrote: Fix PR51200. Backport trunk 182545, 182649, 182685 to 4.6. OK to 4.6? - Joey 2011-12-20 Bernd Schmidt ber...@codesourcery.com PR middle-end/51200 * expr.c (store_field): Avoid a direct store if the mode is larger than the size of the bit field. * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields, treat non-volatile bit fields like volatile ones. * toplev.c (process_options): Disallow combination of -fstrict-volatile-bitfields and ABI versions less than 2. * config/arm/arm.c (arm_option_override): Don't enable flag_strict_volatile_bitfields if the ABI version is less than 2. * config/h8300/h8300.c (h8300_option_override): Likewise. * config/rx/rx.c (rx_option_override): Likewise. * config/m32c/m32c.c (m32c_option_override): Likewise. * config/sh/sh.c (sh_option_override): Likewise. 2011-12-22 Joey Ye joey...@arm.com * toplev.c (process_options): Fix typo. testsute 2011-12-20 Bernd Schmidt ber...@codesourcery.com PR middle-end/51200 * gcc.target/arm/volatile-bitfields-4.c: New test. * c-c++-common/abi-bf.c: New test. 2011-12-26 Joey Ye joey...@arm.com PR middle-end/51200 * gcc.dg/volatile-bitfields-2.c: New test.
