Re: [PR51752] publication safety violations in loop invariant motion pass
On Tue, Feb 28, 2012 at 9:11 PM, Aldy Hernandez al...@redhat.com wrote: On 02/28/12 13:12, Richard Henderson wrote: On 02/28/12 09:44, Aldy Hernandez wrote: PR middle-end/51752 * gimple.h (gimple_in_transaction): New. (gimple_set_in_transaction): New. (struct gimple_statement_base): Add in_transaction field. * tree-ssa-loop-im.c: (movement_possibility): Restrict movement of transaction loads. (tree_ssa_lim_initialize): Compute transaction bits. * tree.h (compute_transaction_bits): Protoize. * trans-mem.c (tm_region_init): Use the heap to store BB auxilliary data. (compute_transaction_bits): New. Looks good. Thanks for your patience. r~ Thank you. I have committed the patch. I will also look into the tree_could_trap business (and PRE and other passes) to see if we can divine some context. But I probably won't get to it before early next week. The tree_could_trap business is definitely harder because you lack a stmt context - this helper takes a 'tree' argument. And it's not enough to adjust gimple_could_trap as both are used regularly... So fixing up individual passes is easier - I can only think of PRE being problematic right now, I am not aware that any other pass moves loads or stores. So I'd simply pre-compute the stmt bit in PRE and adjust the if (gimple_has_volatile_ops (stmt) || stmt_could_throw_p (stmt)) continue; in compute_avail accordingly. Richard. Thanks.
Re: [PATCH] Fix PR52424
On Wed, Feb 29, 2012 at 4:12 AM, William J. Schmidt
wschm...@linux.vnet.ibm.com wrote:
This patch fixes PR52424 by pushing a missing marker onto
const_and_copies_stack before calling dom_thread_across_edge. This bug
has resulted in lost copy propagation opportunities in the presence of
edge threading.
Bootstrapped and tested with no regressions on powerpc64-linux-gnu. I'm
waiting on Jiangning Liu to verify the patch fixes his performance
concern. Provided it does, is this OK for trunk?
Ok.
Also, this bug has apparently been there for a long time. Should we
consider backporting the fix to 4.6 and/or 4.5?
It's even present on the 4.1 branch, so I guess it has been there forever.
Not worth backporting IMHO.
Thanks,
Richard.
Thanks,
Bill
2012-02-28 Bill Schmidt wschm...@linux.vnet.ibm.com
PR tree-optimization/52424
* tree-ssa-dom.c (dom_opt_leave_block): Push a marker before
calling dom_thread_across_edge.
Index: gcc/tree-ssa-dom.c
===
--- gcc/tree-ssa-dom.c (revision 184625)
+++ gcc/tree-ssa-dom.c (working copy)
@@ -1779,6 +1779,9 @@ dom_opt_leave_block (struct dom_walk_data *walk_da
(single_succ_edge (bb)-flags EDGE_ABNORMAL) == 0
potentially_threadable_block (single_succ (bb)))
{
+ /* Push a marker on the stack, which thread_across_edge expects
+ and will remove. */
+ VEC_safe_push (tree, heap, const_and_copies_stack, NULL_TREE);
dom_thread_across_edge (walk_data, single_succ_edge (bb));
}
else if ((last = last_stmt (bb))
Re: [RFC, PATCH] ARM related deprecations
On 28/02/12 23:42, John Tytgat wrote: In message 4f4d0e64.1020...@arm.com Richard Earnshaw rearn...@arm.com wrote: On 28/02/12 17:10, Joseph S. Myers wrote: On Tue, 28 Feb 2012, Richard Earnshaw wrote: Here's an updated patch and a suggested web-page patch: uClinux targets do not have -gnu in their target triplets. You missed the WinCE port from the list in the webpage patch of ports being deprecated for using FPA floating-point format and lacking a modern alternative using VFP format. (The config.gcc patch also got the triplet for WinCE wrong - it's arm*-wince-pe* not arm*-*-wince*. Though ISTR the more functional port that hasn't been contributed to FSF GCC uses some other triplet.) Have I ever said how much I hate triplets? Here's an updated version, plus some updates to install.texi to avoid references to the obsolete ports. OK? As mentioned/asked in http://gcc.gnu.org/ml/gcc-patches/2011-12/msg00744.html our GCC/ARM port for RISC OS which is using for one of its multilib variants FPA (to interface with the SharedCLibrary used in RISC OS). Other multilib variants are soft-float and VPF. I would like to keep the FPA support in gcc 4.8. RISC OS support is not (and never has been) part of the FSF source tree. I'm wondering if the removal of FPA is really necessary. Does FPA support prevent future ARM improvements in GCC ? It's been 10 years since I last saw any real interest in the FPA and even that was for legacy parts. In fact I think it's been at least 10 years since FPA support was dropped from ARM's commercial compiler. I've been through the test results for the last three years, the last suggestion of any testing for a port that uses the FPA instructions was in February 2009 for the legacy Linux ABI, since that time there has only been soft-float support tested. It might sometimes look as though carrying this dead code around has no cost, but I can assure you that whenever we go into some of the selection logic that supports picking between FPA, VFP and soft float we do have to think about what the implications might be for each case. Furthermore, just having those instructions in the compiler has a cost in terms of the time it takes to build the compiler and, to a limited extent, the amount of time it takes to compile an application. Overall, I can no longer see a valid justification for carrying this code within GCC. R.
[Patch,AVR]: Tweak decrement-and-branch peepholes
The condition/branch in decrement-and-branch peepholes is ne/brcc.
This can be generalized to cover eq/brcs.
Tested without regressions.
Because of PR52417, I had to run the tests with -fno-dse. There is one
UNSUPPORTED because of that (missing dse dump).
Ok for the trunk?
Johann
* config/avr/avr.md (eqne): New code iterator.
(*dec-and-branchsi): Use it in text peephole's condition.
(*dec-and-branchhi): Ditto.
(*dec-and-branchqi): Ditto.
Index: config/avr/avr.md
===
--- config/avr/avr.md (revision 184618)
+++ config/avr/avr.md (working copy)
@@ -232,6 +232,7 @@ (define_code_iterator any_extend [sign_
(define_code_iterator any_extend2 [sign_extend zero_extend])
(define_code_iterator xior [xor ior])
+(define_code_iterator eqne [eq ne])
;; Define code attributes
(define_code_attr extend_su
@@ -4939,12 +4940,14 @@ (define_peephole ; *dec-and-branchsi!=-
(const_int -1)))
(clobber (match_operand:QI 1 d_register_operand ))])
(set (pc)
-(if_then_else (ne (cc0)
- (const_int 0))
+(if_then_else (eqne (cc0)
+(const_int 0))
(label_ref (match_operand 2 ))
(pc)))]
{
+const char *op;
+int jump_mode;
CC_STATUS_INIT;
if (test_hard_reg_class (ADDW_REGS, operands[0]))
output_asm_insn (sbiw %0,1 CR_TAB
@@ -4956,14 +4959,15 @@ (define_peephole ; *dec-and-branchsi!=-
sbc %C0,__zero_reg__ CR_TAB
sbc %D0,__zero_reg__, operands);
-switch (avr_jump_mode (operands[2], insn))
+jump_mode = avr_jump_mode (operands[2], insn);
+op = ((EQ == CODE) ^ (jump_mode == 1)) ? brcc : brcs;
+operands[1] = gen_rtx_CONST_STRING (VOIDmode, op);
+
+switch (jump_mode)
{
- case 1:
-return brcc %2;
- case 2:
-return brcs .+2\;rjmp %2;
- case 3:
-return brcs .+4\;jmp %2;
+ case 1: return %1 %2;
+ case 2: return %1 .+2\;rjmp %2;
+ case 3: return %1 .+4\;jmp %2;
}
gcc_unreachable();
@@ -4980,11 +4984,14 @@ (define_peephole ; *dec-and-branchhi!=-
(const_int -1)))
(clobber (match_operand:QI 1 d_register_operand ))])
(set (pc)
- (if_then_else (ne (cc0) (const_int 0))
+ (if_then_else (eqne (cc0)
+(const_int 0))
(label_ref (match_operand 2 ))
(pc)))]
{
+const char *op;
+int jump_mode;
CC_STATUS_INIT;
if (test_hard_reg_class (ADDW_REGS, operands[0]))
output_asm_insn (sbiw %0,1, operands);
@@ -4992,14 +4999,15 @@ (define_peephole ; *dec-and-branchhi!=-
output_asm_insn (subi %A0,1 CR_TAB
sbc %B0,__zero_reg__, operands);
-switch (avr_jump_mode (operands[2], insn))
+jump_mode = avr_jump_mode (operands[2], insn);
+op = ((EQ == CODE) ^ (jump_mode == 1)) ? brcc : brcs;
+operands[1] = gen_rtx_CONST_STRING (VOIDmode, op);
+
+switch (jump_mode)
{
- case 1:
-return brcc %2;
- case 2:
-return brcs .+2\;rjmp %2;
- case 3:
-return brcs .+4\;jmp %2;
+ case 1: return %1 %2;
+ case 2: return %1 .+2\;rjmp %2;
+ case 3: return %1 .+4\;jmp %2;
}
gcc_unreachable();
@@ -5017,12 +5025,14 @@ (define_peephole ; *dec-and-branchhi!=-
(const_int -1)))
(clobber (match_operand:QI 1 d_register_operand ))])
(set (pc)
-(if_then_else (ne (cc0)
- (const_int 0))
+(if_then_else (eqne (cc0)
+(const_int 0))
(label_ref (match_operand 2 ))
(pc)))]
{
+const char *op;
+int jump_mode;
CC_STATUS_INIT;
if (test_hard_reg_class (ADDW_REGS, operands[0]))
output_asm_insn (sbiw %0,1, operands);
@@ -5030,14 +5040,15 @@ (define_peephole ; *dec-and-branchhi!=-
output_asm_insn (subi %A0,1 CR_TAB
sbc %B0,__zero_reg__, operands);
-switch (avr_jump_mode (operands[2], insn))
+jump_mode = avr_jump_mode (operands[2], insn);
+op = ((EQ == CODE) ^ (jump_mode == 1)) ? brcc : brcs;
+operands[1] = gen_rtx_CONST_STRING (VOIDmode, op);
+
+switch (jump_mode)
{
- case 1:
-return brcc %2;
- case 2:
-return brcs .+2\;rjmp %2;
- case 3:
-return brcs .+4\;jmp %2;
+ case 1: return %1 %2;
+ case 2: return %1 .+2\;rjmp %2;
+ case 3: return %1 .+4\;jmp %2;
}
gcc_unreachable();
@@ -5055,25 +5066,28 @@ (define_peephole ; *dec-and-branchhi!=-
(const_int -1)))
(clobber (match_operand:QI 1 d_register_operand ))])
(set (pc)
-(if_then_else (ne (cc0)
- (const_int 0))
+
[PATCH] Fix PR52297
This fixes the LTO TM testcases by removing them. TM testcases
belong in libitm testsuite (but dg-additional-sources does not
work there currently for some weird reasons, so I gave up
trying).
Committed.
Richard.
2012-02-29 Richard Guenther rguent...@suse.de
PR testsuite/52297
* gcc.dg/lto/trans-mem-1_0.c: Remove.
* gcc.dg/lto/trans-mem-1_1.c: Likewise.
* gcc.dg/lto/trans-mem-2_0.c: Likewise.
* gcc.dg/lto/trans-mem-2_1.c: Likewise.
* gcc.dg/lto/trans-mem-4_0.c: Likewise.
* gcc.dg/lto/trans-mem-4_1.c: Likewise.
Index: gcc/testsuite/gcc.dg/lto/trans-mem-2_0.c
===
--- gcc/testsuite/gcc.dg/lto/trans-mem-2_0.c(revision 184655)
+++ gcc/testsuite/gcc.dg/lto/trans-mem-2_0.c(working copy)
@@ -1,16 +0,0 @@
-/* { dg-lto-options {{-flto -fgnu-tm}} } */
-/* { dg-lto-do link } */
-/* { dg-require-effective-target stdint_types } */
-/* { dg-require-effective-target fgnu_tm } */
-
-#include trans-mem.h
-
-extern void foobar() __attribute__((transaction_callable));
-
-main()
-{
- __transaction_relaxed
-{
- foobar();
-}
-}
Index: gcc/testsuite/gcc.dg/lto/trans-mem-4_0.c
===
--- gcc/testsuite/gcc.dg/lto/trans-mem-4_0.c(revision 184655)
+++ gcc/testsuite/gcc.dg/lto/trans-mem-4_0.c(working copy)
@@ -1,13 +0,0 @@
-/* { dg-lto-options {{-flto -fgnu-tm}} } */
-/* { dg-lto-do link } */
-/* { dg-require-effective-target stdint_types } */
-/* { dg-require-effective-target fgnu_tm } */
-
-extern void foo() __attribute__((transaction_safe));
-
-int main()
-{
- __transaction_atomic {
- foo();
- }
-}
Index: gcc/testsuite/gcc.dg/lto/trans-mem-2_1.c
===
--- gcc/testsuite/gcc.dg/lto/trans-mem-2_1.c(revision 184655)
+++ gcc/testsuite/gcc.dg/lto/trans-mem-2_1.c(working copy)
@@ -1,4 +0,0 @@
-__attribute__((transaction_callable,noinline))
-void foobar()
-{
-}
Index: gcc/testsuite/gcc.dg/lto/trans-mem-4_1.c
===
--- gcc/testsuite/gcc.dg/lto/trans-mem-4_1.c(revision 184655)
+++ gcc/testsuite/gcc.dg/lto/trans-mem-4_1.c(working copy)
@@ -1,6 +0,0 @@
-#include trans-mem.h
-
-__attribute__((transaction_safe))
-void foo()
-{
-}
Index: gcc/testsuite/gcc.dg/lto/trans-mem-1_0.c
===
--- gcc/testsuite/gcc.dg/lto/trans-mem-1_0.c(revision 184655)
+++ gcc/testsuite/gcc.dg/lto/trans-mem-1_0.c(working copy)
@@ -1,14 +0,0 @@
-/* { dg-lto-options {{-flto -fgnu-tm}} } */
-/* { dg-lto-do link } */
-/* { dg-require-effective-target stdint_types } */
-/* { dg-require-effective-target fgnu_tm } */
-
-int i;
-
-main()
-{
- __transaction_atomic
-{
- i = 0;
-}
-}
Index: gcc/testsuite/gcc.dg/lto/trans-mem-1_1.c
===
--- gcc/testsuite/gcc.dg/lto/trans-mem-1_1.c(revision 184655)
+++ gcc/testsuite/gcc.dg/lto/trans-mem-1_1.c(working copy)
@@ -1 +0,0 @@
-#include trans-mem.h
Re: [PATCH] Fix PR52297
2012-02-29 Richard Guenther rguent...@suse.de PR testsuite/52297 * gcc.dg/lto/trans-mem-1_0.c: Remove. * gcc.dg/lto/trans-mem-1_1.c: Likewise. * gcc.dg/lto/trans-mem-2_0.c: Likewise. * gcc.dg/lto/trans-mem-2_1.c: Likewise. * gcc.dg/lto/trans-mem-4_0.c: Likewise. * gcc.dg/lto/trans-mem-4_1.c: Likewise. You forgot to remove gcc.dg/lto/trans-mem.h itself. -- Eric Botcazou
Re: [PATCH] Fix PR52297
Richard Guenther rguent...@suse.de writes: This fixes the LTO TM testcases by removing them. TM testcases belong in libitm testsuite (but dg-additional-sources does not work there currently for some weird reasons, so I gave up trying). Moving them to libitm/testsuite is an option, but that might be more difficult for the LTO case. I thought about adding dg-require-effective-target tm_runtime (to check for working -litm/libitm.spec) and dg-add-options tm_runtime to add the necessary -B/-L/-I options (and eventually setting LD_LIBRARY_PATH for runtime tests), but didn't yet get around to it. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [Patch,AVR]: Tweak decrement-and-branch peepholes
2012/2/29 Georg-Johann Lay a...@gjlay.de: The condition/branch in decrement-and-branch peepholes is ne/brcc. This can be generalized to cover eq/brcs. Tested without regressions. Because of PR52417, I had to run the tests with -fno-dse. There is one UNSUPPORTED because of that (missing dse dump). Ok for the trunk? Johann * config/avr/avr.md (eqne): New code iterator. (*dec-and-branchsi): Use it in text peephole's condition. (*dec-and-branchhi): Ditto. (*dec-and-branchqi): Ditto. Approved. Denis.
Re: [RFC, PATCH] ARM related deprecations
On 02/28/2012 05:10 PM, Joseph S. Myers wrote: On Tue, 28 Feb 2012, Richard Earnshaw wrote: Here's an updated patch and a suggested web-page patch: uClinux targets do not have -gnu in their target triplets. You missed the WinCE port from the list in the webpage patch of ports being deprecated for using FPA floating-point format and lacking a modern alternative using VFP format. (The config.gcc patch also got the triplet for WinCE wrong - it's arm*-wince-pe* not arm*-*-wince*. Though ISTR the more functional port that hasn't been contributed to FSF GCC uses some other triplet.) Right, it uses arm-*-mingw32ce, and arm-*-cegcc (kind of like mingw vs cygwin). One of earliest local changes was to to flip to using VFP by default (and float-abi=soft), as that's all we care about for anything remotely modern. I never saw any WinCE device or emulator that supported FPA. Maybe I'll find the time and motivation to push the port to the FSF in the next release cycle. Desktop Windows on ARM is around to corner too, so I'm sure if I don't make it myself, someone will end up resurrecting the ARM PE support soon enough. -- Pedro Alves
[Patch,AVR] Clean-up: Move TARGET macros to end of avr.c
This patch moves the bulk of TARGET_* macros to the end of avr.c and just prior to their usage by TARGET_INITIALIZER to initialize targetm. It's just more convenient to have that bulk of code at the end of the file... Ok to commit? Johann * config/avr/avr.c: Move definition of TARGET macros to end of file. Index: config/avr/avr.c === --- config/avr/avr.c (revision 184618) +++ config/avr/avr.c (working copy) @@ -225,137 +225,6 @@ bool avr_need_clear_bss_p = false; bool avr_need_copy_data_p = false; -/* Initialize the GCC target structure. */ -#undef TARGET_ASM_ALIGNED_HI_OP -#define TARGET_ASM_ALIGNED_HI_OP \t.word\t -#undef TARGET_ASM_ALIGNED_SI_OP -#define TARGET_ASM_ALIGNED_SI_OP \t.long\t -#undef TARGET_ASM_UNALIGNED_HI_OP -#define TARGET_ASM_UNALIGNED_HI_OP \t.word\t -#undef TARGET_ASM_UNALIGNED_SI_OP -#define TARGET_ASM_UNALIGNED_SI_OP \t.long\t -#undef TARGET_ASM_INTEGER -#define TARGET_ASM_INTEGER avr_assemble_integer -#undef TARGET_ASM_FILE_START -#define TARGET_ASM_FILE_START avr_file_start -#undef TARGET_ASM_FILE_END -#define TARGET_ASM_FILE_END avr_file_end - -#undef TARGET_ASM_FUNCTION_END_PROLOGUE -#define TARGET_ASM_FUNCTION_END_PROLOGUE avr_asm_function_end_prologue -#undef TARGET_ASM_FUNCTION_BEGIN_EPILOGUE -#define TARGET_ASM_FUNCTION_BEGIN_EPILOGUE avr_asm_function_begin_epilogue - -#undef TARGET_FUNCTION_VALUE -#define TARGET_FUNCTION_VALUE avr_function_value -#undef TARGET_LIBCALL_VALUE -#define TARGET_LIBCALL_VALUE avr_libcall_value -#undef TARGET_FUNCTION_VALUE_REGNO_P -#define TARGET_FUNCTION_VALUE_REGNO_P avr_function_value_regno_p - -#undef TARGET_ATTRIBUTE_TABLE -#define TARGET_ATTRIBUTE_TABLE avr_attribute_table -#undef TARGET_INSERT_ATTRIBUTES -#define TARGET_INSERT_ATTRIBUTES avr_insert_attributes -#undef TARGET_SECTION_TYPE_FLAGS -#define TARGET_SECTION_TYPE_FLAGS avr_section_type_flags - -#undef TARGET_ASM_NAMED_SECTION -#define TARGET_ASM_NAMED_SECTION avr_asm_named_section -#undef TARGET_ASM_INIT_SECTIONS -#define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections -#undef TARGET_ENCODE_SECTION_INFO -#define TARGET_ENCODE_SECTION_INFO avr_encode_section_info -#undef TARGET_ASM_SELECT_SECTION -#define TARGET_ASM_SELECT_SECTION avr_asm_select_section - -#undef TARGET_REGISTER_MOVE_COST -#define TARGET_REGISTER_MOVE_COST avr_register_move_cost -#undef TARGET_MEMORY_MOVE_COST -#define TARGET_MEMORY_MOVE_COST avr_memory_move_cost -#undef TARGET_RTX_COSTS -#define TARGET_RTX_COSTS avr_rtx_costs -#undef TARGET_ADDRESS_COST -#define TARGET_ADDRESS_COST avr_address_cost -#undef TARGET_MACHINE_DEPENDENT_REORG -#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg -#undef TARGET_FUNCTION_ARG -#define TARGET_FUNCTION_ARG avr_function_arg -#undef TARGET_FUNCTION_ARG_ADVANCE -#define TARGET_FUNCTION_ARG_ADVANCE avr_function_arg_advance - -#undef TARGET_RETURN_IN_MEMORY -#define TARGET_RETURN_IN_MEMORY avr_return_in_memory - -#undef TARGET_STRICT_ARGUMENT_NAMING -#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true - -#undef TARGET_BUILTIN_SETJMP_FRAME_VALUE -#define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value - -#undef TARGET_HARD_REGNO_SCRATCH_OK -#define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok -#undef TARGET_CASE_VALUES_THRESHOLD -#define TARGET_CASE_VALUES_THRESHOLD avr_case_values_threshold - -#undef TARGET_FRAME_POINTER_REQUIRED -#define TARGET_FRAME_POINTER_REQUIRED avr_frame_pointer_required_p -#undef TARGET_CAN_ELIMINATE -#define TARGET_CAN_ELIMINATE avr_can_eliminate - -#undef TARGET_CLASS_LIKELY_SPILLED_P -#define TARGET_CLASS_LIKELY_SPILLED_P avr_class_likely_spilled_p - -#undef TARGET_OPTION_OVERRIDE -#define TARGET_OPTION_OVERRIDE avr_option_override - -#undef TARGET_CANNOT_MODIFY_JUMPS_P -#define TARGET_CANNOT_MODIFY_JUMPS_P avr_cannot_modify_jumps_p - -#undef TARGET_FUNCTION_OK_FOR_SIBCALL -#define TARGET_FUNCTION_OK_FOR_SIBCALL avr_function_ok_for_sibcall - -#undef TARGET_INIT_BUILTINS -#define TARGET_INIT_BUILTINS avr_init_builtins - -#undef TARGET_EXPAND_BUILTIN -#define TARGET_EXPAND_BUILTIN avr_expand_builtin - -#undef TARGET_FOLD_BUILTIN -#define TARGET_FOLD_BUILTIN avr_fold_builtin - -#undef TARGET_ASM_FUNCTION_RODATA_SECTION -#define TARGET_ASM_FUNCTION_RODATA_SECTION avr_asm_function_rodata_section - -#undef TARGET_SCALAR_MODE_SUPPORTED_P -#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p - -#undef TARGET_ADDR_SPACE_SUBSET_P -#define TARGET_ADDR_SPACE_SUBSET_P avr_addr_space_subset_p - -#undef TARGET_ADDR_SPACE_CONVERT -#define TARGET_ADDR_SPACE_CONVERT avr_addr_space_convert - -#undef TARGET_ADDR_SPACE_ADDRESS_MODE -#define TARGET_ADDR_SPACE_ADDRESS_MODE avr_addr_space_address_mode - -#undef TARGET_ADDR_SPACE_POINTER_MODE -#define TARGET_ADDR_SPACE_POINTER_MODE avr_addr_space_pointer_mode - -#undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P -#define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
Re: [PATCH] Fix PR52297
On Wed, 29 Feb 2012, Eric Botcazou wrote: 2012-02-29 Richard Guenther rguent...@suse.de PR testsuite/52297 * gcc.dg/lto/trans-mem-1_0.c: Remove. * gcc.dg/lto/trans-mem-1_1.c: Likewise. * gcc.dg/lto/trans-mem-2_0.c: Likewise. * gcc.dg/lto/trans-mem-2_1.c: Likewise. * gcc.dg/lto/trans-mem-4_0.c: Likewise. * gcc.dg/lto/trans-mem-4_1.c: Likewise. You forgot to remove gcc.dg/lto/trans-mem.h itself. It's still used by the working trans-mem-3_[01].c testcase. Richard.
Re: [PATCH] Fix PR52297
On Wed, 29 Feb 2012, Rainer Orth wrote: Richard Guenther rguent...@suse.de writes: This fixes the LTO TM testcases by removing them. TM testcases belong in libitm testsuite (but dg-additional-sources does not work there currently for some weird reasons, so I gave up trying). Moving them to libitm/testsuite is an option, but that might be more difficult for the LTO case. I thought about adding dg-require-effective-target tm_runtime (to check for working -litm/libitm.spec) and dg-add-options tm_runtime to add the necessary -B/-L/-I options (and eventually setting LD_LIBRARY_PATH for runtime tests), but didn't yet get around to it. I'm not so sure. All other target lib lto testcases are in the respective target dir. Richard.
Re: [PATCH] Fix PR52297
Richard Guenther rguent...@suse.de writes: Moving them to libitm/testsuite is an option, but that might be more difficult for the LTO case. I thought about adding dg-require-effective-target tm_runtime (to check for working -litm/libitm.spec) and dg-add-options tm_runtime to add the necessary -B/-L/-I options (and eventually setting LD_LIBRARY_PATH for runtime tests), but didn't yet get around to it. I'm not so sure. All other target lib lto testcases are in the respective target dir. Such as? I can't find any use of lto.exp or -flto in lib*/testsuite. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [PATCH] Fix PR52297
It's still used by the working trans-mem-3_[01].c testcase. That test is a little puzzling: /* Test that we can build one object file with -fgnu-tm (trans-mem-3_1.c), but do the final link of all objects without -fgnu-tm. */ So, in the end, we cannot do that without the trans-mem.h kludge? -- Eric Botcazou
Re: [PATCH] Fix PR52297
On Wed, Feb 29, 2012 at 11:26:54AM +0100, Eric Botcazou wrote: It's still used by the working trans-mem-3_[01].c testcase. That test is a little puzzling: /* Test that we can build one object file with -fgnu-tm (trans-mem-3_1.c), but do the final link of all objects without -fgnu-tm. */ So, in the end, we cannot do that without the trans-mem.h kludge? From what I understood, the trans-mem.h kludge is actually part of what the tests were testing, one of the PRs was about trying to LTO together implementation of some of libitm builtins together with some TM code. Jakub
Re: [PATCH] Fix PR52297
On Wed, 29 Feb 2012, Rainer Orth wrote: Richard Guenther rguent...@suse.de writes: Moving them to libitm/testsuite is an option, but that might be more difficult for the LTO case. I thought about adding dg-require-effective-target tm_runtime (to check for working -litm/libitm.spec) and dg-add-options tm_runtime to add the necessary -B/-L/-I options (and eventually setting LD_LIBRARY_PATH for runtime tests), but didn't yet get around to it. I'm not so sure. All other target lib lto testcases are in the respective target dir. Such as? I can't find any use of lto.exp or -flto in lib*/testsuite. Hmm, I may indeed misremember (I thought of libgomp). Definitely some LTO testcases use dg-additional-sources, and for out-of LTO harness LTO testcases we have the 'lto' effective target. Richard.
[Patch,AVR]: Clean-up printing bits
This is more of code clean-up:
avr_output_bld is unused and can be removed.
To print a bit it is more convenient to use %T than patching a string.
Ok for trunk?
Johann
* config/avr/avr-protos.h (avr_output_bld): Remove unused prototype.
* config/avr/avr.c (avr_output_bld): Remove unused function.
(avr_out_sbxx_branch): Use %T to print bit position.
Index: config/avr/avr-protos.h
===
--- config/avr/avr-protos.h (revision 184618)
+++ config/avr/avr-protos.h (working copy)
@@ -83,7 +83,6 @@ extern bool avr_emit_movmemhi (rtx*);
extern int avr_epilogue_uses (int regno);
extern int avr_starting_frame_offset (void);
-extern void avr_output_bld (rtx operands[], int bit_nr);
extern void avr_output_addr_vec_elt (FILE *stream, int value);
extern const char *avr_out_sbxx_branch (rtx insn, rtx operands[]);
extern const char* avr_out_bitop (rtx, rtx*, int*);
Index: config/avr/avr.c
===
--- config/avr/avr.c (revision 184618)
+++ config/avr/avr.c (working copy)
@@ -9503,15 +9503,6 @@ avr_out_reload_inpsi (rtx *op, rtx clobb
return ;
}
-void
-avr_output_bld (rtx operands[], int bit_nr)
-{
- static char s[] = bld %A0,0;
-
- s[5] = 'A' + (bit_nr 3);
- s[8] = '0' + (bit_nr 7);
- output_asm_insn (s, operands);
-}
void
avr_output_addr_vec_elt (FILE *stream, int value)
@@ -9626,23 +9617,10 @@ avr_out_sbxx_branch (rtx insn, rtx opera
case REG:
- if (GET_MODE (operands[1]) == QImode)
-{
- if (comp == EQ)
-output_asm_insn (sbrs %1,%2, operands);
- else
-output_asm_insn (sbrc %1,%2, operands);
-}
- else /* HImode, PSImode or SImode */
-{
- static char buf[] = sbrc %A1,0;
- unsigned int bit_nr = UINTVAL (operands[2]);
-
- buf[3] = (comp == EQ) ? 's' : 'c';
- buf[6] = 'A' + (bit_nr / 8);
- buf[9] = '0' + (bit_nr % 8);
- output_asm_insn (buf, operands);
-}
+ if (comp == EQ)
+output_asm_insn (sbrs %T1%T2, operands);
+ else
+output_asm_insn (sbrc %T1%T2, operands);
break; /* REG */
}/* switch */
[Ada] fix -feliminate-unused-debug-types counter-measure
-feliminate-unused-debug-types will be enabled for Ada as well in GCC 4.7 and
we have implemented a counter-measure to be able to retain apparently unused
types in a few specific cases. But it was inadvertently broken some time ago.
Fixed thusly, tested on i586-suse-linux, applied on the mainline.
I'd like to also apply the following patch:
http://gcc.gnu.org/ml/gcc-patches/2012-02/msg01349.html
which fixes debug info regressions introduced by the simultaneous introduction
of DW_AT_GNAT_descriptive_type and -feliminate-unused-debug-types in Ada. It
only affects the Ada compiler since only GNAT uses DW_AT_GNAT_descriptive_type
and sets TYPE_ARTIFICIAL on its types. OK?
2012-02-29 Eric Botcazou ebotca...@adacore.com
* gcc-interface/utils.c (gnat_write_global_declarations): Make sure the
dummy global built for global types is preserved.
--
Eric Botcazou
Index: gcc-interface/utils.c
===
--- gcc-interface/utils.c (revision 211857)
+++ gcc-interface/utils.c (revision 211858)
@@ -4895,11 +4895,14 @@ gnat_write_global_declarations (void)
the global hash table. We use a dummy variable for this purpose. */
if (!VEC_empty (tree, types_used_by_cur_var_decl))
{
+ struct varpool_node *node;
dummy_global
= build_decl (BUILTINS_LOCATION, VAR_DECL, NULL_TREE, void_type_node);
TREE_STATIC (dummy_global) = 1;
TREE_ASM_WRITTEN (dummy_global) = 1;
- varpool_mark_needed_node (varpool_node (dummy_global));
+ node = varpool_node (dummy_global);
+ node-force_output = 1;
+ varpool_mark_needed_node (node);
while (!VEC_empty (tree, types_used_by_cur_var_decl))
{
Re: [Patch,AVR]: Clean-up printing bits
2012/2/29 Georg-Johann Lay a...@gjlay.de: This is more of code clean-up: avr_output_bld is unused and can be removed. To print a bit it is more convenient to use %T than patching a string. Ok for trunk? Johann * config/avr/avr-protos.h (avr_output_bld): Remove unused prototype. * config/avr/avr.c (avr_output_bld): Remove unused function. (avr_out_sbxx_branch): Use %T to print bit position. Ok. Denis.
Re: [Patch,AVR] Clean-up: Move TARGET macros to end of avr.c
2012/2/29 Georg-Johann Lay a...@gjlay.de: This patch moves the bulk of TARGET_* macros to the end of avr.c and just prior to their usage by TARGET_INITIALIZER to initialize targetm. It's just more convenient to have that bulk of code at the end of the file... Ok to commit? Johann * config/avr/avr.c: Move definition of TARGET macros to end of file. Ok. Denis.
[4.8, C++ Patch] PR 52422
Hi,
Daniel noticed a couple other SFINAE issues, which I'm fixing in the
usual straightforward way. Tested x86_64-linux.
Thanks,
Paolo.
PS: while working on the patch, I noticed that a few functions, which in
the meanwhile acquired a tsubst_flags_t parameter, aren't fully
propagating it, are still passing tf_warning_or_error. Apparently a
clean-up is in order.
/cp
2012-02-29 Paolo Carlini paolo.carl...@oracle.com
PR c++/52422
* cp-tree.h (build_addr_func, decay_conversion,
build_m_component_ref): Add tsubst_flags_t parameter.
* typeck.c (decay_conversion): Add tsubst_flags_t parameter and
use it throughout.
(default_conversion, cp_build_indirect_ref,
get_member_function_from_ptrfunc, cp_build_function_call_vec,
convert_arguments, build_x_binary_op, cp_build_binary_op,
convert_member_func_to_ptr, build_reinterpret_cast_1,
build_const_cast_1, expand_ptrmemfunc_cst,
convert_for_initialization): Adjust.
* init.c (build_vec_init, build_vec_init): Adjust.
* decl.c (grok_reference_init, get_atexit_node): Likewise.
* rtti.c (build_dynamic_cast_1, tinfo_base_init): Likewise.
* except.c (build_throw): Likewise.
* typeck2.c (build_x_arrow): Likewise.
(build_m_component_ref): Add tsubst_flags_t parameter and
use it throughout.
* pt.c (convert_nontype_argument): Adjust.
* semantics.c (finish_asm_stmt, maybe_add_lambda_conv_op): Likewise.
* call.c (build_addr_func): Add tsubst_flags_t parameter and
use it throughout.
(build_call_a, build_conditional_expr_1, build_new_op_1,
convert_like_real, convert_arg_to_ellipsis, build_over_call,
build_special_member_call): Adjust.
* cvt.c (force_rvalue, build_expr_type_conversion): Likewise.
/testsuite
2012-02-29 Paolo Carlini paolo.carl...@oracle.com
PR c++/52422
* g++.dg/cpp0x/sfinae33.C: New.
* g++.dg/cpp0x/sfinae34.C: Likewise.
Index: testsuite/g++.dg/cpp0x/sfinae33.C
===
--- testsuite/g++.dg/cpp0x/sfinae33.C (revision 0)
+++ testsuite/g++.dg/cpp0x/sfinae33.C (revision 0)
@@ -0,0 +1,27 @@
+// PR c++/52422
+// { dg-options -std=c++0x }
+
+templateclass T
+struct add_rval_ref
+{
+ typedef T type;
+};
+
+template
+struct add_rval_refvoid
+{
+ typedef void type;
+};
+
+templateclass T
+typename add_rval_refT::type create();
+
+templateclass T,
+ class = decltype(createT()())
+
+auto f(int) - char()[1];
+
+templateclass
+auto f(...) - char()[2];
+
+static_assert(sizeof(fvoid(0)) != 1, );
Index: testsuite/g++.dg/cpp0x/sfinae34.C
===
--- testsuite/g++.dg/cpp0x/sfinae34.C (revision 0)
+++ testsuite/g++.dg/cpp0x/sfinae34.C (revision 0)
@@ -0,0 +1,28 @@
+// PR c++/52422
+// { dg-options -std=c++0x }
+
+templateclass T
+struct add_rval_ref
+{
+ typedef T type;
+};
+
+template
+struct add_rval_refvoid
+{
+ typedef void type;
+};
+
+templateclass T
+typename add_rval_refT::type create();
+
+templateclass T, class U,
+ class = decltype( (createT().*createU())() )
+
+auto f(int) - char()[1];
+
+templateclass, class
+auto f(...) - char()[2];
+
+static_assert(sizeof(fvoid, void(0)) != 1, );
+
Index: cp/typeck.c
===
--- cp/typeck.c (revision 184643)
+++ cp/typeck.c (working copy)
@@ -1813,7 +1813,7 @@ unlowered_expr_type (const_tree exp)
that the return value is no longer an lvalue. */
tree
-decay_conversion (tree exp)
+decay_conversion (tree exp, tsubst_flags_t complain)
{
tree type;
enum tree_code code;
@@ -1827,7 +1827,8 @@ tree
exp = resolve_nondeduced_context (exp);
if (type_unknown_p (exp))
{
- cxx_incomplete_type_error (exp, TREE_TYPE (exp));
+ if (complain tf_error)
+ cxx_incomplete_type_error (exp, TREE_TYPE (exp));
return error_mark_node;
}
@@ -1846,13 +1847,14 @@ tree
code = TREE_CODE (type);
if (code == VOID_TYPE)
{
- error (void value not ignored as it ought to be);
+ if (complain tf_error)
+ error (void value not ignored as it ought to be);
return error_mark_node;
}
- if (invalid_nonstatic_memfn_p (exp, tf_warning_or_error))
+ if (invalid_nonstatic_memfn_p (exp, complain))
return error_mark_node;
if (code == FUNCTION_TYPE || is_overloaded_fn (exp))
-return cp_build_addr_expr (exp, tf_warning_or_error);
+return cp_build_addr_expr (exp, complain);
if (code == ARRAY_TYPE)
{
tree adr;
@@ -1864,7 +1866,7 @@ tree
if (TREE_CODE (exp) == COMPOUND_EXPR)
{
- tree op1 = decay_conversion (TREE_OPERAND (exp, 1));
+ tree op1 = decay_conversion (TREE_OPERAND (exp, 1), complain);
return build2 (COMPOUND_EXPR, TREE_TYPE (op1),
TREE_OPERAND
Re: [Ada] fix -feliminate-unused-debug-types counter-measure
On Wed, 29 Feb 2012, Eric Botcazou wrote: -feliminate-unused-debug-types will be enabled for Ada as well in GCC 4.7 and we have implemented a counter-measure to be able to retain apparently unused types in a few specific cases. But it was inadvertently broken some time ago. Fixed thusly, tested on i586-suse-linux, applied on the mainline. I'd like to also apply the following patch: http://gcc.gnu.org/ml/gcc-patches/2012-02/msg01349.html which fixes debug info regressions introduced by the simultaneous introduction of DW_AT_GNAT_descriptive_type and -feliminate-unused-debug-types in Ada. It only affects the Ada compiler since only GNAT uses DW_AT_GNAT_descriptive_type and sets TYPE_ARTIFICIAL on its types. OK? Ok. Thanks, Richard. 2012-02-29 Eric Botcazou ebotca...@adacore.com * gcc-interface/utils.c (gnat_write_global_declarations): Make sure the dummy global built for global types is preserved. -- Richard Guenther rguent...@suse.de SUSE / SUSE Labs SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746 GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer
[PATCH, ARM] Generate usat/ssat instructions
Hello,
this patch adds support for generating usat/ssat instructions to match code
along the lines of:
if (a amin) return amin;
else if (a amax) return amax;
else return a;
for appropriate values of amin/amax. This type code actually occurs in
real-life code (e.g. codecs).
Above code is already translated into a sequence of SMIN/SMAX RTX
operations by expand. The combine pass is able to fold those into
a single RTX pattern, so we only need to make such patterns available
to match the instruction. Note that usat/ssat may in addition shift
their input operand; this is also supported by the patch.
There are already pre-existing patterns that use usat/ssat to
implement us_truncate/ss_truncate. Those represent special
cases of the general instructions, and are left in place by
this patch. (However, some minor fixes e.g. to the sat_shift_operator
predicate and insn attributes apply to those patterns too.)
Tested on arm-linux-gnueabi with no regressions.
OK for 4.8?
Bye,
Ulrich
ChangeLog:
gcc/
* config/arm/arm.c (arm_sat_operator_match): New function.
* config/arm/arm-protos.h (arm_sat_operator_match): Add prototype.
* config/arm/arm.md (insn attribute): Add sat value.
(SAT, SATrev): New code iterators.
(SATlo, SAThi): New code iterator attributes.
(*satsi_SAT:code): New pattern.
(*satsi_SAT:code_shift): Likewise.
* config/arm/arm-fixed.md (arm_ssatsihi_shift): Add insn
and shift attributes.
(arm_usatsihi): Add insn attribute.
* config/arm/predicates.md (sat_shift_operator): Allow multiplication
by powers of two. Do not allow shift by 32.
gcc/testsuite/
* gcc.target/arm/sat-1.c: New test.
Index: gcc/testsuite/gcc.target/arm/sat-1.c
===
--- gcc/testsuite/gcc.target/arm/sat-1.c(revision 0)
+++ gcc/testsuite/gcc.target/arm/sat-1.c(revision 0)
@@ -0,0 +1,64 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
+/* { dg-options -O2 -marm } */
+/* { dg-add-options arm_arch_v6 } */
+
+
+static inline int sat1 (int a, int amin, int amax)
+{
+ if (a amin) return amin;
+ else if (a amax) return amax;
+ else return a;
+}
+
+static inline int sat2 (int a, int amin, int amax)
+{
+ if (a amax) return amax;
+ else if (a amin) return amin;
+ else return a;
+}
+
+int u1 (int x)
+{
+ return sat1 (x, 0, 63);
+}
+
+int us1 (int x)
+{
+ return sat1 (x 5, 0, 63);
+}
+
+int s1 (int x)
+{
+ return sat1 (x, -64, 63);
+}
+
+int ss1 (int x)
+{
+ return sat1 (x 5, -64, 63);
+}
+
+int u2 (int x)
+{
+ return sat2 (x, 0, 63);
+}
+
+int us2 (int x)
+{
+ return sat2 (x 5, 0, 63);
+}
+
+int s2 (int x)
+{
+ return sat2 (x, -64, 63);
+}
+
+int ss2 (int x)
+{
+ return sat2 (x 5, -64, 63);
+}
+
+/* { dg-final { scan-assembler-times usat 4 } } */
+/* { dg-final { scan-assembler-times ssat 4 } } */
+
Index: gcc/config/arm/arm.c
===
--- gcc/config/arm/arm.c(revision 184553)
+++ gcc/config/arm/arm.c(working copy)
@@ -10041,6 +10041,42 @@
}
}
+/* Match pair of min/max operators that can be implemented via usat/ssat. */
+
+bool
+arm_sat_operator_match (rtx lo_bound, rtx hi_bound,
+ int *mask, bool *signed_sat)
+{
+ /* The high bound must be a power of two minus one. */
+ int log = exact_log2 (INTVAL (hi_bound) + 1);
+ if (log == -1)
+return false;
+
+ /* The low bound is either zero (for usat) or one less than the
+ negation of the high bound (for ssat). */
+ if (INTVAL (lo_bound) == 0)
+{
+ if (mask)
+*mask = log;
+ if (signed_sat)
+*signed_sat = false;
+
+ return true;
+}
+
+ if (INTVAL (lo_bound) == -INTVAL (hi_bound) - 1)
+{
+ if (mask)
+*mask = log + 1;
+ if (signed_sat)
+*signed_sat = true;
+
+ return true;
+}
+
+ return false;
+}
+
/* Return 1 if memory locations are adjacent. */
int
adjacent_mem_locations (rtx a, rtx b)
Index: gcc/config/arm/arm-fixed.md
===
--- gcc/config/arm/arm-fixed.md (revision 184553)
+++ gcc/config/arm/arm-fixed.md (working copy)
@@ -374,6 +374,8 @@
TARGET_32BIT arm_arch6
ssat%?\\t%0, #16, %2%S1
[(set_attr predicable yes)
+ (set_attr insn sat)
+ (set_attr shift 1)
(set_attr type alu_shift)])
(define_insn arm_usatsihi
@@ -381,4 +383,5 @@
(us_truncate:HI (match_operand:SI 1 s_register_operand)))]
TARGET_INT_SIMD
usat%?\\t%0, #16, %1
- [(set_attr predicable yes)])
+ [(set_attr predicable yes)
+ (set_attr insn sat)])
Index: gcc/config/arm/arm-protos.h
===
---
Re: [ARM, patch, testsuite] Enable vect_condition tests for ARM/NEON
Mike Stump wrote: On Feb 28, 2012, at 4:08 PM, Ramana Radhakrishnan wrote: Certainly no objections to it - in fact I'd suggest it for 4.6 as well. The backport is fine, if someone wants to do the work. Just let it bake a = little in the top of the tree as usual first. I've already checked the patch in to 4.6 too -- the tests newly enabled by it all pass there as well. Bye, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE ulrich.weig...@de.ibm.com
Re: [ARM, patch, testsuite] Enable vect_condition tests for ARM/NEON
On 29 February 2012 13:06, Ulrich Weigand uweig...@de.ibm.com wrote: Mike Stump wrote: On Feb 28, 2012, at 4:08 PM, Ramana Radhakrishnan wrote: Certainly no objections to it - in fact I'd suggest it for 4.6 as well. The backport is fine, if someone wants to do the work. Just let it bake a = little in the top of the tree as usual first. I've already checked the patch in to 4.6 too -- the tests newly enabled by it all pass there as well. Cool thanks. Ramana Bye, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE ulrich.weig...@de.ibm.com
Re: [PATCH, ARM] Generate usat/ssat instructions
(SAT, SATrev): New code iterators. (SATlo, SAThi): New code iterator attributes. (*satsi_SAT:code): New pattern. (*satsi_SAT:code_shift): Likewise. Iterators must go into iterators.md. Ok with that change for 4.8 if no regressions. Ramana
Re: [PATCH, ARM] Generate usat/ssat instructions
Ramana Radhakrishnan wrote: (SAT, SATrev): New code iterators. (SATlo, SAThi): New code iterator attributes. (*satsi_SAT:code): New pattern. (*satsi_SAT:code_shift): Likewise. Iterators must go into iterators.md. Hmm, I left them in arm.md deliberately, because they apply very specifically only to those new patters; e.g. the SATlo / SAThi attributes give operand numbers in the pattern, and don't make sense for anything else ... This is following what appeared to me to be existing precedent e.g. FCVT in vfp.md ... But if you prefer to have them in iterators.md anyway, I'll be happy to move them, of course. Ok with that change for 4.8 if no regressions. Thanks, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE ulrich.weig...@de.ibm.com
Re: [PATCH, ARM] Generate usat/ssat instructions
On 29 February 2012 13:25, Ulrich Weigand uweig...@de.ibm.com wrote: Ramana Radhakrishnan wrote: (SAT, SATrev): New code iterators. (SATlo, SAThi): New code iterator attributes. (*satsi_SAT:code): New pattern. (*satsi_SAT:code_shift): Likewise. Iterators must go into iterators.md. Hmm, I left them in arm.md deliberately, because they apply very specifically only to those new patters; e.g. the SATlo / SAThi attributes give operand numbers in the pattern, and don't make sense for anything else ... Might as well leave them there then as you say. Ramana
Re: [PATCH][ARM] NEON DImode neg
On 28/02/12 17:45, Andrew Stubbs wrote:
This patch adds a DImode negate pattern for NEON.
Oops, that patch completely failed to allow for the fallback to
instructions that work in core registers. It also forgot to mention that
the CC register was clobbered.
This patch is the same except that it addresses those deficiencies. The
outputs are the same.
Ok for 4.8?
Andrew
2012-02-29 Andrew Stubbs a...@codesourcery.com
gcc/
* config/arm/arm.md (negdi2): Use gen_negdi2_neon.
* config/arm/neon.md (negdi2_neon): New insn.
Also add splitters for core and NEON registers.
---
gcc/config/arm/arm.md |8 +++-
gcc/config/arm/neon.md | 37 +
2 files changed, 44 insertions(+), 1 deletions(-)
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 751997f..f1dbbf7 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4048,7 +4048,13 @@
(neg:DI (match_operand:DI 1 s_register_operand )))
(clobber (reg:CC CC_REGNUM))])]
TARGET_EITHER
-
+ {
+if (TARGET_NEON)
+ {
+emit_insn (gen_negdi2_neon (operands[0], operands[1]));
+ DONE;
+ }
+ }
)
;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1).
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index d7caa37..b040ab1 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -922,6 +922,43 @@
(const_string neon_int_3)))]
)
+(define_insn negdi2_neon
+ [(set (match_operand:DI 0 s_register_operand =w,?r,?r,?w)
+ (neg:DI (match_operand:DI 1 s_register_operand w, 0, r, w)))
+ (clobber (match_scratch:DI 2 =w, X, X, w))
+ (clobber (reg:CC CC_REGNUM))]
+ TARGET_NEON
+ #
+ [(set_attr length 8)
+ (set_attr arch nota8,*,*,onlya8)]
+)
+
+; Split negdi2_neon for vfp registers
+(define_split
+ [(set (match_operand:DI 0 s_register_operand )
+ (neg:DI (match_operand:DI 1 s_register_operand )))
+ (clobber (match_scratch:DI 2 ))
+ (clobber (reg:CC CC_REGNUM))]
+ TARGET_NEON reload_completed IS_VFP_REGNUM (REGNO (operands[0]))
+ [(set (match_dup 2) (const_int 0))
+ (parallel [(set (match_dup 0) (minus:DI (match_dup 2) (match_dup 1)))
+ (clobber (reg:CC CC_REGNUM))])]
+
+)
+
+; Split negdi2_neon for core registers
+(define_split
+ [(set (match_operand:DI 0 s_register_operand )
+ (neg:DI (match_operand:DI 1 s_register_operand )))
+ (clobber (match_scratch:DI 2 ))
+ (clobber (reg:CC CC_REGNUM))]
+ TARGET_32BIT reload_completed
+arm_general_register_operand (operands[0], DImode)
+ [(parallel [(set (match_dup 0) (neg:DI (match_dup 1)))
+ (clobber (reg:CC CC_REGNUM))])]
+
+)
+
(define_insn *uminmode3_neon
[(set (match_operand:VDQIW 0 s_register_operand =w)
(umin:VDQIW (match_operand:VDQIW 1 s_register_operand w)
RE: [PATCH,ARM] Improve peepholes for LDM with commutative operators
I'm attaching a new version of the patch. Fixed all comments and retested. No regression on qemu --with-cpu cortex-a9. Thank you, Greta gcc/ChangeLog 2012-02-29 Greta Yorsh greta.yo...@arm.com * config/arm/arm-ldmstm.ml (write_ldm_commutative_peephole): Improved conditions of peepholes generating LDM followed by commutative operator. * config/arm/ldmstm.md: Regenerated. -Original Message- From: Ramana Radhakrishnan [mailto:ramana.radhakrish...@linaro.org] Sent: 29 February 2012 00:41 To: Greta Yorsh Cc: gcc-patches@gcc.gnu.org; ram...@gcc.gnu.org; p...@codesourcery.com; ni...@redhat.com Subject: Re: [PATCH,ARM] Improve peepholes for LDM with commutative operators [Sorry about the duplicate mail. My mailer seems to have eaten up the original reply I sent. ] On Tue, Feb 28, 2012 at 05:09:05PM -, Greta Yorsh wrote: Is it OK for GCC 4.7 Stage 4 ? This is stage4 - I'd like to hear what the RM's think. Technically it's fixing a regression and is low risk to me. In any case there are a couple of changes that I'd like done as explained below. Thank you, Greta gcc/ChangeLog 2012-02-28 Greta Yorsh greta.yo...@arm.com * config/arm/arm-ldmstm.ml: Improved conditions of peepholes that generate LDM followed by a commutative operator. * config/arm/ldmstm.md: Regenerated. Can you mention which 2 peepholes are changed in some way. diff --git a/gcc/config/arm/arm-ldmstm.ml b/gcc/config/arm/arm- ldmstm.ml index 221edd2..5f5a5e0 100644 --- a/gcc/config/arm/arm-ldmstm.ml +++ b/gcc/config/arm/arm-ldmstm.ml @@ -216,9 +216,10 @@ let write_ldm_commutative_peephole thumb = Printf.printf %s (match_operand:SI %d \s_register_operand\ \\)]))\n indent (nregs * 2 + 3); Printf.printf %s (clobber (reg:CC CC_REGNUM))])]\n indent end; - Printf.printf \(((operands[%d] == operands[0] operands[%d] == operands[1])\n (nregs * 2 + 2) (nregs * 2 + 3); - Printf.printf || (operands[%d] == operands[0] operands[%d] == operands[1]))\n (nregs * 2 + 3) (nregs * 2 + 2); - Printf.printf peep2_reg_dead_p (%d, operands[0]) peep2_reg_dead_p (%d, operands[1]))\\n (nregs + 1) (nregs + 1); + Printf.printf \(((rtx_equal_p (operands[%d], operands[0]) rtx_equal_p (operands[%d], operands[1]))\n (nregs * 2 + 2) (nregs * 2 + 3); + Printf.printf || (rtx_equal_p (operands[%d], operands[0]) rtx_equal_p (operands[%d], operands[1])))\n (nregs * 2 + 3) (nregs * 2 + 2); + Printf.printf (peep2_reg_dead_p (%d, operands[0]) || rtx_equal_p (operands[0], operands[%d]))\n (nregs + 1) (nregs * 2); + Printf.printf (peep2_reg_dead_p (%d, operands[1]) || rtx_equal_p (operands[1], operands[%d])))\\n (nregs + 1) (nregs * 2); begin if thumb then Printf.printf [(set (match_dup %d) (match_op_dup %d [(match_dup %d) (match_dup %d)]))]\n diff --git a/gcc/config/arm/ldmstm.md b/gcc/config/arm/ldmstm.md index 5db4a32..5db3d57 100644 --- a/gcc/config/arm/ldmstm.md +++ b/gcc/config/arm/ldmstm.md @@ -1160,9 +1160,10 @@ [(match_operand:SI 6 s_register_operand ) (match_operand:SI 7 s_register_operand )])) (clobber (reg:CC CC_REGNUM))])] - (((operands[6] == operands[0] operands[7] == operands[1]) - || (operands[7] == operands[0] operands[6] == operands[1])) - peep2_reg_dead_p (3, operands[0]) peep2_reg_dead_p (3, operands[1])) + (((rtx_equal_p (operands[6], operands[0]) rtx_equal_p (operands[7], operands[1])) + || (rtx_equal_p (operands[7], operands[0]) rtx_equal_p (operands[6], operands[1]))) + (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4])) + (peep2_reg_dead_p (3, operands[1]) || rtx_equal_p (operands[1], operands[4]))) Line 80 characters - [(parallel [(set (match_dup 4) (match_op_dup 5 [(match_dup 6) (match_dup 7)])) (clobber (reg:CC CC_REGNUM))])] @@ -1180,9 +1181,10 @@ (match_operator:SI 5 commutative_binary_operator [(match_operand:SI 6 s_register_operand ) (match_operand:SI 7 s_register_operand )]))] - (((operands[6] == operands[0] operands[7] == operands[1]) - || (operands[7] == operands[0] operands[6] == operands[1])) - peep2_reg_dead_p (3, operands[0]) peep2_reg_dead_p (3, operands[1])) + (((rtx_equal_p (operands[6], operands[0]) rtx_equal_p (operands[7], operands[1])) + || (rtx_equal_p (operands[7], operands[0]) rtx_equal_p (operands[6], operands[1]))) Again line 80 characters. Instead of rtx_equal_p, check that the REGNOs are equal. That will be cheaper: we know these are register_operands. For bonus points you use peep2_regno_dead_p with REGNO (operands[n]) instead of peep2_reg_dead_p. If we are accessing REGNO might as well reuse it :). regards Ramana diff --git a/gcc/config/arm/arm-ldmstm.ml
Re: [PATCH,ARM] Improve peepholes for LDM with commutative operators
On 29 February 2012 14:20, Greta Yorsh greta.yo...@arm.com wrote: I'm attaching a new version of the patch. Fixed all comments and retested. No regression on qemu --with-cpu cortex-a9. OK by me but please give 24 hours for an RM to comment / object. cheers Ramana
Re: [gimplefe][patch] The symbol table for declarations
On 24/02/12 01:03 , Sandeep Soni wrote: + name_token = gl_consume_expected_token (parser-lexer, CPP_NAME); + name = gl_token_as_text (name_token); + + e = ggc_alloc_cleared_gimple_symtab_entry_def (); + e-id = get_identifier(name); + slot = htab_find_slot (gimple_symtab, e, NO_INSERT); + if (!slot) Why not just use INSERT here? If the slot is empty, you can then test 'if (*slot == NULL)' (since the INSERT operation guarantees that 'slot' will be non-NULL. Also, please factor this code to a helper function to abstract the hash table operations. We will later want to add a pure lookup routine and we may want to add symbols to the symbol table from other contexts. The rest looks fine. Thanks for doing this! Diego.
[PATCH][ARM] NEON DImode not
Hi all, This patch adds support for the DImode not operation in NEON. Currently the compiler must move the value to core registers, invert it there, and move it back again. This is bonkers because the VMVN instruction will do the job perfectly. The patch adds a pattern to support VMVN in DImode (in addition to the vector modes already supported) and retains the support for doing bitwise not in core registers where appropriate. OK for 4.8? Andrew 2012-02-29 Andrew Stubbs a...@codesourcery.com gcc/ * config/arm/arm.md (one_cmpldi2): Rename to one_cmpldi2_internal and replace with a new define_expand. (one_cmpldi2_internal): Exclude splitting for VFP registers. * config/arm/neon.md (one_cmpldi2_neon): New pattern. --- gcc/config/arm/arm.md | 13 ++--- gcc/config/arm/neon.md | 14 ++ 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 751997f..93fde58 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4206,12 +4206,19 @@ TARGET_32BIT TARGET_HARD_FLOAT (TARGET_FPA || TARGET_VFP_DOUBLE) ) -(define_insn_and_split one_cmpldi2 +(define_expand one_cmpldi2 + [(set (match_operand:DI 0 s_register_operand ) + (not:DI (match_operand:DI 1 s_register_operand )))] + TARGET_32BIT + ) + +(define_insn_and_split *one_cmpldi2_internal [(set (match_operand:DI 0 s_register_operand =r,r) (not:DI (match_operand:DI 1 s_register_operand 0,r)))] - TARGET_32BIT + TARGET_32BIT !TARGET_NEON # - TARGET_32BIT reload_completed + TARGET_32BIT reload_completed +arm_general_register_operand (operands[0], DImode) [(set (match_dup 0) (not:SI (match_dup 1))) (set (match_dup 2) (not:SI (match_dup 3)))] diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index d7caa37..f34d266 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -896,6 +896,20 @@ [(set_attr neon_type neon_int_1)] ) +(define_insn *one_cmpldi2_neon + [(set (match_operand:DI 0 s_register_operand =w,?r,?r,?w) +(not:DI (match_operand:DI 1 s_register_operand w, 0, r, w)))] + TARGET_NEON + @ + vmvn\t%P0, %P1 + # + # + vmvn\t%P0, %P1 + [(set_attr neon_type neon_int_1,*,*,neon_int_1) + (set_attr arch nota8,*,*,onlya8) + (set_attr length *,8,8,*)] +) + (define_insn absmode2 [(set (match_operand:VDQW 0 s_register_operand =w) (abs:VDQW (match_operand:VDQW 1 s_register_operand w)))]
Re: [C++ Patch] for c++/51214
On 02/28/2012 05:06 PM, Fabien Chêne wrote: I agree, this is not efficient but I didn't find a better place. perhaps in cp_parser_enumerator_list, that would require adding an additional parameter to keep track of all the enum DECLs. Is it what you have in mind ? I was thinking of finish_enum_value_list. Unqualified lookup works because when the type is not complete, the lookup uses the non sorted case, which always works. OK, just make sure we have a test for that. Jason
[Patch ARM] Turn on hot cold partitioning.
Hi ,
This patch turns on hot cold partitioning for the ARM target. Given that
NOTE_INSN_SWITCH_SECTIONS gets created once - we should see
that this works.
Passed testing with cross on qemu - Simple handwritten tests for this
appear to work.
I'll commit this for 4.8 and would like some feedback for this.
regards,
Ramana
2012-02-29 Ramana Radhakrishnan ramana.radhakrish...@linaro.org
* config/arm/arm.c (arm_option_override): Allow hot cold
partitioning.
(arm_reorg): Handle NOTE_INSN_SWITCH_TEXT_SECTIONS.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b58877b..b9fd116 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1976,16 +1976,6 @@ arm_option_override (void)
else
max_insns_skipped = current_tune-max_insns_skipped;
- /* Hot/Cold partitioning is not currently supported, since we can't
- handle literal pool placement in that case. */
- if (flag_reorder_blocks_and_partition)
-{
- inform (input_location,
- -freorder-blocks-and-partition not supported on this
architecture);
- flag_reorder_blocks_and_partition = 0;
- flag_reorder_blocks = 1;
-}
-
if (flag_pic)
/* Hoisting PIC address calculations more aggressively provides a small,
but measurable, size reduction for PIC code. Therefore, we decrease
@@ -13332,8 +13322,21 @@ arm_reorg (void)
minipool_pad = 0;
/* Scan all the insns and record the operands that will need fixing. */
- for (insn = next_nonnote_insn (insn); insn; insn = next_nonnote_insn (insn))
+ for (insn = next_nondebug_insn (insn); insn; insn = next_nondebug_insn
(insn))
{
+ if (NOTE_P (insn))
+ {
+ if (NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
+ {
+ /* Given we cannot address a range greater than 4M go
+ahead and increase the address sky high to force
+all pools before this note to be dumped. */
+ address += 0x40;
+ }
+ else
+ continue;
+ }
+
if (TARGET_CIRRUS_FIX_INVALID_INSNS
(arm_cirrus_insn_p (insn)
|| GET_CODE (insn) == JUMP_INSN
Re: [PATCH] Fix PR52406
On Tue, 28 Feb 2012, Richard Guenther wrote:
I am testing the following patch to fix PR52406. We cannot simply
feed DR_BASE_OBJECT to the alias-oracle as it does not reflect
a real memory access. Only if we query two 'structurally compatible'
references we may do this. So the following patch reverts to
using DR_REF instead and improves data-ref index disambiguation
by handling COMPONENT_REFs as extra access dimension (similar to how
we handle REALPART/IMAGPART_EXPR).
So, this didn't exactly work out. The following instead tries
to make sure we have the real base object in DR_BASE_OBJECT
so we _can_ use the tree alias-oracle to disambiguate different
ones (so DR_BASE_OBJECT has to have a meaningful size, and
a.b[0].c cannot simply be the base-object for a.b[i].c, instead
a or a.b would be valid base-objects for it). Now, things
get interesting if you consider *(p + i) style accesses where
we cannot really create an artificial access that covers the
whole base object - instead I mark the base MEM_REF of such
accesses with TREE_NO_WARNING (ugh) and special-case for them
in dr_may_alias_p. Fortunately there are almost no users of
DR_BASE_OBJECT, and the ones in the vectorizer are even wrong.
The patch has become quite invasive so I am considering to delay
it until after 4.7.0 and eventually backport it.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
Richard.
2012-02-29 Richard Guenther rguent...@suse.de
PR tree-optimization/52406
* tree-data-ref.c (dr_analyze_indices): For COMPONENT_REFs
add indices to allow their disambiguation. Make DR_BASE_OBJECT
be an artificial access that covers the whole indexed object,
or mark it with TREE_NO_WARNING if we cannot do so. Canonicalize
plain decl base-objects to their MEM_REF variant.
(dr_may_alias_p): When the base-object of either data reference
has unknown size use only points-to information.
(compute_affine_dependence): Make dumps easier to read and
more verbose.
* tree-vect-data-ref.c (vector_alignment_reachable_p): Use
DR_REF when looking for packed references.
(vect_supportable_dr_alignment): Likewise.
* gcc.dg/torture/pr52406.c: New testcase.
Index: gcc/tree-data-ref.c
===
*** gcc/tree-data-ref.c (revision 184656)
--- gcc/tree-data-ref.c (working copy)
*** static void
*** 856,862
dr_analyze_indices (struct data_reference *dr, loop_p nest, loop_p loop)
{
VEC (tree, heap) *access_fns = NULL;
! tree ref, *aref, op;
tree base, off, access_fn;
basic_block before_loop;
--- 856,862
dr_analyze_indices (struct data_reference *dr, loop_p nest, loop_p loop)
{
VEC (tree, heap) *access_fns = NULL;
! tree ref, op;
tree base, off, access_fn;
basic_block before_loop;
*** dr_analyze_indices (struct data_referenc
*** 869,875
return;
}
! ref = unshare_expr (DR_REF (dr));
before_loop = block_before_loop (nest);
/* REALPART_EXPR and IMAGPART_EXPR can be handled like accesses
--- 869,875
return;
}
! ref = DR_REF (dr);
before_loop = block_before_loop (nest);
/* REALPART_EXPR and IMAGPART_EXPR can be handled like accesses
*** dr_analyze_indices (struct data_referenc
*** 887,947
}
/* Analyze access functions of dimensions we know to be independent. */
! aref = ref;
! while (handled_component_p (*aref))
{
! if (TREE_CODE (*aref) == ARRAY_REF)
{
! op = TREE_OPERAND (*aref, 1);
access_fn = analyze_scalar_evolution (loop, op);
access_fn = instantiate_scev (before_loop, loop, access_fn);
VEC_safe_push (tree, heap, access_fns, access_fn);
- /* For ARRAY_REFs the base is the reference with the index replaced
-by zero if we can not strip it as the outermost component. */
- if (*aref == ref)
- {
- *aref = TREE_OPERAND (*aref, 0);
- continue;
- }
- else
- TREE_OPERAND (*aref, 1) = build_int_cst (TREE_TYPE (op), 0);
}
! aref = TREE_OPERAND (*aref, 0);
}
/* If the address operand of a MEM_REF base has an evolution in the
analyzed nest, add it as an additional independent access-function. */
! if (TREE_CODE (*aref) == MEM_REF)
{
! op = TREE_OPERAND (*aref, 0);
access_fn = analyze_scalar_evolution (loop, op);
access_fn = instantiate_scev (before_loop, loop, access_fn);
if (TREE_CODE (access_fn) == POLYNOMIAL_CHREC)
{
tree orig_type;
base = initial_condition (access_fn);
orig_type = TREE_TYPE (base);
STRIP_USELESS_TYPE_CONVERSION (base);
split_constant_offset (base, base, off);
/* Fold the MEM_REF offset into the evolutions initial
[PATCH] Fix up parloops with debug labels (PR tree-optimization/52429)
Hi!
Since debug stmts can contain LABEL_DECLs we can ICE in parloops on them,
fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux. Ok
for trunk?
2012-02-29 Jakub Jelinek ja...@redhat.com
PR tree-optimization/52429
* tree-parloops.c (separate_decls_in_region_debug): Return early
if var is LABEL_DECL.
* gcc.dg/torture/pr52429.c: New test.
* g++.dg/opt/pr52429.C: New test.
--- gcc/tree-parloops.c.jj 2012-02-12 15:46:32.0 +0100
+++ gcc/tree-parloops.c 2012-02-29 13:06:18.857910264 +0100
@@ -909,7 +909,7 @@ separate_decls_in_region_debug (gimple s
var = gimple_debug_source_bind_get_var (stmt);
else
return true;
- if (TREE_CODE (var) == DEBUG_EXPR_DECL)
+ if (TREE_CODE (var) == DEBUG_EXPR_DECL || TREE_CODE (var) == LABEL_DECL)
return true;
gcc_assert (DECL_P (var) SSA_VAR_P (var));
ielt.uid = DECL_UID (var);
--- gcc/testsuite/gcc.dg/torture/pr52429.c.jj 2012-02-29 13:39:25.133074390
+0100
+++ gcc/testsuite/gcc.dg/torture/pr52429.c 2012-02-29 13:39:04.0
+0100
@@ -0,0 +1,24 @@
+/* PR tree-optimization/52429 */
+/* { dg-do compile } */
+/* { dg-require-effective-target pthread } */
+/* { dg-options -g -ftree-parallelize-loops=4 } */
+
+double d[65536], e[65536];
+
+void
+foo (void)
+{
+ int i;
+ double f, g;
+ for (i = 0; i 65536; i++)
+{
+ f = e[i];
+ goto lab1;
+lab2:
+ d[i] = f * g;
+ continue;
+lab1:
+ g = d[i];
+ goto lab2;
+}
+}
--- gcc/testsuite/g++.dg/opt/pr52429.C.jj 2012-02-29 13:37:15.918778821
+0100
+++ gcc/testsuite/g++.dg/opt/pr52429.C 2012-02-29 13:36:42.0 +0100
@@ -0,0 +1,23 @@
+// PR tree-optimization/52429
+// { dg-do compile }
+// { dg-require-effective-target pthread }
+// { dg-options -O -g -ftree-parallelize-loops=4 }
+
+struct B
+{
+ B () : b (__null) {}
+ int *b;
+};
+
+void *
+operator new (__SIZE_TYPE__, void *p)
+{
+ return p;
+}
+
+void
+foo (B *x, unsigned y)
+{
+ while (y--)
+new (x) B;
+}
Jakub
Re: [PATCH] Fix PR52406
Hi, On Wed, 29 Feb 2012, Richard Guenther wrote: the whole base object - instead I mark the base MEM_REF of such accesses with TREE_NO_WARNING (ugh) and special-case for them in dr_may_alias_p. At least use a flag that isn't currently used for MEM_REF. E.g. addressable_flag, and make a new macro that checks for the tree being a MEMREF to access it. Ciao, Michael.
Re: [PATCH] Fix PR52406
On Wed, 29 Feb 2012, Michael Matz wrote: Hi, On Wed, 29 Feb 2012, Richard Guenther wrote: the whole base object - instead I mark the base MEM_REF of such accesses with TREE_NO_WARNING (ugh) and special-case for them in dr_may_alias_p. At least use a flag that isn't currently used for MEM_REF. E.g. addressable_flag, and make a new macro that checks for the tree being a MEMREF to access it. Ok, I'll use TREE_VISITED. The alternative is to increase the size of struct indices (and thus all data-refs) and have a separate flag. Richard.
Re: [PATCH] Fix up parloops with debug labels (PR tree-optimization/52429)
On Wed, Feb 29, 2012 at 4:31 PM, Jakub Jelinek ja...@redhat.com wrote:
Hi!
Since debug stmts can contain LABEL_DECLs we can ICE in parloops on them,
fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux. Ok
for trunk?
Ok.
Thanks,
Richard.
2012-02-29 Jakub Jelinek ja...@redhat.com
PR tree-optimization/52429
* tree-parloops.c (separate_decls_in_region_debug): Return early
if var is LABEL_DECL.
* gcc.dg/torture/pr52429.c: New test.
* g++.dg/opt/pr52429.C: New test.
--- gcc/tree-parloops.c.jj 2012-02-12 15:46:32.0 +0100
+++ gcc/tree-parloops.c 2012-02-29 13:06:18.857910264 +0100
@@ -909,7 +909,7 @@ separate_decls_in_region_debug (gimple s
var = gimple_debug_source_bind_get_var (stmt);
else
return true;
- if (TREE_CODE (var) == DEBUG_EXPR_DECL)
+ if (TREE_CODE (var) == DEBUG_EXPR_DECL || TREE_CODE (var) == LABEL_DECL)
return true;
gcc_assert (DECL_P (var) SSA_VAR_P (var));
ielt.uid = DECL_UID (var);
--- gcc/testsuite/gcc.dg/torture/pr52429.c.jj 2012-02-29 13:39:25.133074390
+0100
+++ gcc/testsuite/gcc.dg/torture/pr52429.c 2012-02-29 13:39:04.0
+0100
@@ -0,0 +1,24 @@
+/* PR tree-optimization/52429 */
+/* { dg-do compile } */
+/* { dg-require-effective-target pthread } */
+/* { dg-options -g -ftree-parallelize-loops=4 } */
+
+double d[65536], e[65536];
+
+void
+foo (void)
+{
+ int i;
+ double f, g;
+ for (i = 0; i 65536; i++)
+ {
+ f = e[i];
+ goto lab1;
+ lab2:
+ d[i] = f * g;
+ continue;
+ lab1:
+ g = d[i];
+ goto lab2;
+ }
+}
--- gcc/testsuite/g++.dg/opt/pr52429.C.jj 2012-02-29 13:37:15.918778821
+0100
+++ gcc/testsuite/g++.dg/opt/pr52429.C 2012-02-29 13:36:42.0 +0100
@@ -0,0 +1,23 @@
+// PR tree-optimization/52429
+// { dg-do compile }
+// { dg-require-effective-target pthread }
+// { dg-options -O -g -ftree-parallelize-loops=4 }
+
+struct B
+{
+ B () : b (__null) {}
+ int *b;
+};
+
+void *
+operator new (__SIZE_TYPE__, void *p)
+{
+ return p;
+}
+
+void
+foo (B *x, unsigned y)
+{
+ while (y--)
+ new (x) B;
+}
Jakub
Re: [Patch, fortran] PR52386 - [4.6/4.7 Regression] ICE in gfc_conv_descriptor_dtyp (realloc LHS related)
On Wed, Feb 29, 2012 at 08:27:42AM +0100, Paul Richard Thomas wrote: Regression fix okayed by Tobias Burnus on #gfortran and committed as revision 184651. Cheers Paul Thanks! Just a reminder. Did you get approval from the Release Mananger? The last GCC 4.7.0 status reported indicated that all commits need explicit approval from RM due to the upcoming release of 4.7.0. -- Steve
Re: [Patch, fortran] PR52386 - [4.6/4.7 Regression] ICE in gfc_conv_descriptor_dtyp (realloc LHS related)
On Wed, Feb 29, 2012 at 5:07 PM, Steve Kargl s...@troutmask.apl.washington.edu wrote: On Wed, Feb 29, 2012 at 08:27:42AM +0100, Paul Richard Thomas wrote: Regression fix okayed by Tobias Burnus on #gfortran and committed as revision 184651. Cheers Paul Thanks! Just a reminder. Did you get approval from the Release Mananger? The last GCC 4.7.0 status reported indicated that all commits need explicit approval from RM due to the upcoming release of 4.7.0. Not yet, you misinterpreted that one. Richard. -- Steve
Re: [PATCH] Further update baseline_symbols.txt
On Mon, Feb 27, 2012 at 7:21 AM, Jonathan Wakely jwakely@gmail.com wrote: On 27 February 2012 15:18, Jakub Jelinek wrote: Hi! Apparently after I've updated baseline_symbols.txt files for a couple of targets Jonathan added some extra exported symbols. This patch adds them. Ok for trunk? OK - thanks. I checked in this as an obvious change to also update x32 aseline_symbols.txt. Tested with Linux/x32. -- H.J. --- diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 98f8ea9..90db3c5 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,7 @@ +2012-02-29 H.J. Lu hongjiu...@intel.com + + * config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Update. + 2012-02-28 Benjamin Kosnik b...@redhat.com PR libstdc++/52191 diff --git a/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt b/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt index 68ed545..551e738 100644 --- a/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt @@ -43,6 +43,10 @@ FUNC:_ZN11__gnu_debug19_Safe_sequence_base13_M_detach_allEv@@GLIBCXX_3.4 FUNC:_ZN11__gnu_debug19_Safe_sequence_base18_M_detach_singularEv@@GLIBCXX_3.4 FUNC:_ZN11__gnu_debug19_Safe_sequence_base22_M_revalidate_singularEv@@GLIBCXX_3.4 FUNC:_ZN11__gnu_debug19_Safe_sequence_base7_M_swapERS0_@@GLIBCXX_3.4 +FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@@GLIBCXX_3.4.17 +FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base9_M_detachEv@@GLIBCXX_3.4.17 +FUNC:_ZN11__gnu_debug30_Safe_unordered_container_base13_M_detach_allEv@@GLIBCXX_3.4.17 +FUNC:_ZN11__gnu_debug30_Safe_unordered_container_base7_M_swapERS0_@@GLIBCXX_3.4.17 FUNC:_ZN14__gnu_parallel9_Settings3getEv@@GLIBCXX_3.4.10 FUNC:_ZN14__gnu_parallel9_Settings3setERS0_@@GLIBCXX_3.4.10 FUNC:_ZN9__gnu_cxx12__atomic_addEPVii@@GLIBCXX_3.4 @@ -820,6 +824,7 @@ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_@@GLIBCXX_3.4 FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_jj@@GLIBCXX_3.4 FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjjw@@GLIBCXX_3.4 FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7reserveEj@@GLIBCXX_3.4 +FUNC:_ZNSbIwSt11char_traitsIwESaIwEE8pop_backEv@@GLIBCXX_3.4.17 FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@@GLIBCXX_3.4.5 FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4 FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEjjj@@GLIBCXX_3.4 @@ -1056,6 +1061,7 @@ FUNC:_ZNSs7replaceEjjRKSs@@GLIBCXX_3.4 FUNC:_ZNSs7replaceEjjRKSsjj@@GLIBCXX_3.4 FUNC:_ZNSs7replaceEjjjc@@GLIBCXX_3.4 FUNC:_ZNSs7reserveEj@@GLIBCXX_3.4 +FUNC:_ZNSs8pop_backEv@@GLIBCXX_3.4.17 FUNC:_ZNSs9_M_assignEPcjc@@GLIBCXX_3.4.5 FUNC:_ZNSs9_M_assignEPcjc@GLIBCXX_3.4 FUNC:_ZNSs9_M_mutateEjjj@@GLIBCXX_3.4 @@ -1289,6 +1295,9 @@ FUNC:_ZNSt13__future_base12_Result_baseC2Ev@@GLIBCXX_3.4.15 FUNC:_ZNSt13__future_base12_Result_baseD0Ev@@GLIBCXX_3.4.15 FUNC:_ZNSt13__future_base12_Result_baseD1Ev@@GLIBCXX_3.4.15 FUNC:_ZNSt13__future_base12_Result_baseD2Ev@@GLIBCXX_3.4.15 +FUNC:_ZNSt13__future_base19_Async_state_commonD0Ev@@GLIBCXX_3.4.17 +FUNC:_ZNSt13__future_base19_Async_state_commonD1Ev@@GLIBCXX_3.4.17 +FUNC:_ZNSt13__future_base19_Async_state_commonD2Ev@@GLIBCXX_3.4.17 FUNC:_ZNSt13bad_exceptionD0Ev@@GLIBCXX_3.4 FUNC:_ZNSt13bad_exceptionD1Ev@@GLIBCXX_3.4 FUNC:_ZNSt13bad_exceptionD2Ev@@GLIBCXX_3.4 @@ -1593,6 +1602,8 @@ FUNC:_ZNSt15__exception_ptreqERKNS_13exception_ptrES2_@@CXXABI_1.3.3 FUNC:_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@@CXXABI_1.3.3 FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4 +FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEi@@GLIBCXX_3.4.16 +FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEi@@GLIBCXX_3.4.16 FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4setgEPcS3_S3_@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4setpEPcS3_@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4syncEv@@GLIBCXX_3.4 @@ -1632,6 +1643,8 @@ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEED2Ev@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEaSERKS2_@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4 +FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_gbumpEi@@GLIBCXX_3.4.16 +FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_pbumpEi@@GLIBCXX_3.4.16 FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4setgEPwS3_S3_@@GLIBCXX_3.4 FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4setpEPwS3_@@GLIBCXX_3.4
Re: [PATCH][ARM] NEON DImode not
On 29/02/12 14:48, Andrew Stubbs wrote: Hi all, This patch adds support for the DImode not operation in NEON. Currently the compiler must move the value to core registers, invert it there, and move it back again. This is bonkers because the VMVN instruction will do the job perfectly. The patch adds a pattern to support VMVN in DImode (in addition to the vector modes already supported) and retains the support for doing bitwise not in core registers where appropriate. OK for 4.8? Andrew neon-not64.patch 2012-02-29 Andrew Stubbs a...@codesourcery.com gcc/ * config/arm/arm.md (one_cmpldi2): Rename to one_cmpldi2_internal and replace with a new define_expand. (one_cmpldi2_internal): Exclude splitting for VFP registers. * config/arm/neon.md (one_cmpldi2_neon): New pattern. --- gcc/config/arm/arm.md | 13 ++--- gcc/config/arm/neon.md | 14 ++ 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 751997f..93fde58 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4206,12 +4206,19 @@ TARGET_32BIT TARGET_HARD_FLOAT (TARGET_FPA || TARGET_VFP_DOUBLE) ) -(define_insn_and_split one_cmpldi2 +(define_expand one_cmpldi2 + [(set (match_operand:DI 0 s_register_operand ) + (not:DI (match_operand:DI 1 s_register_operand )))] + TARGET_32BIT + ) + +(define_insn_and_split *one_cmpldi2_internal [(set (match_operand:DI 0 s_register_operand =r,r) (not:DI (match_operand:DI 1 s_register_operand 0,r)))] - TARGET_32BIT + TARGET_32BIT !TARGET_NEON # - TARGET_32BIT reload_completed + TARGET_32BIT reload_completed +arm_general_register_operand (operands[0], DImode) [(set (match_dup 0) (not:SI (match_dup 1))) (set (match_dup 2) (not:SI (match_dup 3)))] diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index d7caa37..f34d266 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -896,6 +896,20 @@ [(set_attr neon_type neon_int_1)] ) +(define_insn *one_cmpldi2_neon + [(set (match_operand:DI 0 s_register_operand =w,?r,?r,?w) +(not:DI (match_operand:DI 1 s_register_operand w, 0, r, w)))] + TARGET_NEON + @ + vmvn\t%P0, %P1 + # + # + vmvn\t%P0, %P1 + [(set_attr neon_type neon_int_1,*,*,neon_int_1) + (set_attr arch nota8,*,*,onlya8) + (set_attr length *,8,8,*)] +) + (define_insn absmode2 [(set (match_operand:VDQW 0 s_register_operand =w) (abs:VDQW (match_operand:VDQW 1 s_register_operand w)))] Why can't we have a single insn that deals with the have-neon and dont-have-neon cases? R.
[RFH / Patch] c++/52432
Hi,
today Jon filed this PR about 'reporting routines re-entered' with
-fdump-tree-gimple and first I tried to figure where we are trying to
produce an error from inside the diagnostic code itself.
Turns out that tsubst_copy_and_build, case CALL_EXPR, calls
unqualified_name_lookup_error unconditionally, that is without checking
that complain includes tf_error. This certainly cannot be Ok vs
dump_template_bindings which just passes tf_none.
Thus I added the check (see attached), and the interesting story begins
here ;) What happens is that c++/52432 is indeed fixed and the testsuite
is mostly Ok, but decltype32.C regresses, in that, instead of the
relatively concise message saying that ‘make_array’ was not declared in
this scope we have a recursion of error messages, all identical, saying
that ‘make_array’ was not declared in this scope, and no declarations
were found by argument-dependent lookup at the point of instantiation.
In other terms, we get to the above mentioned case of
tsubst_copy_and_build a first time and we don't call
unqualified_name_lookup_error because complain is tf_none, thus the
error message currently produced in mainline is not produced, then we
get there again multiple, multiple times producing the permerror right
above it.
Looks like the issue has to do with the mechanism we have in
add_template_candidate_real which checks for actual errors produced via
the errorcount global in order to improve the diagnostics, but I'm not
sure yet about the details of that.
Thus I'm looking for some help about the best way to proceed. First, do
we agree that tsubst_copy_and_build should never call
unqualified_name_lookup_error unconditionally? Any tips about decltype32.C?
I'm still looking into the issue, anyway.
Thanks!
Paolo.
Index: pt.c
===
--- pt.c(revision 184643)
+++ pt.c(working copy)
@@ -13918,7 +13918,8 @@
}
if (TREE_CODE (function) == IDENTIFIER_NODE)
{
- unqualified_name_lookup_error (function);
+ if (complain tf_error)
+ unqualified_name_lookup_error (function);
release_tree_vector (call_args);
return error_mark_node;
}
Two files still GPLv2
Hello, This fixes two files that still have the GPLv2 copyright notice. OK for trunk? Ciao! Steven * config/mn10300/mn10300-modes.def: Fix copyright notice. * config/v850/v850-modes.def: Fix copyright notice. Index: config/mn10300/mn10300-modes.def === *** config/mn10300/mn10300-modes.def(revision 184666) --- config/mn10300/mn10300-modes.def(working copy) *** *** 6,12 GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published !by the Free Software Foundation; either version 2, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT --- 6,12 GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published !by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT *** *** 15,23 License for more details. You should have received a copy of the GNU General Public License !along with GCC; see the file COPYING. If not, write to !the Free Software Foundation, , Inc., 51 Franklin Street - Fifth !Floor, Boston, MA 02110-1301, USA. */ CC_MODE (CCZN); CC_MODE (CCZNC); --- 15,22 License for more details. You should have received a copy of the GNU General Public License !along with GCC; see the file COPYING3. If not see !http://www.gnu.org/licenses/. */ CC_MODE (CCZN); CC_MODE (CCZNC); Index: config/v850/v850-modes.def === *** config/v850/v850-modes.def (revision 184666) --- config/v850/v850-modes.def (working copy) *** *** 1,24 /* Definitions of target machine for GNU compiler. NEC V850 series ! Copyright (C) 2005 !Free Software Foundation, Inc. Contributed by NEC EL This file is part of GCC. !GCC is free software; you can redistribute it and/or modify !it under the terms of the GNU General Public License as published by !the Free Software Foundation; either version 2, or (at your option) !any later version. ! !GCC is distributed in the hope that it will be useful, !but WITHOUT ANY WARRANTY; without even the implied warranty of !MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! GNU General Public License for more details. You should have received a copy of the GNU General Public License !along with GCC; see the file COPYING. If not, write to ! the Free Software Foundation, 59 Temple Place - Suite 330, !Boston, MA 02111-1307, USA. */ CC_MODE (CC_FPU_LT); CC_MODE (CC_FPU_LE); --- 1,22 /* Definitions of target machine for GNU compiler. NEC V850 series !Copyright (C) 2005 Free Software Foundation, Inc. Contributed by NEC EL This file is part of GCC. !GCC is free software; you can redistribute it and/or modify it !under the terms of the GNU General Public License as published !by the Free Software Foundation; either version 3, or (at your !option) any later version. ! !GCC is distributed in the hope that it will be useful, but WITHOUT !ANY WARRANTY; without even the implied warranty of MERCHANTABILITY !or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public !License for more details. You should have received a copy of the GNU General Public License !along with GCC; see the file COPYING3. If not see !http://www.gnu.org/licenses/. */ CC_MODE (CC_FPU_LT); CC_MODE (CC_FPU_LE);
libgo patch committed: Fill out syscall package for GNU/Linux
This patch to libgo fills out the syscall package for GNU/Linux to match
all the functions in the syscall package in the master Go library.
There is a test case for this patch at
http://code.google.com/p/go/issues/detail?id=3071 . Bootstrapped and
ran Go testsuite on x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r 79998be2e6dd libgo/Makefile.am
--- a/libgo/Makefile.am Tue Feb 28 12:55:43 2012 -0800
+++ b/libgo/Makefile.am Wed Feb 29 11:53:30 2012 -0800
@@ -1489,6 +1489,13 @@
syscall_netlink_file =
endif
+# GNU/Linux specific socket filters.
+if LIBGO_IS_LINUX
+syscall_lsf_file = go/syscall/lsf_linux.go
+else
+syscall_lsf_file =
+endif
+
go_base_syscall_files = \
go/syscall/env_unix.go \
go/syscall/syscall_errno.go \
@@ -1509,6 +1516,7 @@
$(syscall_socket_file) \
$(syscall_uname_file) \
$(syscall_netlink_file) \
+ $(syscall_lsf_file) \
$(GO_LIBCALL_OS_FILE) \
$(GO_LIBCALL_OS_ARCH_FILE) \
$(GO_SYSCALL_OS_FILE) \
diff -r 79998be2e6dd libgo/configure.ac
--- a/libgo/configure.ac Tue Feb 28 12:55:43 2012 -0800
+++ b/libgo/configure.ac Wed Feb 29 11:53:30 2012 -0800
@@ -453,7 +453,7 @@
;;
esac
-AC_CHECK_HEADERS(sys/mman.h syscall.h sys/epoll.h sys/ptrace.h sys/syscall.h sys/user.h sys/utsname.h sys/select.h sys/socket.h net/if.h sys/prctl.h sys/mount.h sys/vfs.h sys/statfs.h)
+AC_CHECK_HEADERS(sys/mman.h syscall.h sys/epoll.h sys/ptrace.h sys/syscall.h sys/user.h sys/utsname.h sys/select.h sys/socket.h net/if.h sys/prctl.h sys/mount.h sys/vfs.h sys/statfs.h sys/timex.h sys/sysinfo.h ustat.h utime.h linux/reboot.h)
AC_CHECK_HEADERS([linux/filter.h linux/netlink.h linux/rtnetlink.h], [], [],
[#ifdef HAVE_SYS_SOCKET_H
@@ -467,7 +467,7 @@
AM_CONDITIONAL(HAVE_STRERROR_R, test $ac_cv_func_strerror_r = yes)
AM_CONDITIONAL(HAVE_WAIT4, test $ac_cv_func_wait4 = yes)
-AC_CHECK_FUNCS(epoll_create1 faccessat fallocate fchmodat fchownat futimesat inotify_add_watch inotify_init inotify_rm_watch mkdirat mknodat openat renameat splice tee unlinkat unshare)
+AC_CHECK_FUNCS(epoll_create1 faccessat fallocate fchmodat fchownat futimesat inotify_add_watch inotify_init inotify_init1 inotify_rm_watch mkdirat mknodat openat renameat sync_file_range splice tee unlinkat unshare)
AC_TYPE_OFF_T
AC_CHECK_TYPES([loff_t])
diff -r 79998be2e6dd libgo/go/syscall/libcall_linux.go
--- a/libgo/go/syscall/libcall_linux.go Tue Feb 28 12:55:43 2012 -0800
+++ b/libgo/go/syscall/libcall_linux.go Wed Feb 29 11:53:30 2012 -0800
@@ -160,20 +160,17 @@
func PtraceDetach(pid int) (err error) { return ptrace(PTRACE_DETACH, pid, 0, 0) }
-// FIXME: mksysinfo needs to produce LINUX_REBOOT_MAGIC[12].
-
-// //sys reboot(magic1 uint, magic2 uint, cmd int, arg string) (err error)
-// //reboot(magic1 uint, magic2 uint, cmd int, arg *byte) int
-// func Reboot(cmd int) (err error) {
-// return reboot(LINUX_REBOOT_MAGIC1, LINUX_REBOOT_MAGIC2, cmd, )
-// }
+//sys reboot(magic1 uint, magic2 uint, cmd int, arg string) (err error)
+//reboot(magic1 uint, magic2 uint, cmd int, arg *byte) int
+func Reboot(cmd int) (err error) {
+ return reboot(LINUX_REBOOT_MAGIC1, LINUX_REBOOT_MAGIC2, cmd, )
+}
//sys Acct(path string) (err error)
//acct(path *byte) int
-// FIXME: mksysinfo Timex
-// //sys Adjtimex(buf *Timex) (state int, err error)
-// //adjtimex(buf *Timex) int
+//sys Adjtimex(buf *Timex) (state int, err error)
+//adjtimex(buf *Timex) int
//sys Faccessat(dirfd int, path string, mode uint32, flags int) (err error)
//faccessat(dirfd int, pathname *byte, mode int, flags int) int
@@ -198,10 +195,56 @@
return int(r1)
}
-// FIXME: mksysinfo linux_dirent
-//Or just abandon this function.
-// //sys Getdents(fd int, buf []byte) (n int, err error)
-// //getdents64(fd int, buf *byte, count uint)
+func Getdents(fd int, buf []byte) (n int, err error) {
+ var p *byte
+ if len(buf) 0 {
+ p = buf[0]
+ } else {
+ p = (*byte)(unsafe.Pointer(_zero))
+ }
+ entersyscall()
+ r1, _, errno := Syscall(SYS_GETDENTS64, uintptr(fd), uintptr(unsafe.Pointer(p)), uintptr(len(buf)))
+ n = int(r1)
+ if n 0 {
+ err = errno
+ }
+ exitsyscall()
+ return
+}
+
+func clen(n []byte) int {
+ for i := 0; i len(n); i++ {
+ if n[i] == 0 {
+ return i
+ }
+ }
+ return len(n)
+}
+
+func ReadDirent(fd int, buf []byte) (n int, err error) {
+ return Getdents(fd, buf)
+}
+
+func ParseDirent(buf []byte, max int, names []string) (consumed int, count int, newnames []string) {
+ origlen := len(buf)
+ count = 0
+ for max != 0 len(buf) 0 {
+ dirent := (*Dirent)(unsafe.Pointer(buf[0]))
+ buf = buf[dirent.Reclen:]
+ if dirent.Ino == 0 { // File absent in directory.
+ continue
+ }
+ bytes := (*[1]byte)(unsafe.Pointer(dirent.Name[0]))
+ var name = string(bytes[0:clen(bytes[:])])
+ if name == . || name == .. { // Useless names
+ continue
+ }
+ max--
+ count++
+ names = append(names, name)
+ }
+ return origlen - len(buf), count, names
+}
//sys InotifyAddWatch(fd int, pathname string, mask uint32) (watchdesc int, err error)
[SPARC] Tweak libgomp's cpu_relax
As discussed with DaveM, this duplicates libitm's cpu_relax into libgomp.
Tested on SPARC64/Linux, applied on the mainline.
2012-02-29 Eric Botcazou ebotca...@adacore.com
* config/linux/sparc/futex.h (cpu_relax): Read from CC register.
--
Eric Botcazou
Index: config/linux/sparc/futex.h
===
--- config/linux/sparc/futex.h (revision 184585)
+++ config/linux/sparc/futex.h (working copy)
@@ -90,9 +90,5 @@ futex_wake (int *addr, int count)
static inline void
cpu_relax (void)
{
-#if defined __arch64__ || defined __sparc_v9__
- __asm volatile (membar #LoadLoad : : : memory);
-#else
- __asm volatile ( : : : memory);
-#endif
+ __asm volatile (rd %%ccr, %%g0 : : : memory);
}
Go patch committed: Fix handling of invalid types within invalid types
The Go compiler could crash when an invalid type occurred within an
invalid type, because the type verification pass was not recurring into
such types. This patch fixes the problem and actually removes more
lines than it adds. Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r 5bf5cc73ac14 go/types.cc
--- a/go/types.cc Wed Feb 29 11:58:27 2012 -0800
+++ b/go/types.cc Wed Feb 29 14:40:08 2012 -0800
@@ -4116,7 +4116,6 @@
Struct_field_list* fields = this-fields_;
if (fields == NULL)
return true;
- bool ret = true;
for (Struct_field_list::iterator p = fields-begin();
p != fields-end();
++p)
@@ -4126,7 +4125,6 @@
{
error_at(p-location(), struct field type is incomplete);
p-set_type(Type::make_error_type());
- ret = false;
}
else if (p-is_anonymous())
{
@@ -4134,19 +4132,17 @@
{
error_at(p-location(), embedded type may not be a pointer);
p-set_type(Type::make_error_type());
- return false;
}
- if (t-points_to() != NULL
- t-points_to()-interface_type() != NULL)
+ else if (t-points_to() != NULL
+ t-points_to()-interface_type() != NULL)
{
error_at(p-location(),
embedded type may not be pointer to interface);
p-set_type(Type::make_error_type());
- return false;
}
}
}
- return ret;
+ return true;
}
// Whether this contains a pointer.
@@ -5206,10 +5202,7 @@
Array_type::do_verify()
{
if (!this-verify_length())
-{
- this-length_ = Expression::make_error(this-length_-location());
- return false;
-}
+this-length_ = Expression::make_error(this-length_-location());
return true;
}
@@ -5899,10 +5892,7 @@
{
// The runtime support uses map[void]void.
if (!this-key_type_-is_comparable() !this-key_type_-is_void_type())
-{
- error_at(this-location_, invalid map key type);
- return false;
-}
+error_at(this-location_, invalid map key type);
return true;
}
@@ -7885,7 +7875,6 @@
if (this-local_methods_ != NULL)
{
Struct_type* st = this-type_-struct_type();
- bool found_dup = false;
if (st != NULL)
{
for (Bindings::const_declarations_iterator p =
@@ -7899,12 +7888,9 @@
error_at(p-second-location(),
method %qs redeclares struct field name,
Gogo::message_name(name).c_str());
- found_dup = true;
}
}
}
- if (found_dup)
- return false;
}
return true;
diff -r 5bf5cc73ac14 go/types.h
--- a/go/types.h Wed Feb 29 11:58:27 2012 -0800
+++ b/go/types.h Wed Feb 29 14:40:08 2012 -0800
@@ -510,7 +510,8 @@
// Verify the type. This is called after parsing, and verifies that
// types are complete and meet the language requirements. This
- // returns false if the type is invalid.
+ // returns false if the type is invalid and we should not continue
+ // traversing it.
bool
verify()
{ return this-do_verify(); }
Go patch committed: Avoid various compiler crashes
This patch to the Go frontend avoids various crashes on erroneous
input. Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu.
Committed to mainline.
Ian
diff -r 3d9a01a3a527 go/expressions.cc
--- a/go/expressions.cc Wed Feb 29 14:41:03 2012 -0800
+++ b/go/expressions.cc Wed Feb 29 15:31:47 2012 -0800
@@ -3942,10 +3942,6 @@
go_assert(et-map_type() != NULL);
else if (t-channel_type() != NULL)
go_assert(et-channel_type() != NULL);
- else if (t-points_to() != NULL t-points_to()-channel_type() != NULL)
-go_assert((et-points_to() != NULL
- et-points_to()-channel_type() != NULL)
- || et-is_nil_type());
else if (t-points_to() != NULL)
go_assert(et-points_to() != NULL || et-is_nil_type());
else if (et-is_unsafe_pointer_type())
@@ -8502,6 +8498,7 @@
case BUILTIN_INVALID:
case BUILTIN_NEW:
case BUILTIN_MAKE:
+case BUILTIN_DELETE:
return;
case BUILTIN_LEN:
@@ -8670,13 +8667,17 @@
this-report_error(_(too many arguments));
break;
}
+ if (args-front()-type()-is_error()
+ || args-back()-type()-is_error())
+ break;
+
+ Array_type* at = args-front()-type()-array_type();
+ Type* e = at-element_type();
// The language permits appending a string to a []byte, as a
// special case.
if (args-back()-type()-is_string_type())
{
- const Array_type* at = args-front()-type()-array_type();
- const Type* e = at-element_type()-forwarded();
if (e-integer_type() != NULL e-integer_type()-is_byte())
break;
}
@@ -8685,8 +8686,7 @@
// assignable to a slice of the element type of the first
// argument. We already know the first argument is a slice
// type.
- Array_type* at = args-front()-type()-array_type();
- Type* arg2_type = Type::make_array_type(at-element_type(), NULL);
+ Type* arg2_type = Type::make_array_type(e, NULL);
std::string reason;
if (!Type::are_assignable(arg2_type, args-back()-type(), reason))
{
@@ -8982,7 +8982,10 @@
fnname = __go_print_slice;
}
else
- go_unreachable();
+ {
+ go_assert(saw_errors());
+ return error_mark_node;
+ }
tree call = Gogo::call_builtin(pfndecl,
location,
@@ -9665,8 +9668,11 @@
Temporary_statement*
Call_expression::result(size_t i) const
{
- go_assert(this-results_ != NULL
- this-results_-size() i);
+ if (this-results_ == NULL || this-results_-size() = i)
+{
+ go_assert(saw_errors());
+ return NULL;
+}
return (*this-results_)[i];
}
@@ -10153,6 +10159,11 @@
go_assert(field != NULL_TREE);
Temporary_statement* temp = this-result(i);
+ if (temp == NULL)
+ {
+ go_assert(saw_errors());
+ return error_mark_node;
+ }
Temporary_reference_expression* ref =
Expression::make_temporary_reference(temp, loc);
ref-set_is_lvalue();
@@ -10332,8 +10343,17 @@
Call_result_expression::do_get_tree(Translate_context* context)
{
Call_expression* ce = this-call_-call_expression();
- go_assert(ce != NULL);
+ if (ce == NULL)
+{
+ go_assert(this-call_-is_error_expression());
+ return error_mark_node;
+}
Temporary_statement* ts = ce-result(this-index_);
+ if (ts == NULL)
+{
+ go_assert(saw_errors());
+ return error_mark_node;
+}
Expression* ref = Expression::make_temporary_reference(ts, this-location());
return ref-get_tree(context);
}
diff -r 3d9a01a3a527 go/statements.cc
--- a/go/statements.cc Wed Feb 29 14:41:03 2012 -0800
+++ b/go/statements.cc Wed Feb 29 15:31:47 2012 -0800
@@ -1013,7 +1013,7 @@
b-add_statement(s);
++ptemp;
}
- go_assert(ptemp == temps.end());
+ go_assert(ptemp == temps.end() || saw_errors());
return Statement::make_block_statement(b, loc);
}
@@ -3452,7 +3452,7 @@
{
// Value was already present.
error_at(this-location_, duplicate case in switch);
- continue;
+ e = Expression::make_error(this-location_);
}
tree case_tree = e-get_tree(context);
[committed] Fix up vec_setmode_0 pattern (PR target/52437)
Hi!
general_operand matches even CONST_INT, but none of the constraints would
allow it and we ICEd trying to reload it into a FLOAT_REGS register.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
approved by Uros in the PR, committed to trunk.
2012-02-29 Jakub Jelinek ja...@redhat.com
Uros Bizjak ubiz...@gmail.com
PR target/52437
* config/i386/sse.md (vec_setmode_0): Swap *r and fF
alternatives, add e constraint to the new last alternative
and ! to last 3 alternatives.
* gcc.c-torture/compile/pr52437.c: New test.
--- gcc/config/i386/sse.md.jj 2012-01-02 20:39:59.0 +0100
+++ gcc/config/i386/sse.md 2012-02-29 22:07:37.246132827 +0100
@@ -3895,13 +3895,13 @@ (define_expand vec_initmode
;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn vec_setmode_0
[(set (match_operand:VI4F_128 0 nonimmediate_operand
- =x,x,x ,x,x,x,x ,x ,m,m ,m)
+ =x,x,x ,x,x,x,x ,x ,m ,m ,m)
(vec_merge:VI4F_128
(vec_duplicate:VI4F_128
(match_operand:ssescalarmode 2 general_operand
- x,m,*r,m,x,x,*rm,*rm,x,fF,*r))
+ x,m,*r,m,x,x,*rm,*rm,!x,!*re,!*fF))
(match_operand:VI4F_128 1 vector_move_operand
- C,C,C ,C,0,x,0 ,x ,0,0 ,0)
+ C,C,C ,C,0,x,0 ,x ,0 ,0 ,0)
(const_int 1)))]
TARGET_SSE
@
@@ -3921,9 +3921,9 @@ (define_insn vec_setmode_0
(cond [(eq_attr alternative 0,6,7)
(const_string sselog)
(eq_attr alternative 9)
- (const_string fmov)
- (eq_attr alternative 10)
(const_string imov)
+ (eq_attr alternative 10)
+ (const_string fmov)
]
(const_string ssemov)))
(set_attr prefix_extra *,*,*,*,*,*,1,1,*,*,*)
--- gcc/testsuite/gcc.c-torture/compile/pr52437.c.jj2012-02-29
22:09:39.231468064 +0100
+++ gcc/testsuite/gcc.c-torture/compile/pr52437.c 2012-02-29
22:12:54.0 +0100
@@ -0,0 +1,18 @@
+/* PR target/52437 */
+
+int f, g, i, j;
+
+void
+fn1 ()
+{
+ for (;;)
+{
+ fn2 ();
+ j = 1;
+ for (i = 0; i = 3; i++)
+ {
+ for (g = 1; g = 0; g--)
+ f = 0, j = 11;
+ }
+}
+}
Jakub
Go patch committed: Fix unary ^ on signed typed constant
The Go frontend mishandled unary ^ applied to a signed typed integer
constant. In fact it mishandled it so badly that it crashed. This
patch fixes the problem. Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r b66ddc182445 go/expressions.cc
--- a/go/expressions.cc Wed Feb 29 15:41:26 2012 -0800
+++ b/go/expressions.cc Wed Feb 29 16:43:14 2012 -0800
@@ -4300,14 +4300,23 @@
unsigned HOST_WIDE_INT* phwi = new unsigned HOST_WIDE_INT[count];
memset(phwi, 0, count * sizeof(HOST_WIDE_INT));
+ size_t obits = utype-integer_type()-bits();
+
+ if (!utype-integer_type()-is_unsigned()
+ mpz_sgn(uval) 0)
+ {
+ mpz_t adj;
+ mpz_init_set_ui(adj, 1);
+ mpz_mul_2exp(adj, adj, obits);
+ mpz_add(uval, uval, adj);
+ mpz_clear(adj);
+ }
+
size_t ecount;
mpz_export(phwi, ecount, -1, sizeof(HOST_WIDE_INT), 0, 0, uval);
go_assert(ecount = count);
// Trim down to the number of words required by the type.
- size_t obits = utype-integer_type()-bits();
- if (!utype-integer_type()-is_unsigned())
- ++obits;
size_t ocount = ((obits + HOST_BITS_PER_WIDE_INT - 1)
/ HOST_BITS_PER_WIDE_INT);
go_assert(ocount = count);
@@ -4322,6 +4331,16 @@
mpz_import(val, ocount, -1, sizeof(HOST_WIDE_INT), 0, 0, phwi);
+ if (!utype-integer_type()-is_unsigned()
+ mpz_tstbit(val, obits - 1))
+ {
+ mpz_t adj;
+ mpz_init_set_ui(adj, 1);
+ mpz_mul_2exp(adj, adj, obits);
+ mpz_sub(val, val, adj);
+ mpz_clear(adj);
+ }
+
delete[] phwi;
}
return Integer_expression::check_constant(val, utype, location);
Re: [PATCH,ARM] Improve peepholes for LDM with commutative operators
On Thu, Mar 1, 2012 at 3:20 AM, Greta Yorsh greta.yo...@arm.com wrote: I'm attaching a new version of the patch. Fixed all comments and retested. No regression on qemu --with-cpu cortex-a9. I assume that on the Cortex-A9 this generates a LDM instead of an expensive LDRD. For reference, a tight load loop takes 2.5 s on the current version, 3.1 s with a LDRD, and 1.9 s with a LDM. -- Michael
Re: [4.8, C++ Patch] PR 52422
On 02/29/2012 06:53 AM, Paolo Carlini wrote: Daniel noticed a couple other SFINAE issues, which I'm fixing in the usual straightforward way. Tested x86_64-linux. When fixing these things, please add checking for error_mark_node return as well. For instance, in this patch the calls to decay_conversion from build_conditional_expr_1 could return error_mark_node, in which case we want to return out of build_conditional_expr_1 as well. Similarly with the call in convert_like_real, and so on. PS: while working on the patch, I noticed that a few functions, which in the meanwhile acquired a tsubst_flags_t parameter, aren't fully propagating it, are still passing tf_warning_or_error. Apparently a clean-up is in order. Please. :) Jason
Re: [RFH / Patch] c++/52432
On 02/29/2012 01:11 PM, Paolo Carlini wrote: Thus I'm looking for some help about the best way to proceed. First, do we agree that tsubst_copy_and_build should never call unqualified_name_lookup_error unconditionally? Yes. Any tips about decltype32.C? The substitution failure should have removed the candidate from further consideration; sounds like something isn't propagating the failure back up (as I was talking about in my response to your 51214 patch). Jason
Re: [RFH / Patch] c++/52432
On 02/29/2012 08:47 PM, Jason Merrill wrote: The substitution failure should have removed the candidate from further consideration; sounds like something isn't propagating the failure back up (as I was talking about in my response to your 51214 patch). No, wait, now we're talking about the error messages explaining the substitution failure, right. I can't think of a reason for that to show up more than once. Jason
[PATCH] [SH] Fix target/48596
Hi,
The attached patch is to avoid PR target/48596 which is a 4.7
regression on SH. It seems that now IRA aggressively tried to
use fp regs as the holder for memory addresses on this port.
SH requires a special fpul register to move from the fp regs to
the general regs which are legitimate for pointers and, in
the problematic situation, fpul is already reserved for reload
and the spill failure resulted for the reg equiv processing in RA.
I guess that no other targets have such restrictions. Perhaps
if there eas a direct way to notify IRA that some register classes
will be too costly for the addresses, SH port will utilize it,
though it looks to be invasive.
The patch tries to work around the problem with increasing the move
cost between fp and general registers for SImode. The usual tests
are done successfully on sh4-unknown-linux-gnu with no new failures.
A bit surprisingly, there are no size/performance regressions and
a few code size improvements with CSiBE tests I've done.
I'd like to hear the suggestions from the experts before applying
this work around.
Regards,
kaz
--
PR target/48596
* config/sh/sh.c (sh_register_move_cost): Increase cost between
GENERAL_REGS and FP_REGS for SImode.
--- ORIG/trunk/gcc/config/sh/sh.c 2012-02-23 21:24:18.0 +0900
+++ trunk/gcc/config/sh/sh.c2012-03-01 09:41:00.0 +0900
@@ -11497,8 +11498,15 @@ sh_register_move_cost (enum machine_mode
REGCLASS_HAS_GENERAL_REG (srcclass))
|| (REGCLASS_HAS_GENERAL_REG (dstclass)
REGCLASS_HAS_FP_REG (srcclass)))
-return (((TARGET_SHMEDIA ? 4 : TARGET_FMOVD ? 8 : 12) + 64)
- * ((GET_MODE_SIZE (mode) + 7) / 8U));
+{
+ /* Discourage trying to use fp regs for a pointer. This also
+discourages fp regs with SImode because Pmode is an alias
+of SImode on this target. See PR target/48596. */
+ int addend = (mode == Pmode) ? 40 : 0;
+
+ return (((TARGET_SHMEDIA ? 4 : TARGET_FMOVD ? 8 : 12) + addend)
+ * ((GET_MODE_SIZE (mode) + 7) / 8U));
+}
if ((dstclass == FPUL_REGS
REGCLASS_HAS_GENERAL_REG (srcclass))
Go patch committed: Avoid more crashes on invalid input
This patch to the Go frontend avoids some more crashes on invalid
input. Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu.
Committed to mainline.
Ian
2012-02-29 Ian Lance Taylor i...@google.com
* go-gcc.cc (class Gcc_tree): Add set_tree method.
(set_placeholder_pointer_type): When setting to a pointer to
error, set to error_mark_node.
Index: gcc/go/go-gcc.cc
===
--- gcc/go/go-gcc.cc (revision 184521)
+++ gcc/go/go-gcc.cc (working copy)
@@ -56,6 +56,10 @@ class Gcc_tree
get_tree() const
{ return this-t_; }
+ void
+ set_tree(tree t)
+ { this-t_ = t; }
+
private:
tree t_;
};
@@ -626,7 +630,7 @@ Gcc_backend::set_placeholder_pointer_typ
tree tt = to_type-get_tree();
if (tt == error_mark_node)
{
- TREE_TYPE(pt) = tt;
+ placeholder-set_tree(error_mark_node);
return false;
}
gcc_assert(TREE_CODE(tt) == POINTER_TYPE);
Index: gcc/go/gofrontend/parse.cc
===
--- gcc/go/gofrontend/parse.cc (revision 184521)
+++ gcc/go/gofrontend/parse.cc (working copy)
@@ -3948,8 +3948,9 @@ Parse::return_stat()
++p)
{
Named_object* no = this-gogo_-lookup((*p)-name(), NULL);
- go_assert(no != NULL);
- if (!no-is_result_variable())
+ if (no == NULL)
+ go_assert(saw_errors());
+ else if (!no-is_result_variable())
error_at(location, %qs is shadowed during return,
(*p)-message_name().c_str());
}
Index: gcc/go/gofrontend/expressions.cc
===
--- gcc/go/gofrontend/expressions.cc (revision 184681)
+++ gcc/go/gofrontend/expressions.cc (working copy)
@@ -13878,7 +13878,7 @@ tree
Heap_composite_expression::do_get_tree(Translate_context* context)
{
tree expr_tree = this-expr_-get_tree(context);
- if (expr_tree == error_mark_node)
+ if (expr_tree == error_mark_node || TREE_TYPE(expr_tree) == error_mark_node)
return error_mark_node;
tree expr_size = TYPE_SIZE_UNIT(TREE_TYPE(expr_tree));
go_assert(TREE_CODE(expr_size) == INTEGER_CST);
[PATCH, PR50335] Disable graphite loop flattening
This patch disables graphite loop flattening optimization due to it being effectively unmaintained. To avoid users trying to use unsupported optimization and reporting bugs, Sebastian Pop suggested to disable the optimization. Testing on x86_64 is underway. OK to apply provided no regressions? -- Maxim Kuvyrkov CodeSourcery / Mentor Graphics fsf-gcc-pr50335.ChangeLog Description: Binary data fsf-gcc-pr50335.patch Description: Binary data
[Patch 1] invoke.texi : Document AMD bdver2
Hi Maintainers, We want to add bdver2 description in invoke.texi for GCC 4.7. Here is the patch that does that. Index: gcc/doc/invoke.texi === --- gcc/doc/invoke.texi (revision 183891) +++ gcc/doc/invoke.texi (working copy) @@ -13063,8 +13063,12 @@ @item bdver1 AMD Family 15h core based CPUs with x86-64 instruction set support. (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, -SSSE3, SSE4.1, SSE4.2, 3DNow!, enhanced 3DNow!, ABM and 64-bit -instruction set extensions.) +SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.) +@item bdver2 +AMD Family 15h core based CPUs with x86-64 instruction set support. (This +supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, +SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set +extensions.) @item btver1 AMD Family 14h core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit Index: gcc/ChangeLog === --- gcc/ChangeLog (revision 183891) +++ gcc/ChangeLog (working copy) @@ -1,3 +1,6 @@ +2012-03-01 Venkataramanan Kumar venkataramanan.ku...@amd.com + * doc/invoke.texi: Document AMD bdver2 and remove mentioning 3DNow from bdver1. + 2012-02-03 Jakub Jelinek ja...@redhat.com Zdenek Dvorak o...@ucw.cz Ok for trunk ? Can I commit in trunk so that it gets picked up for GCC 4.7? Regards, Venkat.
[Patch 2 wwwdocs] gcc-4.7/changes.html : Document AMD bdver2
Hi Maintainers, This patch adds bdver2 description in changes.html. Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v retrieving revision 1.90 diff -r1.90 changes.html 676a677,679 liSupport for AMD Bulldozer (family 15) processors is now available through the code-march=bdver2/code and code-mtune=bdver2/code options./li Ok for trunk? Regards, Venkat.
Go patch committed: Fix indirection through circular type
This patch to the Go frontend fixes the handling of pointer indirection
through a circular type. The gcc middle-end can not represent a
circular type, as such a construct can not exist in C (in Go you get one
by writing type T *T). We handle this by using void* and introducing
a type cast on the indirection. With the use of the Gcc_backend
interface, we now use a general void* rather than specifically
ptr_type_node which is what we used before. This patch updates the
handling of pointer indirection to check for this case. Bootstrapped
and ran Go testsuite on x86_64-unknown-linux-gnu. Committed to
mainline.
Ian
diff -r 520f034862ee go/expressions.cc
--- a/go/expressions.cc Wed Feb 29 21:08:49 2012 -0800
+++ b/go/expressions.cc Wed Feb 29 21:56:03 2012 -0800
@@ -4705,29 +4705,33 @@
// need to check for nil. We don't bother to check for small
// structs because we expect the system to crash on a nil
// pointer dereference.
- HOST_WIDE_INT s = int_size_in_bytes(TREE_TYPE(TREE_TYPE(expr)));
- if (s == -1 || s = 4096)
+ tree target_type_tree = TREE_TYPE(TREE_TYPE(expr));
+ if (!VOID_TYPE_P(target_type_tree))
{
- if (!DECL_P(expr))
- expr = save_expr(expr);
- tree compare = fold_build2_loc(loc.gcc_location(), EQ_EXPR,
- boolean_type_node,
- expr,
- fold_convert(TREE_TYPE(expr),
- null_pointer_node));
- tree crash = Gogo::runtime_error(RUNTIME_ERROR_NIL_DEREFERENCE,
- loc);
- expr = fold_build2_loc(loc.gcc_location(), COMPOUND_EXPR,
- TREE_TYPE(expr), build3(COND_EXPR,
- void_type_node,
- compare, crash,
- NULL_TREE),
- expr);
+ HOST_WIDE_INT s = int_size_in_bytes(target_type_tree);
+ if (s == -1 || s = 4096)
+ {
+ if (!DECL_P(expr))
+ expr = save_expr(expr);
+ tree compare = fold_build2_loc(loc.gcc_location(), EQ_EXPR,
+ boolean_type_node,
+ expr,
+ fold_convert(TREE_TYPE(expr),
+ null_pointer_node));
+ tree crash = Gogo::runtime_error(RUNTIME_ERROR_NIL_DEREFERENCE,
+ loc);
+ expr = fold_build2_loc(loc.gcc_location(), COMPOUND_EXPR,
+ TREE_TYPE(expr), build3(COND_EXPR,
+ void_type_node,
+ compare, crash,
+ NULL_TREE),
+ expr);
+ }
}
// If the type of EXPR is a recursive pointer type, then we
// need to insert a cast before indirecting.
- if (TREE_TYPE(TREE_TYPE(expr)) == ptr_type_node)
+ if (VOID_TYPE_P(target_type_tree))
{
Type* pt = this-expr_-type()-points_to();
tree ind = type_to_tree(pt-get_backend(context-gogo()));
[Patch wwwdocs] gcc-4.6/changes.html : Document AMD bdver1
Hi maintainers, This patch was approved in November 2011, but got missed out for commit so reposting it. Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.6/changes.html,v retrieving revision 1.137 diff -r1.137 changes.html 819a820,822 liSupport for AMD Bulldozer (family 15) processors is now available through the code-march=bdver1/code and code-mtune=bdver1/code options./li Is this Ok from trunk? Regards, Venkat.
