On Mon, Aug 13, 2012 at 09:20:32PM -0700, Gary Funck wrote:
--- gcc/testsuite/gcc.dg/pr20020-1.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr20020-1.c (revision 0)
@@ -0,0 +1,25 @@
+/* Target is restricted to x86_64 type architectures,
+ to check that 128-bit struct's are represented
+ as
Hi,
Basic block reordering is disabled for -Os from gcc 4.7 since the pass will
lead to big code size regression. But benchmarks logs also show there are
lots of regression due to poor code layout compared with 4.6.
The patch is to enable bbro for -Os. When optimizing for size, it
* avoid
Dear Paul,
Dear all,
I tried to compile the check_compiler_for_memory_leaks.F90 file
provided by Damian and it produces a segfault error. May be the
problem is related with add_comp_ref.
Regards
Alessandro (from Malta)
2012/8/14 Paul Richard Thomas paul.richard.tho...@gmail.com
Dear Mikael,
Maxim Kuvyrkov ma...@codesourcery.com writes:
I thought I'll butt in since I did a very similar thing for
sync_memmodel a couple of months ago.
Thanks.
+ /* We take care in instruction definitions to make sure accum_in operand is
+ a register_operand or [a more restrictive]
Dehao Chen de...@google.com writes:
Index: libcpp/line-map.c
[...]
+ /* Data structure to associate an arbitrary data to a source location. */
+ struct location_adhoc_data {
+ source_location locus;
+ void *data;
+ };
+
+ /* The following data structure encodes a location with some
On Mon, 13 Aug 2012, Lawrence Crowl wrote:
On 8/13/12, Richard Guenther richard.guent...@gmail.com wrote:
Increment/decrement operations did not exist, please do not add
them at this point.
Note that I have also added +=, -= and *= operations. Having them
has three advantages. First,
On Mon, Aug 13, 2012 at 9:39 PM, Igor Zamyatin izamya...@gmail.com wrote:
Hi all!
Patch aims to fix instability introduced by first scheduler on x86. In
particular it targets following list:
[1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46843
[2]
On Mon, Aug 13, 2012 at 9:39 PM, Igor Zamyatin izamya...@gmail.com wrote:
Patch aims to fix instability introduced by first scheduler on x86. In
particular it targets following list:
[1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46843
[2] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46829
Hello Diego,
Just some minor comments.
Diego Novillo dnovi...@google.com a écrit:
[...]
+@section User-provided marking routines for template types
+When a template type @code{TP} is marked with @code{GTY}, all
+instances of that type are considered user-provided types. This means
+that
On 14/08/2012 07:03, Paul Richard Thomas wrote:
However, if we do it before, we also overwrite components to be assigned
with a typebound call, and this can have some side effects as the LHS's
argument can be INTENT(INOUT).
This might be so but it is what the standard dictates should
On Tue, Aug 14, 2012 at 10:36 AM, Uros Bizjak ubiz...@gmail.com wrote:
Patch aims to fix instability introduced by first scheduler on x86. In
particular it targets following list:
[1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46843
[2] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46829
[3]
On Tue, Aug 14, 2012 at 10:45:18AM +0200, Uros Bizjak wrote:
The 46829 failure is due to combine pass blindly propagating r8 into
divmod instruction. This is invalid for divmod, which expects ax
there.
This can be fixed by introducing ax_register_operand predicate, but
I think that
On 14/08/2012 07:03, Paul Richard Thomas wrote:
... but I have the feeling that this makes (*code) unreachable and that
that's wrong. Shouldn't it be root-next = *code; ?
No. That caused the regression that I mentioned. (*code) is
resolved, at entry. resolve_code steps on to (*code)-next.
OK for google/gcc-4_7.
thanks
Carrot
On Tue, Aug 14, 2012 at 7:14 AM, Han Shen(沈涵) shen...@google.com wrote:
Hi Carrot, could you take a look at this patch? Thanks!
The modification is in upstream trunk patch revision - 186859.
The same patch has been back ported to google/gcc-4_6
This adds verification code that we do not try to rewrite a symbol
into SSA form that is already partly in SSA form. That would lead
to silent wrong-code generation.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2012-08-14 Richard Guenther rguent...@suse.de
This patch adds a -Wconversion warning (enabled also by -Wall) for
CMPLX(real, real)
if the real arguments have a higher kind number/precision as the
default-kind of complex/real. I think most of the time, this precision
loss is unintended; it can be silenced when using a kind= parameter (or
On 08/09/2012 02:13 PM, Mikael Morin wrote:
On 08/08/2012 19:12, Tobias Burnus wrote:
With this patch, I think the only unimplemented obsolescence warning is for
(8) Fixed form source -- see B.2.7.
For the latter, I would like to see a possibility to silence that
warning, given that there is
I'm sorry the conversation about this patch went to private
incidentally. Resend the key point.
On Tue, Jul 24, 2012 at 8:40 PM, Julian Brown jul...@codesourcery.com wrote:
On Mon, 23 Jul 2012 13:48:22 +0800
Ye Joey joey.ye...@gmail.com wrote:
Since v7m and v6m are very different. It is high
On Mon, Aug 13, 2012 at 10:49 AM, Richard Guenther
richard.guent...@gmail.com wrote:
On Sun, Aug 12, 2012 at 11:49 PM, Steven Bosscher stevenb@gmail.com
wrote:
Hello,
This patch tried to use non-clearing memory allocation where possible.
This is especially important for very large
On 14/08/2012 11:33, Tobias Burnus wrote:
Thus, I removed ST_LABEL_ENDDO_TARGET, use =type and added a comment,
but I didn't do the verify_st_order change.
Build and regested on x86-64-linux.
OK for the trunk?
OK, apart for:
* gfortran.dg/data_constraints_1.f90: Update dg-warning.
This removes the overhead of clearing a vector of n_basic_blocks
elements per anti expression during insertion by making it a vector
indexed by pred edge index and allocating it once for each basic
block instead. This can make a significant difference for large
functions.
Bootstrap and regtest
Hello,
Checking overhead in dominance.c gives measurable compile time
increases on a set of cc1-i files. Most of the checking should be done
only with non-release checks enabled.
Bootstrappedtested on powerpc64-unknown-linux-gnu. OK for trunk?
Ciao!
Steven
dom_checking_assert.diff
On 14/08/2012 11:33, Tobias Burnus wrote:
This patch adds a -Wconversion warning (enabled also by -Wall) for
CMPLX(real, real)
if the real arguments have a higher kind number/precision as the
default-kind of complex/real. I think most of the time, this precision
loss is unintended; it can
On Tue, Aug 14, 2012 at 12:03 PM, Steven Bosscher stevenb@gmail.com wrote:
Hello,
Checking overhead in dominance.c gives measurable compile time
increases on a set of cc1-i files. Most of the checking should be done
only with non-release checks enabled.
Bootstrappedtested on
Hello,
Verifying loop fathers now passes on powerpc64-unknown-linux-gnu.
Also speed up fix_loop_structure by requiring DOM_OK so that fast DOM
queries are available.
Bootstrappedtested on powerpc64-unknown-linux-gnu. OK for trunk?
Ciao!
Steven
cfg_loop_father.diff
Description: Binary data
Richard Guenther wrote:
Accessing loop_depth (bb-loop_father) isn't very expensive. The
following removes the duplicate info in basic-blocks which is not
properly kept up-to-date at the moment.
Looks like this broke SPU build, since spu_machine_dependent_reorg
accesses -loop_depth.
On 08/14/2012 11:57 AM, Mikael Morin wrote:
On 14/08/2012 11:33, Tobias Burnus wrote:
Thus, I removed ST_LABEL_ENDDO_TARGET, use =type and added a comment,
but I didn't do the verify_st_order change.
Build and regested on x86-64-linux.
OK for the trunk?
OK, apart for:
*
On Tue, Aug 14, 2012 at 12:07 PM, Steven Bosscher stevenb@gmail.com wrote:
Hello,
Verifying loop fathers now passes on powerpc64-unknown-linux-gnu.
Also speed up fix_loop_structure by requiring DOM_OK so that fast DOM
queries are available.
Bootstrappedtested on
On Tue, 14 Aug 2012, Ulrich Weigand wrote:
Richard Guenther wrote:
Accessing loop_depth (bb-loop_father) isn't very expensive. The
following removes the duplicate info in basic-blocks which is not
properly kept up-to-date at the moment.
Looks like this broke SPU build, since
On Tue, Aug 14, 2012 at 12:48 PM, Richard Guenther rguent...@suse.de wrote:
If SPU md reorg would like to look at loop structures it should
compute them. Simply call flow_loops_find, which hopefully works
in CFG RTL mode (which I think is the mode available from md reorg?).
No, the CFG is
On Tue, 14 Aug 2012, Steven Bosscher wrote:
On Tue, Aug 14, 2012 at 12:48 PM, Richard Guenther rguent...@suse.de wrote:
If SPU md reorg would like to look at loop structures it should
compute them. Simply call flow_loops_find, which hopefully works
in CFG RTL mode (which I think is the
On Tue, 14 Aug 2012, Richard Guenther wrote:
This adds verification code that we do not try to rewrite a symbol
into SSA form that is already partly in SSA form. That would lead
to silent wrong-code generation.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Ick,
This makes --without-cloog and --without-isl disable GRAPHITE support
as intended.
Tested up to building stage2 with --without-isl, verified ISL was not
used or checked for, tested up to building stage2 without --without-isl,
verified system ISL was picked up.
Ok for trunk?
Thanks,
Richard.
Oleg Endo oleg.e...@t-online.de wrote:
This adds support for the SH2A instructions movu.b and movu.w for
zero-extending mem loads with displacement addressing.
Tested on rev 190332 with
make -k check RUNTESTFLAGS=--target_board=sh-sim
Oleg Endo oleg.e...@t-online.de wrote:
This patch adds basic support for utilizing the SH div0s instruction to
simplify some integer sign comparisons such as '(a 0) == (b 0)'.
Tested on rev 190332 with
make -k check RUNTESTFLAGS=--target_board=sh-sim
Hi Richard,
These changes try to resolve the known problem with the first
instruction scheduler for x86 platform. The main issue is the
existence of hardware registers that are used for unloading of
function arguments passing in HW registers and for passing function
arguments in HW registers.
1.
On 08/14/12 08:30:59, Jakub Jelinek wrote:
On Mon, Aug 13, 2012 at 09:20:32PM -0700, Gary Funck wrote:
--- gcc/testsuite/gcc.dg/pr20020-1.c(revision 0)
+++ gcc/testsuite/gcc.dg/pr20020-1.c(revision 0)
@@ -0,0 +1,25 @@
+/* Target is restricted to x86_64 type architectures,
On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
2. Passing function arguments in HW registers.
The main problem here is that backward copy propagation phase (aka
combine instructions) can propagate HW argument registers to
instructions evaluating argument values
Hi Uros,
Thanks a lot forr your comments.
I prepared new patch and ChangeLog. Testing of x32 is in progress.
It it OK for trunk?
2012-08-14 Yuri Rumyantsev ysrum...@gmail.com
* config/i386/i386-protos.h (ix86_split_lea_for_addr) : Add
additional argument.
*
On 08/13/2012 04:32 PM, Mikael Morin wrote:
here is a fix for PR47586: missing deep copy for the case:
dt_w_alloc = ptr_func(arg)
The patch set looks okay. I am not 100% sure how compatible your changes
are with regards to finalization and coarray components, but I have the
impression they
On Tue, Aug 14, 2012 at 2:02 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
2. Passing function arguments in HW registers.
The main problem here is that backward copy propagation phase (aka
combine instructions) can
On Tue, Aug 14, 2012 at 02:40:42PM +0200, Richard Guenther wrote:
On Tue, Aug 14, 2012 at 2:02 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
2. Passing function arguments in HW registers.
The main problem here is that
On Tue, Aug 14, 2012 at 2:45 PM, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Aug 14, 2012 at 02:40:42PM +0200, Richard Guenther wrote:
On Tue, Aug 14, 2012 at 2:02 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev ysrum...@gmail.com
wrote:
2.
On Tue, Aug 14, 2012 at 2:45 PM, Jakub Jelinek ja...@redhat.com wrote:
2. Passing function arguments in HW registers.
The main problem here is that backward copy propagation phase (aka
combine instructions) can propagate HW argument registers to
instructions evaluating argument values
On 12-08-14 01:39 , Laurynas Biveinis wrote:
(walk_type): Set D-IN_PTR_FILED when walking a TYPE_POINTER.
FIELD
Done.
+fields is completely handled by user-provided routines. Section
+@ref{User GC} for details on what functions need to be provided.
See Section ... ?
Done.
On 12-08-14 04:38 , Dodji Seketeli wrote:
Hello Diego,
Just some minor comments.
Diego Novillo dnovi...@google.com a écrit:
[...]
+@section User-provided marking routines for template types
+When a template type @code{TP} is marked with @code{GTY}, all
+instances of that type are considered
Uros,
Let me try to explain you why I used such code duplication:
Here we have a common case of LEA with 3 different registers - r0
(target), r1(base), r2(index) and possible offset.
To get the better scheduling we first try to determine what register
is prefirable for inititial setting - r1 or
This implements constant pool entry sharing for CONST_VECTORs with the
same bit-pattern by canonicalizing them to the same-sized mode with
the least number of elements. Ideally we would be able to hash and
compare the in-memory representation of a constant (together with
its alignment
Attached is the first 4.8 merge of the Fortran related changes from
wiki/Gfortran#news into the 4.8 release notes.
I have committed the patch as obvious, however, I am happy for any comments.
Possibly easier to read: http://gcc.gnu.org/gcc-4.8/changes.html (all in
the Fortran section)
OK, provided that the patches in the above threads apply without conflicts.
If there are conflicts, please repost for review.
Comitted to 4.7 branch: http://gcc.gnu.org/ml/gcc-cvs/2012-08/msg00360.html
Thanks, K
Update contrib/testsuite-management/powerpc-grtev3-linux-gnu.xfail.
Tested with build followed by validate_failures.py. Okay for all applicable
branches?
2012-08-14 Simon Baldwin sim...@google.com
* testsuite-management/powerpc-grtev3-linux-gnu.xfail: Add new entries
for
Hi,
This fixes PR target/54212.. The problem here was we were
marking a number of patterns in neon.md as predicable. Advanced SIMD
instructions are not predicable in ARM state, however are allowed to
exist in Thumb2 in IT blocks ( though this is a feature that is
deprecated and is
On Tue, 14 Aug 2012, Richard Guenther wrote:
This implements constant pool entry sharing for CONST_VECTORs with the
same bit-pattern by canonicalizing them to the same-sized mode with
the least number of elements. Ideally we would be able to hash and
compare the in-memory representation of
On Tue, Aug 14, 2012 at 3:35 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
Uros,
Let me try to explain you why I used such code duplication:
Here we have a common case of LEA with 3 different registers - r0
(target), r1(base), r2(index) and possible offset.
To get the better scheduling we
On Tue, 14 Aug 2012, Jakub Jelinek wrote:
On Mon, Aug 13, 2012 at 09:20:32PM -0700, Gary Funck wrote:
--- gcc/testsuite/gcc.dg/pr20020-1.c(revision 0)
+++ gcc/testsuite/gcc.dg/pr20020-1.c(revision 0)
@@ -0,0 +1,25 @@
+/* Target is restricted to x86_64 type architectures,
On Mon, Aug 13, 2012 at 9:50 PM, Richard Henderson r...@redhat.com wrote:
On 08/13/2012 12:33 PM, Uros Bizjak wrote:
AFAIU fma3 is better than fma4 for bdver2 (the only CPU that
implements both FMA sets). Current description of bdver2 doesn't even
enable fma4 in processor_alias_table due to
Gerald,
I have this queued up in my local tree, waiting for the final
merge of the cxx-conversion branch.
OK to install after the merge?
Thanks. Diego.
Index: index.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v
On 08/14/12 15:33:10, Joseph S. Myers wrote:
On Tue, 14 Aug 2012, Jakub Jelinek wrote:
On Mon, Aug 13, 2012 at 09:20:32PM -0700, Gary Funck wrote:
--- gcc/testsuite/gcc.dg/pr20020-1.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr20020-1.c (revision 0)
@@ -0,0 +1,25 @@
+/*
On Tue, Aug 14, 2012 at 9:12 AM, Gary Funck g...@intrepid.com wrote:
On 08/14/12 15:33:10, Joseph S. Myers wrote:
On Tue, 14 Aug 2012, Jakub Jelinek wrote:
On Mon, Aug 13, 2012 at 09:20:32PM -0700, Gary Funck wrote:
--- gcc/testsuite/gcc.dg/pr20020-1.c (revision 0)
+++
Hi, Dodji,
Thanks for the review. I've fixed all the addressed issues. I'm
attaching the related changes:
Thanks,
Dehao
libcpp/ChangeLog:
2012-08-01 Dehao Chen de...@google.com
* include/line-map.h (MAX_SOURCE_LOCATION): New value.
(location_adhoc_data_init): New.
Hi Gerald,
Is this release note alright?
Thanks,
-Sri.
On Fri, Aug 10, 2012 at 7:20 PM, Sriraman Tallam tmsri...@google.com wrote:
Hi,
I have added a release note for x86 builtins __builtin_cpu_is and
__builtin_cpu_supports. They were checked in to trunk in rev. 186789.
Is this ok to
+ger...@pfiefer.com
On Tue, Aug 14, 2012 at 10:51 AM, Sriraman Tallam tmsri...@google.com wrote:
Hi Gerald,
Is this release note alright?
Thanks,
-Sri.
On Fri, Aug 10, 2012 at 7:20 PM, Sriraman Tallam tmsri...@google.com wrote:
Hi,
I have added a release note for x86 builtins
Hello,
Many unused timevars, many timevars that measure completely different
passes, passes with the wrong timevar, etc.
Time for a bit of maintenance / janitorial.
Bootstrappedtested on powerpc64-unknown-linux-gnu. OK for trunk?
Ciao!
Steven
timevar_tlc.diff
Description: Binary data
On 12-08-14 14:26 , Steven Bosscher wrote:
Hello,
Many unused timevars, many timevars that measure completely different
passes, passes with the wrong timevar, etc.
Time for a bit of maintenance / janitorial.
Bootstrappedtested on powerpc64-unknown-linux-gnu. OK for trunk?
Ciao!
Steven
On 12-08-14 09:48 , Diego Novillo wrote:
This merge touches several files, so I'm thinking that the best time is
going to be on Thu 16/Aug around 2:00 GMT.
So, the fixes I needed from Lawrence are already in so we can proceed
with the merge. I'll commit the merge tonight at ~2:00 GMT.
On Tue, Aug 14, 2012 at 8:40 PM, Diego Novillo dnovi...@google.com wrote:
On 12-08-14 14:26 , Steven Bosscher wrote:
Hello,
Many unused timevars, many timevars that measure completely different
passes, passes with the wrong timevar, etc.
Time for a bit of maintenance / janitorial.
On 12-08-14 15:06 , Steven Bosscher wrote:
On Tue, Aug 14, 2012 at 8:40 PM, Diego Novillo dnovi...@google.com wrote:
On 12-08-14 14:26 , Steven Bosscher wrote:
@@ -505,6 +507,16 @@ timevar_print (FILE *fp)
TIMEVAR. */
start_time = now;
+#ifdef ENABLE_CHECKING
+ /* Pester those
On Tue, Aug 14, 2012 at 9:17 PM, Diego Novillo dnovi...@google.com wrote:
Is 32 the longest we can tolerate?
This 32 is just currently the longest name length of all timevars (for
straight-line strength reduction), but there are a few more long
ones (PCH preprocessor state restore ...). I didn't
On 12-08-14 15:20 , Steven Bosscher wrote:
On Tue, Aug 14, 2012 at 9:17 PM, Diego Novillo dnovi...@google.com wrote:
Is 32 the longest we can tolerate?
This 32 is just currently the longest name length of all timevars (for
straight-line strength reduction), but there are a few more long
ones
On Thu, Aug 9, 2012 at 3:17 PM, Ian Lance Taylor i...@google.com wrote:
On Thu, Aug 9, 2012 at 9:39 AM, H.J. Lu hongjiu...@intel.com wrote:
Bionic C library doesn't provide link.h.
Does Bionic provide dl_iterate_phdr? If it does, I'll just note in
passing that it would be straightforward to
On Tue, Aug 14, 2012 at 12:38 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Thu, Aug 9, 2012 at 3:17 PM, Ian Lance Taylor i...@google.com wrote:
On Thu, Aug 9, 2012 at 9:39 AM, H.J. Lu hongjiu...@intel.com wrote:
Bionic C library doesn't provide link.h.
Does Bionic provide dl_iterate_phdr? If
On Tue, Aug 14, 2012 at 9:25 PM, Diego Novillo dnovi...@google.com wrote:
This 32 is just currently the longest name length of all timevars (for
straight-line strength reduction), but there are a few more long
ones (PCH preprocessor state restore ...). I didn't look at the
total length of the
On 12-08-14 16:39 , Steven Bosscher wrote:
I seriously doubt that ;-)
Anyway, it's not so simple, this 80-len(everything else). I was
looking for a solution like that but it can't be done: there is no
everything else. It depends on the configuration -- more
specifically on HAVE_USER_TIME,
On 8/14/12, Steven Bosscher stevenb@gmail.com wrote:
On Aug 14, 2012 Diego Novillo dnovi...@google.com wrote:
On 12-08-14 14:26 , Steven Bosscher wrote:
Many unused timevars, many timevars that measure completely
different passes, passes with the wrong timevar, etc.
Time for a
Replace the once vacuously true, and now vacuously false, test for
existence of a conditional move instruction for a given mode, with one
that actually checks what it's supposed to. Add a test case so we don't
miss such things in future.
The test is powerpc-specific. It would be good to have an
On Tue, Aug 14, 2012 at 2:11 PM, William J. Schmidt
wschm...@linux.vnet.ibm.com wrote:
Replace the once vacuously true, and now vacuously false, test for
existence of a conditional move instruction for a given mode, with one
that actually checks what it's supposed to. Add a test case so we
On Tue, Aug 14, 2012 at 2:15 PM, Andrew Pinski pins...@gmail.com wrote:
On Tue, Aug 14, 2012 at 2:11 PM, William J. Schmidt
wschm...@linux.vnet.ibm.com wrote:
Replace the once vacuously true, and now vacuously false, test for
existence of a conditional move instruction for a given mode, with
Attached, is an updated patch (with change logs).
The test cases are now in gcc.target/i386 and the
target selection is dg-require-effective-target int128 only.
Verified that the tests correctly detect the presence/lack
of TImode support.
- Gary
Index: gcc/config/i386/i386.h
On Tue, 14 Aug 2012, Diego Novillo wrote:
OK to install after the merge?
Yep, this looks good. Thanks!
Gerald
Thanks, Andrew!
Bill
On Tue, 2012-08-14 at 14:17 -0700, Andrew Pinski wrote:
On Tue, Aug 14, 2012 at 2:15 PM, Andrew Pinski pins...@gmail.com wrote:
On Tue, Aug 14, 2012 at 2:11 PM, William J. Schmidt
wschm...@linux.vnet.ibm.com wrote:
Replace the once vacuously true, and now vacuously
The main purpose of this patch is to allow elements of assumed-shape
arrays (which are scalars) and assumed-rank arrays with C_LOC.
There are several other issues with the current C_LOC handling (and with
C_F_POINTER), but I want to fix the most important reject-valid issues
first as they
Currently we can insert an initializer that performs a multiply in too
small of a type for correctness. For now, detect the problem and avoid
the optimization when this would happen. Eventually I will fix this up
to cause the multiply to be performed in a sufficiently wide type.
Bootstrapped
On 15/08/2012, at 7:39 AM, H.J. Lu wrote:
On Tue, Aug 14, 2012 at 12:38 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Thu, Aug 9, 2012 at 3:17 PM, Ian Lance Taylor i...@google.com wrote:
On Thu, Aug 9, 2012 at 9:39 AM, H.J. Lu hongjiu...@intel.com wrote:
Bionic C library doesn't provide link.h.
On Tue, Aug 14, 2012 at 3:47 PM, Maxim Kuvyrkov ma...@codesourcery.com wrote:
I think this patch will break MIPS Android build due to mismatch of
ElfW(type) when _MIPS_SZPTR == 64. I think the right way to fix this is to
make Bionic export link.h or already-existing linker.h, but I differ
On Tue, Aug 14, 2012 at 3:47 PM, Maxim Kuvyrkov ma...@codesourcery.com wrote:
On 15/08/2012, at 7:39 AM, H.J. Lu wrote:
On Tue, Aug 14, 2012 at 12:38 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Thu, Aug 9, 2012 at 3:17 PM, Ian Lance Taylor i...@google.com wrote:
On Thu, Aug 9, 2012 at 9:39 AM,
On Tue, Aug 14, 2012 at 4:27 PM, Ian Lance Taylor i...@google.com wrote:
On Tue, Aug 14, 2012 at 3:47 PM, Maxim Kuvyrkov ma...@codesourcery.com
wrote:
I think this patch will break MIPS Android build due to mismatch of
ElfW(type) when _MIPS_SZPTR == 64. I think the right way to fix this is
This patch adds an xfail manifest for trunk for x86_64 builds. I find
this useful to determine whether my patch has introduced new failures.
The failures in these manifest are always present in trunk and
deciding what to ignore is not very straightforward.
I will keep maintaining this manifest
Hi,
Right now we only produce ins when a zero_extract is used on the
right hand side. We can do better by adding some patterns which
combine for the ins instruction. This patch adds those patterns and a
testcase which shows a simple example where the code is improved.
OK? Bootstrapped and
This patch to the Go frontend, from Diego, updates it for the conversion
of GCC to building with C++. Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r 681a1ae3f72c go/expressions.cc
--- a/go/expressions.cc Fri Aug 10 21:07:57 2012 -0700
+++
On 14/08/2012, at 7:08 PM, Richard Sandiford wrote:
OK with those changes, thanks.
Checked in with the noted changes and a fixed bug.
It turns out that mips_linked_madd_p is also called via
mips_macc_chains_reorder, which may pass a (use ...) instruction, which causes
get_attr_* to blow up.
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