Re: genattrab.c generate switch

On Tue, Jan 12, 2016 at 7:53 PM, Jesper Broge Jørgensen wrote: > Hello > > genattrab.c can generate if statements that have very deep bracket nesting > causing clang to produce errors (when target=arm-none-eabi) as explained at >

Re: [PATCH] Ensure noce_convert_multiple_sets handles only multiple sets (PR rtl-optimization/69570)

On February 1, 2016 9:26:38 PM GMT+01:00, Jakub Jelinek wrote: >On Mon, Feb 01, 2016 at 09:39:19AM +0100, Steven Bosscher wrote: >> Browny points for opting out of the loop over all insns in the basic >> block when count > limit. > >Like this? >Bootstrapped/regtested on

[PATCH] Fix PR64748

Hi, The attached patch resolves c/PR64748. The patch adds the use of parm's with the deviceptr clause. Question As there is VAR_P (), could there be a PARM_P ()? Or would that obscure something I'm not aware of? Regtested and bootstrapped on x86_64. Thanks, Jim ChangeLog entries...

Re: [PATCH] Ensure noce_convert_multiple_sets handles only multiple sets (PR rtl-optimization/69570)

On Mon, Feb 01, 2016 at 09:39:19AM +0100, Steven Bosscher wrote: > Browny points for opting out of the loop over all insns in the basic > block when count > limit. Like this? Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2016-02-01 Jakub Jelinek

Re: Default compute dimensions

On 02/01/16 13:42, Jakub Jelinek wrote: Your patch broke bootstrap on ILP32 hosts, I'm testing following fix. Supporting unsigned values from 0x8000U to 0xU only on LP64 hosts and not on ILP64 hosts sounds really weird, I think it is better to only support 1 to 0x7fffU. yes, I

Re: [PATCH] Fix PR64748

On Mon, Feb 01, 2016 at 01:41:50PM -0600, James Norris wrote: > The attached patch resolves c/PR64748. The patch > adds the use of parm's with the deviceptr clause. > > Question > > As there is VAR_P (), could there be a PARM_P ()? Not for GCC 6.x, for 7 it is possible. > ---

Re: [PATCH] Don't change stack_alignment_needed for __tls_get_addr

On Mon, Feb 1, 2016 at 6:30 PM, H.J. Lu wrote: > On Wed, Jan 27, 2016 at 11:49 AM, Uros Bizjak wrote: >> On Wed, Jan 27, 2016 at 8:25 PM, H.J. Lu wrote: >>> >>> __tls_get_addr must be called with 16-byte aligned stack, which is >>>

Re: [PATCH] Fix wide_int unsigned division (PR tree-optimization/69546, take 2)

On Sat, Jan 30, 2016 at 02:04:45PM +, Richard Sandiford wrote: > Not sure what to call it. Maybe canonize_uhwi? Like canonize, except > that it takes a uhwi instead of a length. > > > Can that be done as a follow-up? Certainly it would need > > to take the uhwi to store, pointer to the

Re: genattrab.c generate switch

On 01/02/16 20:19, Patrick Palka wrote: On Tue, Jan 12, 2016 at 7:53 PM, Jesper Broge Jørgensen wrote: Hello genattrab.c can generate if statements that have very deep bracket nesting causing clang to produce errors (when target=arm-none-eabi) as explained at

Re: [PATCH, testsuite]: Use -gdwarf-2 for g++.dg/other/anon5.C

On 02/01/2016 03:05 PM, Uros Bizjak wrote: Hello! This test case fails for targets, where dwarf-4 is unsupported (e.g. CentOS 5.11) with /usr/bin/ld: Dwarf Error: found dwarf version '4', this reader only handles version 2 information. We can use -gdwarf-2 here, and still get correct linker

Re: [PATCH] Fix up _Pragma GCC diagnostics regressions (PR preprocessor/69543, PR c/69558)

On 01/29/2016 10:57 PM, David Malcolm wrote: On Fri, 2016-01-29 at 20:50 +0100, Jakub Jelinek wrote: Hi! This patch reverts one tiny change from r228049 changes (which hasn't been mentioned in the ChangeLog or patch description). We definitely need to revisit this for GCC 7, but stage4 is

Re: [PATCH] Fix compile/memory hog in the combiner (PR rtl-optimization/69592)

On 02/01/2016 09:34 PM, Jakub Jelinek wrote: On the following testcase we completely uselessly consume about 5.5GB of RAM and lots of compile time. The problem is the code to avoid exponential behavior of nonzero_bits/num_sign_bit_copies on binary arithmetics rtxes, which causes us to recurse

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

On Sat, 2016-01-30 at 11:06 +, Richard Sandiford wrote: > I'm not sure this patch is safe. The received wisdom used to be that > ABIs should be defined in terms of types, not modes, since types > represent the source code while modes are an internal GCC concept > that could change over time

[PATCH] [PR tree-optimization/68580] Throttle size of PHI nodes we'll walk in FSM threader

As discussed in the BZ, the FSM code walks backwards through PHI nodes trying to find constant values for key SSA_NAMEs. When the size of the PHI node gets very large, those walks get exponentially more expensive. Experiments have shown that there are limited cases with PHI nodes with >

[PATCH, testsuite]: Use -gdwarf-2 for g++.dg/other/anon5.C

Hello! This test case fails for targets, where dwarf-4 is unsupported (e.g. CentOS 5.11) with /usr/bin/ld: Dwarf Error: found dwarf version '4', this reader only handles version 2 information. We can use -gdwarf-2 here, and still get correct linker error message on Cent OS 5.11 and Fedora 23.

[Patch, fortran] PR66089 fix elemental dependency mishandling

Hello, this is about the case c(:) = elemental_func(c(1), ...) where as a result of a trunk change, only a reference to c(1) is saved to a temporary variable, instead of its value. The fix tries to save the amount of copying as much as possible by detecting the above case. Technically

Re: [PATCH] Fix compile/memory hog in the combiner (PR rtl-optimization/69592)

On 02/01/2016 01:34 PM, Jakub Jelinek wrote: Hi! On the following testcase we completely uselessly consume about 5.5GB of RAM and lots of compile time. The problem is the code to avoid exponential behavior of nonzero_bits/num_sign_bit_copies on binary arithmetics rtxes, which causes us to

Re: [PATCH, testsuite]: Fix PR 65944, FAIL: g++.dg/lto/pr65276: undefined reference to std2::exception::~exception()

On Thu, 2015-06-18 at 11:05 +0200, Uros Bizjak wrote: > On Thu, Jun 18, 2015 at 10:59 AM, James Greenhalgh > wrote: > > >> > Hello! > >> > > >> > Following patch fixes: > >> > > >> > cp_lto_pr65276_1.o: In function > >> > `std2::runtime_error::~runtime_error()':^M > >>

RE: [Patch,microblaze]: Better register allocation to minimize the spill and fetch.

-Original Message- From: Mike Stump [mailto:mikest...@comcast.net] Sent: Tuesday, February 02, 2016 12:12 AM To: Ajit Kumar Agarwal Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala Subject: Re: [Patch,microblaze]: Better register allocation to

Re: [PATCH][2/2] Improve array-bound warnings and VRP

On Mon, Jan 26, 2015 at 7:06 AM, Richard Biener wrote: > > This is the 2nd thing I came up with after looking at PR64277. > VRP does a poor job computing value-ranges of unrolled loop IVs > thus a very simple thing to do is to factor in previous VRP results > by intersecting

Re: [PATCH] Ensure noce_convert_multiple_sets handles only multiple sets (PR rtl-optimization/69570)

On Mon, Feb 1, 2016 at 9:32 AM, Jakub Jelinek wrote: > Bootstrapped/regtested on > {x86_64,i686,ppc64,ppc64le,s390,s390x,aarch64}-linux, > ok for trunk? OK. Browny points for opting out of the loop over all insns in the basic block when count > limit. Ciao! Steven

[PATCH] Ensure noce_convert_multiple_sets handles only multiple sets (PR rtl-optimization/69570)

Hi! While looking at this PR (which is most likely a reg-stack or RA bug triggered by the ifcvt noce_convert_multiple_sets additions), I've noticed that despite the "multiple_sets" in the name it actually attempts to handle not just multiple sets, but also the single set case, which is already

Remove couple of dead lines in reload_cse_simplify

They are not flagged by the compiler, albeit obviously dead, but static analyzers will probably not miss them. Tested on x86_64-suse-linux, applied on the mainline. 2016-02-01 Eric Botcazou * postreload.c (reload_cse_simplify): Remove dead code. -- Eric

[openacc] reference-typed data mappings

This patch fixes a couple of bugs preventing c++ reference-typed variables from working in openacc data clauses. These fixes include: * Teach the gimplifier to filter out pointer data mappings for OACC_DATA, OACC_ENTER_DATA, OACC_EXIT_DATA and OACC_UPDATE regions. Along with using a

RE: [Patch,microblaze]: Better register allocation to minimize the spill and fetch.

-Original Message- From: Michael Eager [mailto:ea...@eagerm.com] Sent: Friday, January 29, 2016 11:33 PM To: Ajit Kumar Agarwal; GCC Patches Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala Subject: Re: [Patch,microblaze]: Better register allocation to

Re: Is it OK for rtx_addr_can_trap_p_1 to attempt to compute the frame layout? (was Re: [PATCH] Skip re-computing the mips frame info after reload completed)

On Mon, Feb 1, 2016 at 1:51 PM, Bernd Schmidt wrote: > On 02/01/2016 01:49 PM, Richard Biener wrote: > >> What prevents motion of those across a stack adjustment (thus a place >> they are _not_ valid?) > > > If the address is SP-based, dependencies on the address register. If

Re: [PATCH 6/9] S/390: Get rid of Y constraint in tabort.

Andreas Krebbel wrote: > (define_insn "*tabort_1" > - [(unspec_volatile [(match_operand:SI 0 "shift_count_or_setmem_operand" > "Y")] > + [(unspec_volatile [(match_operand:SI 0 "addrreg_or_constint_operand" > "a,n")] > UNSPECV_TABORT)] >"TARGET_HTM && operands != NULL" >

Re: [PATCH 7/9] S/390: Get rid of Y constraint in vector.md.

Andreas Krebbel wrote: > +(define_insn "*vec_extract_plus" > + [(set (match_operand: 0 > "nonimmediate_operand" "=d,QR") > + (unspec: [(match_operand:V 1 "register_operand" > "v, v") > +(plus:SI (match_operand:SI 2

Re: [Patch AArch64] Use software sqrt expansion always for -mlow-precision-recip-sqrt

On Mon, Jan 25, 2016 at 11:21:25AM +, James Greenhalgh wrote: > On Mon, Jan 11, 2016 at 11:53:39AM +, James Greenhalgh wrote: > > > > Hi, > > > > I'd like to switch the logic around in aarch64.c such that > > -mlow-precision-recip-sqrt causes us to always emit the low-precision > >

Re: [AArch64] Remove AARCH64_EXTRA_TUNE_RECIP_SQRT from Cortex-A57 tuning

On Mon, Jan 25, 2016 at 11:20:46AM +, James Greenhalgh wrote: > On Mon, Jan 11, 2016 at 12:04:43PM +, James Greenhalgh wrote: > > > > Hi, > > > > I've seen a couple of large performance issues caused by expanding > > the high-precision reciprocal square root for Cortex-A57, so I'd like >

Re: [PATCH 3/9] S/390: Get rid of Y constraint in rotate patterns.

Andreas Krebbel wrote: > +; Accept single register and immediate operands usable as shift > +; counts. > +(define_predicate "addrreg_or_constint_operand" > + (match_code "reg, subreg, const_int") I'm wondering whether this is even necessary. > +{ > + if (GET_MODE (op) != VOIDmode > + &&

RE: [Patch, MIPS] Patch for PR 68400, a mips16 bug

> -Original Message- > From: Matthew Fortune > Sent: 30 January 2016 16:46 > To: Richard Sandiford; Steve Ellcey > Cc: gcc-patches@gcc.gnu.org; c...@codesourcery.com; Andrew Bennett > Subject: RE: [Patch, MIPS] Patch for PR 68400, a mips16 bug > > Richard Sandiford

Re: [PATCH 8/9] S/390: Use define_subst for the setmem patterns.

Andreas Krebel: > While trying to get rid of the Y constraint in the setmem patterns I > noticed that for these patterns it isn't even a problem since these > always only use the constraint with a Pmode match_operand. But while > being at it I've tried to fold some of the patterns a bit. Hmm,

Re: [PATCH 2/9] S/390: Add disabled insn attribute

Andreas Krebbel wrote: > With this patch a `disabled' attribute is defined which can be used to > explicitly disable an alternative. This comes handy when defining the > substitutions later and while adding it anyway I've used it for the > existing cases as well. > +; Insn attribute with

[Patch, avr] Restore default value of PARAM_ALLOW_STORE_DATA_RACES to 1

sts z+1,r23 sts z,r22 rjmp .L4 .size foo, .-foo .local i.1495 .comm i.1495,1,1 .comm z,2,1 .ident "GCC: (GNU) 6.0.0 20160201 (experimental)" Note the usage of an extra reg (r18) that is used as a flag to record lo

Re: Default compute dimensions

On 01/29/16 10:18, Jakub Jelinek wrote: On Thu, Jan 28, 2016 at 10:38:51AM -0500, Nathan Sidwell wrote: This patch adds default compute dimension handling. Users rarely specify compute dimensions, expecting the toolchain to DTRT. More savvy users would like to specify global defaults. This

[PATCH] S/390: Correct documentation typos.

The attached patch corrects a few typos in the S/390 specific documentation. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * doc/extend.texi: S/390: Correct some typos. >From 418db8fbac09ecfb8f70f7f2a5c8e4ce52cc160a Mon Sep 17 00:00:00 2001 From: Dominik Vogt

AW: Is it OK for rtx_addr_can_trap_p_1 to attempt to compute the frame layout? (was Re: [PATCH] Skip re-computing the mips frame info after reload completed)

Hi, On 02/01/2016 13:18, Bernd Schmidt wrote: > On 01/29/2016 08:42 PM, Bernd Edlinger wrote: > > Usually we have "if (x==1234) { read MEM[FP+x]; }", so wo don't know, > > and then after reload: "if (x==1234) { read MEM[SP+x+sp_fp_offset]; }" > > but wait, in the if statement we know, that

[PATCH] libitm: Introduce target macro TARGET_BEGIN_TRANSACTION_ATTRIBUTE.

The attached patch adds the a target specific attribute via the new target macro TARGET_BEGIN_TRANSACTION_ATTRIBUTE to the function begin_transaction(). S/390 uses this to set the soft-float target attribute which is needed to fix a crash with -m31. As there seems to be no place in libitm to

Re: [PATCH 5/9] S/390: Get rid of Y constraint in arithmetic right shift patterns.

Andreas Krebbel wrote: > +; This is like the addr_style_op substitution above but with a CC clobber. > +(define_subst "addr_style_op_cc_subst" > +; This is like the masked_op substitution but with a CC clobber. > +(define_subst "masked_op_cc_subst" A bit unfortunate that these need to be

Re: [PATCH 9/9] S/390: Disallow SImode in s390_decompose_address

Andreas Krebbel wrote: > * config/s390/s390.c (s390_decompose_address): Don't accept SImode > anymore. Great! Very nice to finally get rid of this. Thanks, Ulrich -- Dr. Ulrich Weigand GNU/Linux compilers and toolchain ulrich.weig...@de.ibm.com

[PATCH] [ARC] Add single/double IEEE precission FPU support.

In this patch, we add support for the new FPU instructions available with ARC V2 processors. The new FPU instructions covers both single and double precision IEEE formats. While the single precision is available for both ARC EM and ARC HS processors, the double precision is only available for ARC

Re: [PATCH, RFC] New memory usage statistics infrastructure

On 01/29/2016 05:24 PM, Patrick Palka wrote: > On Thu, May 28, 2015 at 1:07 PM, Jeff Law wrote: >> On 05/28/2015 06:29 AM, Martin Liška wrote: >> >>> >>> Hello. >>> >>> Thank you for pointing about missing copyright. >>> Following patch adds that. >>> >>> Ready for trunk? >>

Re: [PATCH] Fix use of declare'd vars by routine procedures.

On Mon, Feb 01, 2016 at 10:00:51AM -0600, James Norris wrote: > +2016-01-XX James Norris It is February now ;) > @@ -8223,7 +8247,7 @@ gimplify_oacc_declare (tree *expr_p, gimple_seq *pre_p) > if (oacc_declare_returns == NULL) >

Re: [PATCH 3/9] S/390: Get rid of Y constraint in rotate patterns.

On 02/01/2016 02:30 PM, Ulrich Weigand wrote: > Andreas Krebbel wrote: > >> +; Accept single register and immediate operands usable as shift >> +; counts. >> +(define_predicate "addrreg_or_constint_operand" >> + (match_code "reg, subreg, const_int") > > I'm wondering whether this is even

Re: [PATCH] [ARM] PR68532: Fix VUZP and VZIP recognition on big endian

On 16/12/15 17:44, Charles Baylis wrote: Hi Hi Charles, sorry for the delay on this one. This patch addresses incorrect recognition of VEC_PERM_EXPRs as VUZP and VZIP on armeb-* targets. It also fixes the definition of the vuzpq_* and vzipq_* NEON intrinsics which use incorrect lane

Re: [PATCH 2/9] S/390: Add disabled insn attribute

On 02/01/2016 02:45 PM, Ulrich Weigand wrote: > Andreas Krebbel wrote: > >> With this patch a `disabled' attribute is defined which can be used to >> explicitly disable an alternative. This comes handy when defining the >> substitutions later and while adding it anyway I've used it for the >>

[PATCH] nvptx: do not use alternative spelling of unsigned comparisons

Hello! The following patch fixes subtle breakage on NVPTX when unsigned comparisons would be sometimes mistranslated by PTX JIT. The new test demonstrates that by using the %nctaid.x (number of blocks) register, but a comparison against a value in constant memory can also trigger that (I could

Re: [PATCH 3/9] S/390: Get rid of Y constraint in rotate patterns.

On 02/01/2016 05:58 PM, Ulrich Weigand wrote: > Andreas Krebbel wrote: >> On 02/01/2016 02:30 PM, Ulrich Weigand wrote: >>> This seems to add just a single alternative. Is that OK if it gets >>> substituted into a pattern that used multiple alternatives otherwise? >> Yes. This is supposed to

[PATCH] libstdc++: S/390: Add missing baseline_symbols.txt for s390x/-m31.

The attached patch copies the existing libstdc++-v3/config/abi/post/s390-linux-gnu/baseline_symbols.txt to .../s390x-linux-gnu/32/baseline_symbols.txt. This fixes the abi test failure on s390x with -m31. The patch is gzip'ed because it's large. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM

Re: [PATCH 3/9] S/390: Get rid of Y constraint in rotate patterns.

Andreas Krebbel wrote: > > Hmm. In theory reload should always respect both constraints and > > predicates. > > But I guess it can't hurt to disable the alternative just to be safe; it is > > indeed an uncommon case to have the constraint accept more than the > > predicate. > > (Also a PLUS

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

On Sat, Jan 30, 2016 at 12:06 PM, Richard Sandiford wrote: > I'm not sure this patch is safe. The received wisdom used to be that > ABIs should be defined in terms of types, not modes, since types > represent the source code while modes are an internal GCC concept >

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

> Actually I'd say it's a frontend bug then setting DECL_ARG_TYPE to the > wrong type. Quoting: > > /* For a PARM_DECL, records the data type used to pass the argument, >which may be different from the type seen in the program. */ > #define DECL_ARG_TYPE(NODE) (PARM_DECL_CHECK

Re: Is it OK for rtx_addr_can_trap_p_1 to attempt to compute the frame layout? (was Re: [PATCH] Skip re-computing the mips frame info after reload completed)

On 01/29/2016 08:42 PM, Bernd Edlinger wrote: On 29.01.2016 16:47 Bernd Schmidt wrote: Yes. What is the problem with that? If we have (plus sfp const_int) at any point before reload, we can check whether that offset is inside frame_size. If it isn't or if the offset isn't known, it could trap.

Re: [PATCH][ARM][0/4] Fixing PR target/65932

Ping on the series: https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01717.html https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01714.html https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01716.html (already approved by Richi) https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01715.html as well as

[patch] libstdc++/69581 Don't define guard macros when doing #include_next in math.h and stdlib.h

The new and wrapper headers should not define their guard macros when being included in "pass-through" mode, i.e. when _GLIBCXX_INCLUDE_NEXT_C_HEADERS is defined. This patch allows the wrapper to pass-through as many layers of wrapper headers as needed until the real C library header is found.

Re: [PATCH PR67921]Convert pointer expr to proper type before negating it

On Fri, Jan 29, 2016 at 5:21 PM, Bin Cheng wrote: > Hi, > Function fold_binary_loc calls split_tree to split a tree into constant, > literal and variable parts. Function split_tree deals with minus_expr by > negating different parts into NEXGATE_EXPR. Since tree exprs fed

Re: Is it OK for rtx_addr_can_trap_p_1 to attempt to compute the frame layout? (was Re: [PATCH] Skip re-computing the mips frame info after reload completed)

On Mon, Feb 1, 2016 at 1:18 PM, Bernd Schmidt wrote: > On 01/29/2016 08:42 PM, Bernd Edlinger wrote: >> >> On 29.01.2016 16:47 Bernd Schmidt wrote: >>> >>> >>> Yes. What is the problem with that? If we have (plus sfp const_int) at >>> any point before reload, we can check

Re: [PATCH] fix #69573 - FAIL: gcc.dg/pr61053.c

On Sat, Jan 30, 2016 at 07:11:14PM -0700, Martin Sebor wrote: > While doing some research into the aligned attribute I came across > c/61053 that had been reopened after the regression test added with > the fix had started to fail on a couple of targets. Since the bug > is fixed and the test

Re: [Patch, fortran, pr67451, gcc-5, v1] [5/6 Regression] ICE with sourced allocation from coarray

Hi all, here is the backport of the patch for pr67451 for gcc-5. Because the structure of the allocate() in trunk is quite different the patch looks somewhat different, too, but essentially does the same. Bootstrapped and regtests ok on x86_64-linux-gnu/F23. Ok for gcc-5-branch? Here is the

[PATCH] Fix PR69579

The following fixes PR69579. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-02-01 Richard Biener PR tree-optimization/69579 * tree-ssa-loop-ivcanon.c (propagate_constants_for_unrolling): Do not propagate through

Re: [Patch, fortran, pr67451, gcc-5, v1] [5/6 Regression] ICE with sourced allocation from coarray

Oh, well, now with attachments. I am sorry. - Andre On Mon, 1 Feb 2016 13:20:24 +0100 Andre Vehreschild wrote: > Hi all, > > here is the backport of the patch for pr67451 for gcc-5. Because the > structure of the allocate() in trunk is quite different the patch looks > somewhat

Re: Is it OK for rtx_addr_can_trap_p_1 to attempt to compute the frame layout? (was Re: [PATCH] Skip re-computing the mips frame info after reload completed)

On 02/01/2016 01:49 PM, Richard Biener wrote: What prevents motion of those across a stack adjustment (thus a place they are _not_ valid?) If the address is SP-based, dependencies on the address register. If you're thinking prologue stack adjustments, ports where this could be an issue emit

Re: [PATCH] Don't change stack_alignment_needed for __tls_get_addr

On Wed, Jan 27, 2016 at 11:49 AM, Uros Bizjak wrote: > On Wed, Jan 27, 2016 at 8:25 PM, H.J. Lu wrote: >> >> __tls_get_addr must be called with 16-byte aligned stack, which is >> guaranted by setting preferred_stack_boundary to 128 bits. There >> is no

Re: Default compute dimensions

On 02/01/16 10:32, Jakub Jelinek wrote: On Mon, Feb 01, 2016 at 09:15:05AM -0500, Nathan Sidwell wrote: On 01/29/16 10:18, Jakub Jelinek wrote: On Thu, Jan 28, 2016 at 10:38:51AM -0500, Nathan Sidwell wrote: This patch adds default compute dimension handling. Users rarely specify compute

[PATCH] Fix compile/memory hog in the combiner (PR rtl-optimization/69592)

Hi! On the following testcase we completely uselessly consume about 5.5GB of RAM and lots of compile time. The problem is the code to avoid exponential behavior of nonzero_bits/num_sign_bit_copies on binary arithmetics rtxes, which causes us to recurse even when handling of those rtxes is going

Re: Default compute dimensions

On Mon, Feb 01, 2016 at 11:15:13AM -0500, Nathan Sidwell wrote: > On 02/01/16 10:32, Jakub Jelinek wrote: > >On Mon, Feb 01, 2016 at 09:15:05AM -0500, Nathan Sidwell wrote: > >>On 01/29/16 10:18, Jakub Jelinek wrote: > >>>On Thu, Jan 28, 2016 at 10:38:51AM -0500, Nathan Sidwell wrote: > This

Re: Default compute dimensions

On Mon, Feb 1, 2016 at 8:15 AM, Nathan Sidwell wrote: > On 02/01/16 10:32, Jakub Jelinek wrote: >> >> On Mon, Feb 01, 2016 at 09:15:05AM -0500, Nathan Sidwell wrote: >>> >>> On 01/29/16 10:18, Jakub Jelinek wrote: On Thu, Jan 28, 2016 at 10:38:51AM -0500, Nathan Sidwell

Re: [Patch,microblaze]: Better register allocation to minimize the spill and fetch.

On Jan 29, 2016, at 2:31 AM, Ajit Kumar Agarwal wrote: > > This patch improves the allocation of registers in the given function. Is it just me, or, would it be even better to change the abi and make MB_ABI_ASM_TEMP_REGNUM be allocated by the register allocator?

Re: Default compute dimensions

On Mon, Feb 01, 2016 at 09:15:05AM -0500, Nathan Sidwell wrote: > On 01/29/16 10:18, Jakub Jelinek wrote: > >On Thu, Jan 28, 2016 at 10:38:51AM -0500, Nathan Sidwell wrote: > >>This patch adds default compute dimension handling. Users rarely specify > >>compute dimensions, expecting the toolchain

[PATCH] Fix PR69556

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-02-01 Richard Biener PR middle-end/69556 * match.pd: Guard (C1/X)*C2 -> (C1*C2)/X with single_use. * gcc.dg/tree-ssa/recip-8.c: New testcase. Index: gcc/match.pd

[PATCH] Fix PR69574

I've bootstrapped and tested the followgn safe patch on x86_64-unknown-linux-gnu. Applied. Richard. 2016-02-01 Richard Biener PR tree-optimization/69574 * tree-chrec.c (hide_evolution_in_other_loops_than_loop): Instead of asserting return

Re: [PATCH] [ARM] PR68532: Fix VUZP and VZIP recognition on big endian

ping^2 On 13 January 2016 at 13:37, Charles Baylis wrote: > ping > > On 16 December 2015 at 17:44, Charles Baylis > wrote: >> Hi >> >> This patch addresses incorrect recognition of VEC_PERM_EXPRs as VUZP >> and VZIP on armeb-* targets. It

Re: [PATCH] Fix use of declare'd vars by routine procedures.

Hi! On 01/29/2016 02:31 AM, Jakub Jelinek wrote: On Thu, Jan 28, 2016 at 12:26:38PM -0600, James Norris wrote: I think the attached change is what you had in mind with regard to doing the check at gimplification time. Nope, this is still a wrong location for that. If you look at the next

Re: [RS6000] ABI_V4 init of toc section

On Fri, Jan 29, 2016 at 11:38 AM, Alan Modra wrote: > Since 4c4a180d, LTO has turned off flag_pic when linking a fixed > position executable. This results in flag_pic being zero in > rs6000_file_start, and no definition of ".LCTOC1". > > However, when we get to actually

Re: [PATCH] nvptx: do not use alternative spelling of unsigned comparisons

On 02/01/16 11:55, Alexander Monakov wrote: Hello! The following patch fixes subtle breakage on NVPTX when unsigned comparisons would be sometimes mistranslated by PTX JIT. The new test demonstrates that by using the %nctaid.x (number of blocks) register, but a comparison against a value in

Re: [RS6000] lqarx and stqcx. registers

On Sun, Jan 31, 2016 at 5:28 PM, Alan Modra wrote: > lqarx RT and stqcx. RS are valid only with even numbered gprs. The > predicate to enforce this happens to allow a loophole, closed by this > patch. > > This pattern created by combine: > Trying 8 -> 9: > Successfully matched

Re: genattrab.c generate switch

On 19/01/16 13:18, Bernd Schmidt wrote: On 01/18/2016 11:44 PM, Jesper Broge Jørgensen wrote: I found a formatting tool called uncrustify that comes with a gnu style config https://github.com/bengardner/uncrustify/blob/master/etc/gnu-indent.cfg that needed a few tweaks to format code that

Re: [PATCH] [graphite] document that isl-0.16 is supported

On Jan 29, 2016, at 8:10 AM, Sebastian Pop wrote: > diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi > index 062f42c..3df7974 100644 > --- a/gcc/doc/install.texi > +++ b/gcc/doc/install.texi > @@ -383,7 +383,7 @@ installed but it is not in your default library search >

Re: [committed] Fix declaration of vsscanf on hpux

On 01/31/16 17:03, John David Anglin wrote: The attached hack fixes missing const from the first argument of the declararation for vsscanf on hpux. Approved for all active dev branches.

Re: [PATCH 3/9] S/390: Get rid of Y constraint in rotate patterns.

Andreas Krebbel wrote: > On 02/01/2016 02:30 PM, Ulrich Weigand wrote: > > This seems to add just a single alternative. Is that OK if it gets > > substituted into a pattern that used multiple alternatives otherwise? > Yes. This is supposed to work. The new constraint will be duplicated until >

Re: [PATCH 2/9] S/390: Add disabled insn attribute

Andreas Krebbel wrote: > On 02/01/2016 02:45 PM, Ulrich Weigand wrote: > > So I'm wondering what the difference is between this and simply > > overriding the default implementation of "enabled" per-insn? > > > > So instead of adding > > (set_attr "disabled" "0,1")]) > > to an insn, you might