RE: [Patch x86_64]: fix order of cost table initialization for -march=znver1.

Hi Maintainers, > -Original Message- > From: Kumar, Venkataramanan > Sent: Tuesday, March 08, 2016 7:27 PM > To: Uros Bizjak (ubiz...@gmail.com); gcc-patches@gcc.gnu.org > Cc: Richard Beiner (richard.guent...@gmail.com); Kumar, Venkataramanan > Subject: RE: [Patch x86_64]: fix order of

[PATCH, libstdc++] Add missing free-standing headers to install rule

Hi, when the free-standing libstdc++-headers are installed, the C++ header file does not always compile, because it includes and this includes under certain conditions (__cplusplus >= 201103L && ATOMIC_INT_LOCK_FREE > 1) the header file but that fails to compile because it needs which is not

Re: [C++] Add -fnull-this-pointer

Hi, so I am not sure what is the consensus. Here are my two cents. I added the code motivated by looking into multiple inheritance code, where we often wind to if (this != null) foo = this + offset; else foo = NULL; which is redundant. I built libreoffice+LTO with and without this change

Re: [PATCH] Fix PR67278

Richard Biener writes: > Index: gcc/testsuite/gcc.dg/simd-7.c > === > --- gcc/testsuite/gcc.dg/simd-7.c (revision 0) > +++ gcc/testsuite/gcc.dg/simd-7.c (working copy) > @@ -0,0 +1,17 @@ > +/* { dg-do

C++ PATCH to unary fold-expression semantics

At Jacksonville the committee adjusted the semantics of C++17 fold-expressions so that empty expansions are ill-formed for more operators. Since this is a new feature in GCC 6, and the patch is trivial, let's update it accordingly. Tested x86_64-pc-linux-gnu, applying to trunk. commit

C++ PATCH to remove -fconcepts from -std=c++1z

At the Jacksonville C++ meeting last week the committee decided not to integrate the Concepts TS into the C++17 working paper, so I'm removing it from -std=c++1z. This patch also adds diagnostics to guide people toward adding -fconcepts for code that needs it. Concepts will probably be in

Re: [PATCH] Fix PR67278, x86 target part

Richard Biener writes: > Index: gcc/testsuite/gcc.dg/simd-8.c > === > --- gcc/testsuite/gcc.dg/simd-8.c (revision 0) > +++ gcc/testsuite/gcc.dg/simd-8.c (working copy) > @@ -0,0 +1,19 @@ > +/* { dg-do

Re: [PR69634] fix debug_insn-inconsistent REG_N_CALLS_CROSSED

Alexandre Oliva writes: > diff --git a/gcc/testsuite/gcc.dg/pr69634.c b/gcc/testsuite/gcc.dg/pr69634.c > new file mode 100644 > index 000..837bd57 > --- /dev/null > +++ b/gcc/testsuite/gcc.dg/pr69634.c > @@ -0,0 +1,22 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2

Re: [AArch64] Emit square root using the Newton series

On 03/08/16 16:08, Evandro Menezes wrote: On 02/16/16 14:56, Evandro Menezes wrote: On 12/08/15 15:35, Evandro Menezes wrote: Emit square root using the Newton series 2015-12-03 Evandro Menezes gcc/ * config/aarch64/aarch64-protos.h

Re: [AArch64] Emit square root using the Newton series

On 03/08/16 16:08, Evandro Menezes wrote: On 02/16/16 14:56, Evandro Menezes wrote: On 12/08/15 15:35, Evandro Menezes wrote: Emit square root using the Newton series 2015-12-03 Evandro Menezes gcc/ * config/aarch64/aarch64-protos.h

Re: [PATCH] Fix ICE with vector types in X % -Y pattern (PR middle-end/70050)

Marek Polacek writes: > diff --git gcc/testsuite/gcc.dg/pr70050.c gcc/testsuite/gcc.dg/pr70050.c > index e69de29..610456f 100644 > --- gcc/testsuite/gcc.dg/pr70050.c > +++ gcc/testsuite/gcc.dg/pr70050.c > @@ -0,0 +1,11 @@ > +/* PR middle-end/70025 */ > +/* { dg-do compile }

Re: [AArch64] Emit square root using the Newton series

On 02/16/16 14:56, Evandro Menezes wrote: On 12/08/15 15:35, Evandro Menezes wrote: Emit square root using the Newton series 2015-12-03 Evandro Menezes gcc/ * config/aarch64/aarch64-protos.h (aarch64_emit_swsqrt): Declare new

Re: [C++ PATCH] Further fix for constexpr SAVE_EXPR loop handling (PR c++/70135)

OK, thanks. Jason

Re: [PATCH] Require type compatible bases in DDR initialization (PR tree-optimization/70127)

On March 8, 2016 7:20:50 PM GMT+01:00, Jakub Jelinek wrote: >On Tue, Mar 08, 2016 at 07:11:45PM +0100, Richard Biener wrote: >> On March 8, 2016 7:04:37 PM GMT+01:00, Jakub Jelinek > wrote: >> I believe the safest fix is to re-instantiate the compatibility

[PATCH][wwwdocs] GCC 6 supports musl libc on Linux

I'd like to mention musl libc support in the gcc 6 release notes. (added under a linux section since only linux targets are supported now.) Is it ok to commit? Index: htdocs/gcc-6/changes.html === RCS file:

Re: [PATCH] Require type compatible bases in DDR initialization (PR tree-optimization/70127)

On Tue, Mar 08, 2016 at 07:11:45PM +0100, Richard Biener wrote: > On March 8, 2016 7:04:37 PM GMT+01:00, Jakub Jelinek wrote: > I believe the safest fix is to re-instantiate the compatibility check by > refactoring operand_equal_p to perform it on the full ref (but not

[C++ PATCH] Further fix for constexpr SAVE_EXPR loop handling (PR c++/70135)

Hi! The following testcases show that the recent cxx_eval_loop_expr fix wasn't sufficient in certain cases, it works well if the SAVE_EXPR contains increment of iterator that is initialized to some constant before the loop, but if we have nested loops and might look up the SAVE_EXPR again

Re: [PATCH] Require type compatible bases in DDR initialization (PR tree-optimization/70127)

On March 8, 2016 7:04:37 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >Honza has removed types_compatible_p call from operand_equal_p of >*MEM_REF. >This breaks tree-data-ref.c stuff, as the access fns are built with the >assumption that they refer to the same stuff (array indices

[PATCH] Require type compatible bases in DDR initialization (PR tree-optimization/70127)

Hi! Honza has removed types_compatible_p call from operand_equal_p of *MEM_REF. This breaks tree-data-ref.c stuff, as the access fns are built with the assumption that they refer to the same stuff (array indices or field bit offsets) between all DRs whose bases are operand_equal_p, but now that

[committed] Spelling fixes - becuase -> because

Hi! I've noticed a bunch of comment typos, fixed thusly, committed as obvious after bootstrap/regtest on x86_64-linux and i686-linux. 2016-03-08 Jakub Jelinek * ipa-polymorphic-call.c (walk_ssa_copies): Fix spelling - becuase -> because. *

[PATCH, rs6000] Add support for xxpermr and vpermr instructions

This patch adds support for two new Power9 instructions, xxpermr and vpermr, providing more efficient vector permutation operations on little-endian configurations. These new instructions are described in the Power ISA 3.0 document. Selection of the new instructions is conditioned upon

Re: [RFC][ARM,AArch64] Adding crypto Advsimd intrinsics tests

To illustrate what I mean, in fact we already have similar cases: On 7 March 2016 at 10:12, Christophe Lyon wrote: > Hi, > > While preparing the cleanup of neon-testgen.ml, I'm adding the missing > tests to gcc.target/aarch64/advsimd-intrinsics. > > All the *_p64 and

Re: [PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

Hi Andre, On 08/03/16 11:05, Andre Vieira (lists) wrote: On 03/03/16 11:28, Kyrill Tkachov wrote: Hi Andre, On 02/03/16 12:21, Andre Vieira (lists) wrote: Hi, Tests used to check for "r8" which will not work because cortex-r8 string is now included in the assembly. Fixed by checking for

[AArch64] Fix dependency of gcc-plugin.h

Hi, Our bug report https://bugs.linaro.org/show_bug.cgi?id=2123 complains about aarch64's missing plugin dependency. IFAIT, the problem is present on trunk too, and the small attached patch fixes it. OK? Thanks, Christophe. 2016-03-08 Christophe Lyon *

[PATCH] libcc1: rerun configure when gcc/BASE-VER changes

This is needed to get gcc_version updated. Andreas. * configure.ac (CONFIG_STATUS_DEPENDENCIES): Substitute. * configure: Regenerate. * Makefile.in: Regenerate. diff --git a/libcc1/configure.ac b/libcc1/configure.ac index 6c97afd..e2e3fda 100644 --- a/libcc1/configure.ac

RE: [Patch x86_64]: fix order of cost table initialization for -march=znver1.

Hi Uros, > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Kumar, Venkataramanan > Sent: Tuesday, March 08, 2016 7:21 PM > To: Uros Bizjak (ubiz...@gmail.com); gcc-patches@gcc.gnu.org > Cc: Richard Beiner

[Patch x86_64]: fix order of cost table initialization for -march=znver1.

Hi Uros, While debugging GCC to see if cost of multiplication for DI mode is set correctly for znver1 target. I found that the order of cost table insertion is wrong for znver1 and it worked because btver2 had same cost for multiply . The patch corrects the mistake I made. 2016-03-08

[PATCH][obvious] Fix typo in tree-ssa-math-opts.c

Committed as obvious. Thanks, Kyrill 2016-03-08 Kyrylo Tkachov * tree-ssa-math-opts.c: Fix typo in comment. diff --git a/gcc/tree-ssa-math-opts.c b/gcc/tree-ssa-math-opts.c index 2215b4dc709213730a92b533f8774464a36efaf4..4626022b8b81c74e72d808d63d4c4ed4e7ea963a

[PATCH 1/2] S/390: Define macros for rounding mode constants

This patch replaces a few magic numbers used for floating point rounding modes with macros. This is mostly a NoOp change apart from: fixuns_truncdddi2, fixuns_trunctddi2, fixuns_truncsi2: Replace 5 with DFP_RND_TOWARD_0 (which is 9). 5 as well as 9 represent round towards 0 with the difference

[PATCH 0/2] Fix TD->SD conversion issue

This fixes a rounding mode issue recently noticed when working libdfp. Please see the patch descriptions for more details. Andreas Krebbel (2): S/390: Define macros for rounding mode constants S/390: Fix rounding for _Decimal128 to _Decimal32 conversion gcc/config/s390/s390.md

[PATCH 2/2] S/390: Fix rounding for _Decimal128 to _Decimal32 conversion

We do not have a direct conversion instruction from 128 bit DFP to 32 bit DFP so this needs to be done in two steps. The first needs to be done with the "prepare for shorter precision rounding mode" in order to produce a correct result. 2016-03-08 Andreas Krebbel

[PATCH] S/390: Rename shift_count_or_setmem_operand to setmem_operand

The shift_count_or_setmem_operand predicate is now only used for setmem patterns anymore. Rename it together with the related functions. 2016-03-08 Andreas Krebbel * config/s390/constraints.md: Adjust comment. ("Y"): Adjust comment. Rename

Re: [PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

On 03/03/16 11:28, Kyrill Tkachov wrote: > Hi Andre, > > On 02/03/16 12:21, Andre Vieira (lists) wrote: >> Hi, >> >> Tests used to check for "r8" which will not work because cortex-r8 >> string is now included in the assembly. Fixed by checking for "[^\-]r8". >> >> Is this Ok? >> >> Cheers, >>