[PATCH] ARC: configure script to allow non uclibc based triplets

gcc/ 2016-05-20 Vineet Gupta * config.gcc: Remove uclibc from arc target spec Signed-off-by: Vineet Gupta --- gcc/config.gcc | 2 +- libgcc/config.host | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config.gcc

Re: [C++ PATCH] PR c++/69855

On 19 May 2016 at 19:40, Jason Merrill wrote: > On 05/05/2016 09:11 AM, Ville Voutilainen wrote: >> >> On 5 May 2016 at 13:36, Paolo Carlini wrote: >>> >>> .. minor nit: the new testcase has a number of trailing blank lines. >> >> >> New patch

[PATCH] Fix PR tree-optimization/71179

Hi, We don’t allow vector type for integer. Likewise I am also disallowing the floating point vector type in transforming repeated addition to multiplication. This can be relaxed. I will send a separate patch to allow integer and floating point vectorization later. Bootstrapped and regression

Re: [PATCH v2] gcov: Runtime configurable destination output

On 05/19/2016 05:14 PM, Nathan Sidwell wrote: On 05/19/16 15:25, Jeff Law wrote: On 05/19/2016 12:40 PM, Aaron Conole wrote: I'm happy to report that I did send in some FSF paperwork this week. Hopefully it is on record now, but even if it isn't I live a train ride away from the FSF

Re: [PATCH] Fix PR tree-optimization/71170

Hi Richard, > I think it should have the same rank as op or op + 1 which is the current > behavior. Sth else doesn't work correctly here I think, like inserting the > multiplication not near the definition of op. > > Well, the whole "clever insertion" logic is simply flawed. What I meant to say

Re: inhibit the sincos optimization when the target has sin and cos instructions

On 05/19/16 14:42, Cesar Philippidis wrote: + "operands[2] = make_safe_from (operands[2], operands[0]);" Please use { ... } rather than "" for readability. Ok with that change. nathan

PR71206: inconsistent types after match.pd transformation

Hello, this was bootstrapped and regtested on powerpc64le-unknown-linux-gnu. 2016-05-20 Marc Glisse gcc/ * match.pd ((X ^ Y) ^ (X ^ Z)): Convert the arguments. gcc/testsuite/ * gcc.dg/tree-ssa/pr71206.c: New testcase. -- Marc GlisseIndex: gcc/match.pd

Re: [PATCH v2] gcov: Runtime configurable destination output

On 05/19/16 14:40, Aaron Conole wrote: Nathan Sidwell writes: +FILE *__gcov_error_file = NULL; Unless I'm missing something, isn't this only accessed from this file? (So could be static with a non-underbarred name) Ack. I have a vague memory that perhaps the

Re: [PATCH v2] gcov: Runtime configurable destination output

On 05/19/16 15:25, Jeff Law wrote: On 05/19/2016 12:40 PM, Aaron Conole wrote: I'm happy to report that I did send in some FSF paperwork this week. Hopefully it is on record now, but even if it isn't I live a train ride away from the FSF headquarters so I'd be happy to take the time to make

Re: inhibit the sincos optimization when the target has sin and cos instructions

On 05/18/16 23:42, Cesar Philippidis wrote: +(define_expand "sincossf3" + [(set (match_operand:SF 0 "nvptx_register_operand" "=R") +(unspec:SF [(match_operand:SF 2 "nvptx_register_operand" "R")] + UNSPEC_COS)) + (set (match_operand:SF 1 "nvptx_register_operand" "=R") +

Re: [PATCH] Drop excess size used for run time allocated stack variables.

On 05/03/2016 08:17 AM, Dominik Vogt wrote: Version two of the patch including a test case. On Mon, May 02, 2016 at 09:10:25AM -0600, Jeff Law wrote: On 04/29/2016 04:12 PM, Dominik Vogt wrote: The attached patch removes excess stack space allocation with alloca in some situations. Plese

Re: [PATCH 2/3] Implement CALL_EXPR_MUST_TAIL_CALL

On 05/17/2016 04:01 PM, David Malcolm wrote: This patch implements support for marking CALL_EXPRs as being mandatory for tail-call-optimization. expand_call tries harder to perform the optimization on such CALL_EXPRs, and issues an error if it fails. Currently this flag isn't accessible from

Re: Revert gcc r227962

On 5/20/2016 02:11, Jeff Law wrote: > So if we make this change (revert 227962), my understanding is that > cygwin bootstraps will fail because they won't find kernel32 and perhaps > other libraries. > > Jeff > I'll need to double check with trunk but gcc-5.3.0 built OK without it. The other

Re: [ping][patch,openacc] use firstprivate pointers for subarrays in c and c++

Ping. Cesar On 05/10/2016 01:29 PM, Cesar Philippidis wrote: > Pointers are special in OpenACC. Depending on the context, they can > either be treated as a "scalar" or as special firstprivate pointer. This > is in contrast to OpenMP target pointers, which are always treated as > firstprivate

Re: [PATCH, rs6000] Add support for int versions of vec_addec

On Thu, May 19, 2016 at 04:16:53PM -0500, Bill Seurer wrote: > 2016-05-19 Bill Seurer > > * config/rs6000/rs6000-builtin.def (vec_addec): Change vec_addec to a > special case builtin. > * config/rs6000/rs6000-c.c

Re: [PATCH 3/3] function: Restructure *logue insertion

On Thu, May 19, 2016 at 04:00:22PM -0600, Jeff Law wrote: > > * function.c (make_epilogue_seq): Remove epilogue_end parameter. > > (thread_prologue_and_epilogue_insns): Remove bb_flags. Restructure > > code. Ignore sibcalls on EDGE_IGNORE edges. > > * shrink-wrap.c

Re: [PATCH 3/3] function: Restructure *logue insertion

On 05/16/2016 07:09 PM, Segher Boessenkool wrote: This patch restructures how the prologues/epilogues are inserted. Sibcalls that run without prologue are now handled in shrink-wrap.c; it communicates what is already handled by setting the EDGE_IGNORE flag. The try_shrink_wrapping function

Re: [PATCH, libstdc++] Add missing atomic-builtins argument to experimental/memory_resource/1.cc

On 19 May 2016 at 14:05, Thomas Preudhomme wrote: > Hi Jonathan, > > The dg-require-atomic-builtins in experimental/memory_resource/1.cc does not > currently work as intended because it is missing its argument. This patch > fixes > that. Oops. > ChangeLog entry

Re: [PATCH, ARM, 3/3] Add multilib support for bare-metal ARM architectures

Hi! Ping! Attached is a rebased version of my patch due to commit 33ac16c8cc870229a6a08cd7037275b01e7a0b9d *** gcc/ChangeLog *** 2016-04-19 Thomas Preud'homme Jasmin Jessich * config.gcc: Handle bare-metal multilibs in

Re: [PATCH 1/3] Introduce can_implement_as_sibling_call_p

On 05/17/2016 04:01 PM, David Malcolm wrote: This patch moves part of the logic for determining if tail call optimizations are possible to a new helper function. There are no functional changes. expand_call is 1300 lines long, so there's arguably a case for doing this on its own, but this

Re: [PATCH, rs6000] Add support for int versions of vec_addec

Here is an updated patch addressing all of Segher's comments: This patch adds support for the signed and unsigned int versions of the vec_addec altivec builtins from the Power Architecture 64-Bit ELF V2 ABI OpenPOWER ABI for Linux Supplement (16 July 2015 Version 1.1). There are many of the

Re: C++ PATCH to improve dump_decl (PR c++/71075)

OK. On Thu, May 19, 2016 at 4:03 PM, Marek Polacek wrote: > On Thu, May 19, 2016 at 07:55:05PM +0200, Marek Polacek wrote: >> On Thu, May 19, 2016 at 12:55:18PM -0400, Jason Merrill wrote: >> > Well, constants aren't declarations. Why are we calling dump_decl here? >> >> Eh,

Re: [PATCH, vec-tails 01/10] New compiler options

On Thu, 19 May 2016, Ilya Enkovich wrote: > Hi, > > This patch introduces new options used for loop epilogues vectorization. Any patch adding a new option should update invoke.texi (both the summary list of options, and adding documentation for the new option). -- Joseph S. Myers

Re: C++ PATCH to improve dump_decl (PR c++/71075)

On Thu, May 19, 2016 at 07:55:05PM +0200, Marek Polacek wrote: > On Thu, May 19, 2016 at 12:55:18PM -0400, Jason Merrill wrote: > > Well, constants aren't declarations. Why are we calling dump_decl here? > > Eh, not sure what I was thinking... > > We call dump_decl because

[PATCH, vec-tails 07/10] Support loop epilogue combining

Hi, This patch introduces support for loop epilogue combining. This includes support in cost estimation and all required changes required to mask vectorized loop. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * dbgcnt.def (vect_tail_combine): New. *

[PATCH, vec-tails 09/10] Print more info about vectorized loop

Hi, This patch extends dumps for vectorized loops to provide more info about them and also specify used vector size. This is to be used for tests. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * tree-vect-loop.c (vect_transform_loop): Print more info

[PATCH, vec-tails 08/10] Support loop epilogue masking and low trip count loop vectorization

Hi, This patch enables vectorization of loop epilogues and low trip count loops using masking. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * dbgcnt.def (vect_tail_mask): New. * tree-vect-loop.c (vect_analyze_loop_2): Support masked loop

[PATCH, vec-tails 06/10] Mark the first vector store generated for a scalar store

Hi, This patch STMT_VINFO_FIRST_COPY_P field to statement vec info. This is used to find the first vector store generated for a scalar one. For other statements I use original scalar statement to find the first and following vector statement. For stores original scalar statement is removed and

[PATCH, vec-tails 05/10] Check if loop can be masked

Hi, This patch introduces analysis to determine if loop can be masked (compute LOOP_VINFO_CAN_BE_MASKED and LOOP_VINFO_REQUIRED_MASKS) and compute how much masking costs. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * tree-vect-loop.c: Include insn-config.h

Re: [PATCH] c/71115 - Missing warning: excess elements in struct initializer

On 05/18/2016 06:12 PM, Martin Sebor wrote: The bug points out that the following and similar invalid uses of NULL are not diagnosed. #include const char* a[1] = { "", NULL }; The attached patch implements the suggestion on the Diagnostics Guidelines Wiki to call

[PATCH, vec-tails 04/10] Add masking cost

Hi, This patch extends vectorizer cost model to include masking cost by adding new cost model locations and new target hook to compute masking cost. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * config/i386/i386.c (ix86_init_cost): Extend costs array.

[PATCH, vec-tails 03/10] Support epilogues vectorization with no masking

Hi, This patch introduces changes required to run vectorizer on loop epilogue. This also enables epilogue vectorization using a vector of smaller size. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * tree-if-conv.c (tree_if_conversion): Make public.

[PATCH, vec-tails 02/10] Extend _loop_vec_info structure with epilogue related fields

Hi, This patch adds new fields to _loop_vec_info structure to support loop epilogue vectorization. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * tree-vectorizer.h (struct _loop_vec_info): Add new fields can_be_masked, required_masks, mask_epilogue,

[PATCH, vec-tails 01/10] New compiler options

Hi, This patch introduces new options used for loop epilogues vectorization. Thanks, Ilya -- gcc/ 2016-05-19 Ilya Enkovich * common.opt (flag_tree_vectorize_epilogues): New. (ftree-vectorize-short-loops): New. (ftree-vectorize-epilogues=):

[RFC][PATCH, vec-tails 00/10] Support vectorization of loop epilogues

Hi, This series is an extension of previous work on loop epilogue combining [1]. It introduces three ways to handle vectorized loop epilogues: combine it with vectorized loop, vectorize it with masks, vectorize it using a smaller vector size. Also it supports vectorization of loops with low

Re: [PATCH v2] gcov: Runtime configurable destination output

On 05/19/2016 12:40 PM, Aaron Conole wrote: Nathan Sidwell writes: On 02/24/16 16:52, Aaron Conole wrote: The previous gcov behavior was to always output errors on the stderr channel. This is fine for most uses, but some programs will require stderr to be untouched by libgcov

Re: New C++ PATCH for c++/10200 et al

On 05/18/2016 01:42 PM, Jason Merrill wrote: On 05/13/2016 03:17 PM, Jason Merrill wrote: On 02/16/2016 07:49 PM, Jason Merrill wrote: Clearly the DR 141 change is requiring much larger adjustments in the rest of the compiler than I'm comfortable making at this point in the GCC 6 schedule, so

Re: [patch] Allow configuration with --disable-sjlj-exceptions on biarch x86 Windows targets

Ok. I just looked into patch. Sorry for the delay. As it is still possible to build old behavior, the patch is ok for me. Thanks, Kai 2016-05-19 20:55 GMT+02:00 Sandra Loosemore : > On 05/19/2016 12:40 PM, Kai Tietz wrote: >> >> Hi, >> >> hopefully this time gmail

Re: [patch] Allow configuration with --disable-sjlj-exceptions on biarch x86 Windows targets

On 05/19/2016 12:55 PM, Sandra Loosemore wrote: On 05/19/2016 12:40 PM, Kai Tietz wrote: Hi, hopefully this time gmail uses mail-encoding elmz ask for ... Sorry to object here. I would like to point out that defaulting to dw2 on 32-bit if SEH is used for 64-bit is nothing good in general.

Re: [patch] Allow configuration with --disable-sjlj-exceptions on biarch x86 Windows targets

On 05/19/2016 12:40 PM, Kai Tietz wrote: Hi, hopefully this time gmail uses mail-encoding elmz ask for ... Sorry to object here. I would like to point out that defaulting to dw2 on 32-bit if SEH is used for 64-bit is nothing good in general. This is reasoned by the problems existing in dw2

Re: inhibit the sincos optimization when the target has sin and cos instructions

On 05/19/2016 04:29 AM, Alexander Monakov wrote: > On Wed, 18 May 2016, Cesar Philippidis wrote: > Note that the documentation suggests using 'make_safe_from' to concisely > express conflict resolution: > >> diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md >> index

Re: [PATCH 1/9] Change ENABLE_VALGRIND_CHECKING to ENABLE_VALGRIND_ANNOTATIONS guard.

On 05/19/2016 04:43 AM, marxin wrote: Following change is very similar to what I did in: https://gcc.gnu.org/ml/gcc-patches/2016-01/msg02103.html It's more logical to encapsulate valgrind annotation magic within a ENABLE_VALGRIND_ANNOTATIONS macro rather than ENABLE_VALGRIND_CHECKING.

Re: [PATCH v2] gcov: Runtime configurable destination output

Nathan Sidwell writes: > On 02/24/16 16:52, Aaron Conole wrote: >> The previous gcov behavior was to always output errors on the stderr channel. >> This is fine for most uses, but some programs will require stderr to be >> untouched by libgcov for certain tests. This change

Re: [patch] Allow configuration with --disable-sjlj-exceptions on biarch x86 Windows targets

Hi, hopefully this time gmail uses mail-encoding elmz ask for ... Sorry to object here. I would like to point out that defaulting to dw2 on 32-bit if SEH is used for 64-bit is nothing good in general. This is reasoned by the problems existing in dw2 in combination with other compiler-generated

Re: [RFC] Type promotion pass and elimination of zext/sext

On 05/15/2016 06:45 PM, Kugan Vivekanandarajah wrote: Hi Richard, Now that stage1 is open, I would like to get the type promotion passes reviewed again. I have tested the patches on aarch64, x86-64, and ppc64le without any new execution failures. There some test-cases that fails for patterns. I

Re: Revert gcc r227962

On 02/27/2016 03:39 AM, JonY wrote: On 2/27/2016 05:26, Jeff Law wrote: On 02/26/2016 04:04 AM, JonY wrote: Hi, I've submitted a patch that was committed as r227962, it causes some unintended side effects (namely libuuid on Cygwin). Can someone please revert? Kai still needs some time to

Re: [JAVA PATCH] Builtin support for popcount* and bswap* functions

On 02/22/2016 11:13 AM, ro...@nextmovesoftware.com wrote: The following patch provides builtin support for byte swapping and bit counting. On suitable hardware, these generate the x86 popcount instructions, as also generated by the SUN HotSpot JIT/JVM for these method calls.

Re: [patch] Allow configuration with --disable-sjlj-exceptions on biarch x86 Windows targets

On 05/19/2016 11:36 AM, Sandra Loosemore wrote: This is a slightly revised version of the WIP patch against GCC 5.1 I previously posted here: https://gcc.gnu.org/ml/gcc/2016-05/msg00135.html To recap, I needed a biarch x86_64 mingw-w64 target compiler that uses DWARF-2 exception handling in

Re: [cilkplus] Fix precompiled header bug (PR cilkplus/70865)

On 05/19/2016 11:58 AM, Ryan Burn wrote: The file cilk.h defines the memory managed cilk_trees variable, but fails to include the header in the GTFILES list. When a precompiled header is loaded, the array is then not properly restored and points to garbage memory, causing a segfault. This patch

MAINTAINERS update

Spurred by the lack of response to Sandra's message WRT a cygwin/mingw issue, I did a quick pass through the MAINTAINERS file for folks that are listed as maintainers, but aren't (to the best of my knowledge) acting in those positions anymore. I removed their names from the maintainers

[cilkplus] Fix precompiled header bug (PR cilkplus/70865)

The file cilk.h defines the memory managed cilk_trees variable, but fails to include the header in the GTFILES list. When a precompiled header is loaded, the array is then not properly restored and points to garbage memory, causing a segfault. This patch fixes the problem by adding the cilk files

Re: C++ PATCH to improve dump_decl (PR c++/71075)

On Thu, May 19, 2016 at 12:55:18PM -0400, Jason Merrill wrote: > Well, constants aren't declarations. Why are we calling dump_decl here? Eh, not sure what I was thinking... We call dump_decl because unify_template_argument_mismatch has %qD: inform (input_location, " template

[patch] Allow configuration with --disable-sjlj-exceptions on biarch x86 Windows targets

This is a slightly revised version of the WIP patch against GCC 5.1 I previously posted here: https://gcc.gnu.org/ml/gcc/2016-05/msg00135.html To recap, I needed a biarch x86_64 mingw-w64 target compiler that uses DWARF-2 exception handling in 32-bit mode (for compatibility with an older

Re: [PATCH 9/17][ARM] Add NEON FP16 arithmetic instructions.

On Thu, 19 May 2016, Jiong Wang wrote: > Then, > > * if we add scalar HF mode to standard patterns, vector HF modes operation > will be > turned into scalar HF operations instead of scalar SF operations. > > * if we add vector HF mode to standard patterns, vector HF modes operations >

Re: [PATCH] PR c/71171: Fix uninitialized source_range in c_parser_postfix_expression

On 05/18/2016 07:08 PM, David Malcolm wrote: PR c/71171 reports yet another instance of the src_range of a c_expr being used without initialization. Investigation shows that this was due to error-handling, where the "value" field of a c_expr is set to error_mark_node without touching the

Re: [PATCH 2/3] function: Factor out make_*logue_seq

On 05/19/2016 01:16 AM, Jakub Jelinek wrote: On Wed, May 18, 2016 at 05:13:25PM -0500, Segher Boessenkool wrote: On Wed, May 18, 2016 at 01:35:16PM -0500, Segher Boessenkool wrote: On Wed, May 18, 2016 at 11:20:29AM -0700, H.J. Lu wrote: * function.c (make_split_prologue_seq,

Re: [PATCH, rtl-optimization]: Fix TRAP_IF dependencies by forcing pending loads to memory

On 05/19/2016 11:02 AM, Uros Bizjak wrote: Hello! I was looking at recent g++.dg/ext/sync-4.C testsuite FAILure on alpha-linux-gnu. The testcase installs SIGSEGV handler and among other tests, it does various tests with atomic operations on NULL addresses. One test (f19): FN(19, void,

Re: [PATCH v3] Take known zero bits into account when checking extraction.

On 05/19/2016 05:18 AM, Dominik Vogt wrote: On Mon, May 16, 2016 at 01:09:36PM -0600, Jeff Law wrote: > On 05/11/2016 02:52 AM, Dominik Vogt wrote: > >On Wed, May 11, 2016 at 10:40:11AM +0200, Bernd Schmidt wrote: > >That's what I mentioned somewhere during the discussion. The s390 > >backend

[PATCH, rtl-optimization]: Fix TRAP_IF dependencies by forcing pending loads to memory

Hello! I was looking at recent g++.dg/ext/sync-4.C testsuite FAILure on alpha-linux-gnu. The testcase installs SIGSEGV handler and among other tests, it does various tests with atomic operations on NULL addresses. One test (f19): FN(19, void, (__atomic_exchange((ditype*)p, (ditype*)0,

Re: [PATCH, libgcc/ARM 1/6, ping1] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

On 19/05/16 17:55, Thomas Preudhomme wrote: On Thursday 19 May 2016 17:42:26 Kyrill Tkachov wrote: Hi Thomas, I'm not very familiar with the libgcc machinery, but I have a comment on an arm.h hunk inline. On 17/05/16 10:58, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-13

Re: [PATCH 9/17][ARM] Add NEON FP16 arithmetic instructions.

On 18/05/16 01:58, Joseph Myers wrote: On Tue, 17 May 2016, Matthew Wahab wrote: As with the VFP FP16 arithmetic instructions, operations on __fp16 values are done by conversion to single-precision. Any new optimization supported by the instruction descriptions can only apply to code

Re: [PATCH, ARM 2/7, ping1] Add support for ARMv8-M

Hi Thomas, On 17/05/16 11:08, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-23 Thomas Preud'homme * config/arm/arm-arches.def (armv8-m.base): Define new architecture. (armv8-m.main): Likewise. (armv8-m.main+dsp):

Re: [PATCH, libgcc/ARM 1/6, ping1] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

On Thursday 19 May 2016 17:42:26 Kyrill Tkachov wrote: > Hi Thomas, > > I'm not very familiar with the libgcc machinery, but I have a comment on an > arm.h hunk inline. > On 17/05/16 10:58, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-11-13 Thomas Preud'homme

Re: C++ PATCH to improve dump_decl (PR c++/71075)

Well, constants aren't declarations. Why are we calling dump_decl here? Jason

Re: [PATCH, ARM 7/7, ping1] Enable atomics for ARMv8-M Mainline

On Thursday 19 May 2016 17:18:29 Kyrill Tkachov wrote: > Hi Thomas, > > On 17/05/16 11:15, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-12-17 Thomas Preud'homme > > > > * config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for

C++ PATCH to improve dump_decl (PR c++/71075)

This PR compains about ugly diagnostics where we print template argument '2' does not match '#'integer_cst' not supported by dump_decl#' The following patch teaches dump_decl how to print constants properly. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-05-19 Marek Polacek

Re: [PATCH, libgcc/ARM 1/6, ping1] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

Hi Thomas, I'm not very familiar with the libgcc machinery, but I have a comment on an arm.h hunk inline. On 17/05/16 10:58, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-13 Thomas Preud'homme * config/arm/elf.h: Use

Re: [C++ PATCH] PR c++/69855

On 05/05/2016 09:11 AM, Ville Voutilainen wrote: On 5 May 2016 at 13:36, Paolo Carlini wrote: .. minor nit: the new testcase has a number of trailing blank lines. New patch attached. :) Sorry for the delay. Please use ".diff" for patches so that they are properly

Re: [Patch ARM/AArch64 11/11] Add missing tests for vreinterpret, operating of fp16 type.

On 11/05/16 14:24, Christophe Lyon wrote: 2016-05-04 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add fp16 tests. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise. *

Re: [Patch ARM/AArch64 10/11] Add missing tests for intrinsics operating on poly64 and poly128 types.

On 13/05/16 16:16, James Greenhalgh wrote: On Wed, May 11, 2016 at 03:24:00PM +0200, Christophe Lyon wrote: 2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (result): Add poly64x1_t and poly64x2_t cases if

Re: [Patch ARM/AArch64 09/11] Add missing vrnd{,a,m,n,p,x} tests.

Hi Christophe, On 11/05/16 14:23, Christophe Lyon wrote: 2016-05-02 Christophe Lyon * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c: New. * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc: New. *

Re: [Patch ARM/AArch64 08/11] Add missing vstX_lane fp16 tests.

On 11/05/16 14:23, Christophe Lyon wrote: 2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Add fp16 tests. Ok. Thanks, Kyrill Change-Id: I64e30bc30a9a9cc5c47eff212e7d745bf3230fe7 diff --git

Re: [PATCH, ARM 7/7, ping1] Enable atomics for ARMv8-M Mainline

Hi Thomas, On 17/05/16 11:15, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-12-17 Thomas Preud'homme * config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for ARMv8-M Mainline. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index

Re: [PATCH, ARM 5/7, ping1] Add support for MOVT/MOVW to ARMv8-M Baseline

On Wednesday 18 May 2016 12:30:41 Kyrill Tkachov wrote: > Hi Thomas, > > This looks mostly good with a few nits inline. > Please repost with the comments addressed. Updated ChangeLog entries: *** gcc/ChangeLog *** 2016-05-18 Thomas Preud'homme *

Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks

On Wednesday 18 May 2016 11:47:47 Kyrill Tkachov wrote: > Hi Thomas, Hi Kyrill, Please find below the updated patch and associated ChangeLog entry. *** gcc/ChangeLog *** 2016-05-18 Thomas Preud'homme * config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW

Re: [PING][PATCH] New plugin event when evaluating a constexpr call

On 05/06/2016 10:23 AM, Andres Tiraboschi wrote: +static tree +eval_call_plugin_callback (const constexpr_ctx *ctx, tree fun, + bool lval, bool *non_constant_p, bool *overflow_p) This function needs a comment. -static void +void cxx_bind_parameters_in_call (const

Re: [PATCH] Fix PR c++/70822 (bogus error with parenthesized SCOPE_REF)

OK. Jason

Make do_loop use estimated_num_iterations/expected_num_iterations

Hi, this patch makes doloop_optimize to use the get_estimated_loop_iterations_int/get_max_loop_iterations_int instead of weakter check for const_iter. Bootstrapped/regtested x86_64-linux, OK? Honza * loop-doloop.c (doloop_optimize): Use get_estimated_loop_iterations_int and

Re: C PATCH to add -Wswitch-unreachable (PR c/49859)

Why implement this in the front end rather than at the gimple level? Jason On Tue, May 10, 2016 at 2:19 PM, Marek Polacek wrote: > Over the years, we got several PRs that suggested to add a warning that would > warn about unreachable statements between `switch (cond)' and

Make vectorizer to use max_loop_iterations_int

Hi, this patch makes vect_analyze_loop_2 to give up on loops with low max iteration counts (instead of only considering estimated_stmt_executions_int). This change was eaerlier approved by Richi in stage4 and reverted. I got wrong the testm instead == -1 there was != -1 and thus the regressions.

Re: C PATCH to add -Wswitch-unreachable (PR c/49859)

Any comments on this patch? Should I pursue the C++ part? On Tue, May 10, 2016 at 08:19:29PM +0200, Marek Polacek wrote: > Over the years, we got several PRs that suggested to add a warning that would > warn about unreachable statements between `switch (cond)' and the first case. > In some cases

Re: [PATCH], PR 71201, Fix xxperm on PowerPC ISA 3.0, add vpermr/xxpermr support

On Thu, May 19, 2016 at 10:53:41AM -0400, Michael Meissner wrote: > GCC 6.1 added support for the XXPERM instruction for the PowerPC ISA 3.0. The > XXPERM instruction is essentially a 4 operand instruction, with only 3 > operands > in the instruction (the target register overlaps with the first

Re: [PATCH] Assuage ICE in VRP with [1, X] + UINT_MAX (PR tree-optimization/71031)

On May 19, 2016 5:14:24 PM GMT+02:00, Marek Polacek wrote: >On Thu, May 19, 2016 at 03:54:05PM +0200, Richard Biener wrote: >> On Thu, 19 May 2016, Marek Polacek wrote: >> >> > Since Bin's changes to the niter analysis in r231097, we find >ourselves in >> > a situation where

[PATCH][wwwdocs] Improve arm and aarch64-related info in readings.html

Hi all, I noticed that we have a readings.html page that has pointers to documentation of various backends that GCC supports. The info on arm seems a bit out of date and somewhat confusing, and there is no entry for aarch64. This patch tries to address that. The arm entry is updated to not

Re: [PATCH][RFC] Introduce BIT_FIELD_INSERT

> Index: trunk/gcc/tree.def > === > *** trunk.orig/gcc/tree.def 2016-05-17 17:19:41.783958489 +0200 > --- trunk/gcc/tree.def2016-05-19 10:23:35.779141973 +0200 > *** DEFTREECODE (ADDR_EXPR, "addr_expr", tcc > ***

Re: [PATCH] Assuage ICE in VRP with [1, X] + UINT_MAX (PR tree-optimization/71031)

On Thu, May 19, 2016 at 03:54:05PM +0200, Richard Biener wrote: > On Thu, 19 May 2016, Marek Polacek wrote: > > > Since Bin's changes to the niter analysis in r231097, we find ourselves in > > a situation where extract_range_from_binary_expr is given [1, od_5] + > > UINT_MAX > > on type

[PATCH, libstdc++] Add missing atomic-builtins argument to experimental/memory_resource/1.cc

Hi Jonathan, The dg-require-atomic-builtins in experimental/memory_resource/1.cc does not currently work as intended because it is missing its argument. This patch fixes that. ChangeLog entry is as follows: *** libstdc++-v3/ChangeLog *** 2016-05-18 Thomas Preud'homme

Re: [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.

On 18/05/16 16:20, Joseph Myers wrote: On Wed, 18 May 2016, Matthew Wahab wrote: AArch64 follows IEEE-754 but ARM (AArch32) adds restrictions like flush-to-zero that could affect the outcome of a calculation. The result of a float computation on two values immediately promoted from fp16

[PATCH], PR 71201, Fix xxperm on PowerPC ISA 3.0, add vpermr/xxpermr support

GCC 6.1 added support for the XXPERM instruction for the PowerPC ISA 3.0. The XXPERM instruction is essentially a 4 operand instruction, with only 3 operands in the instruction (the target register overlaps with the first input register). The Power9 hardware has fusion support where if the

Re: [PATCH][CilkPlus] Allow parenthesized initialization in for-loops

On 05/10/2016 03:28 PM, Ilya Verbin wrote: What about (some_class i { 0 }; some_class < ...; some_class++) and similar syntax? It's allowed, thanks, I missed this in the initial patch. The testsuite coverage is insufficient (nothing e.g. tests templates or #pragma simd). Patch is updated.

Re: [PR 70646] Store size to inlining predicate conditions

Hi, On Wed, May 18, 2016 at 12:19:11PM +0200, jh wrote: > Dne 2016-05-11 17:45, Martin Jambor napsal: > > Hi, > > > > > > 2016-04-20 Martin Jambor > > > > PR ipa/70646 > > * ipa-inline.h (condition): New field size. > > * ipa-inline-analysis.c (add_condition):

[PATCH] Speed up if-cvt

This avoids re-computing BB predicates. The more interesting job will be to avoid re-computing post dominators (for the whole function) all the time. Bootstrap / regtest running on x86_64-unknown-linux-gnu. Richard. 2016-05-19 Richard Biener * tree-if-conv.c

Re: [C++ Patch/RFC] PR 70572 ("[4.9/5/6/7 Regression] ICE on code with decltype (auto) on x86_64-linux-gnu in digest_init_r")

On 05/18/2016 07:13 PM, Paolo Carlini wrote: + error ("cannot declare variable %q+D with function type", decl); I think the error message would be more helpful if it mentioned decltype(auto), maybe "initializer for % has function type, did you forget the

Re: [PATCH] Assuage ICE in VRP with [1, X] + UINT_MAX (PR tree-optimization/71031)

On Thu, 19 May 2016, Marek Polacek wrote: > Since Bin's changes to the niter analysis in r231097, we find ourselves in > a situation where extract_range_from_binary_expr is given [1, od_5] + UINT_MAX > on type unsigned. We combine the lower bounds, which is 1 + UINT_MAX = > 0(OVF). > We then

Re: [PATCH][ARM] Fix costing of sign-extending load in rtx costs

On 27/04/16 15:13, Kyrill Tkachov wrote: > Hi all, > > Another costs issue that came out of the investigation for PR 65932 is that > sign-extending loads get a higher cost than they should in the arm backend. > The problem is that when handling a sign-extend of a MEM we add the cost > of the

[PATCH] Assuage ICE in VRP with [1, X] + UINT_MAX (PR tree-optimization/71031)

Since Bin's changes to the niter analysis in r231097, we find ourselves in a situation where extract_range_from_binary_expr is given [1, od_5] + UINT_MAX on type unsigned. We combine the lower bounds, which is 1 + UINT_MAX = 0(OVF). We then combine the upper bounds, because the max_op0 is not a

Re: [PATCH] PR c++/71184: Fix NULL dereference in cp_parser_operator

On 05/18/2016 08:59 PM, David Malcolm wrote: + cp_token *close_token = + cp_parser_require (parser, CPP_CLOSE_SQUARE, RT_CLOSE_SQUARE); + if (close_token) + end_loc = close_token->location; You could combine these into if (cp_token *close_token

Re: [PATCH][ARM] PR target/71056: Don't use vectorized builtins when NEON is not available

On 11/05/16 15:32, Kyrill Tkachov wrote: > Hi all, > > In this PR a NEON builtin is introduced during SLP vectorisation even when > NEON is not available > because arm_builtin_vectorized_function is missing an appropriate check in > the BSWAP handling code. > > Then during expand when we try

Re: [PATCH 0/3] Support for mandatory tail calls

On Thu, May 19, 2016 at 9:28 AM, Richard Biener wrote: > On Thu, May 19, 2016 at 3:19 PM, Jason Merrill wrote: >> On Thu, May 19, 2016 at 12:30 AM, Basile Starynkevitch >> wrote: >>> On 05/19/2016 12:12 AM, Jeff Law wrote:

Re: [PATCH] c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

On 05/18/2016 09:40 PM, Martin Sebor wrote: The handling of flexible array members whose element type was dependent tried to deal with the case when the element type was not yet completed but it did it wrong. The attached patch corrects the handling by trying to complete the element type first.

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