Re: [Driver] Add support for -fuse-ld=lld

+ HJ who wrote the code for the option originally. On Thu, Jun 23, 2016 at 9:01 PM, Davide Italiano wrote: > LLVM currently ships with a new ELF linker http://lld.llvm.org/. > I experiment a lot with gcc and lld so it would be nice if > -fuse-ld=lld is supported

[Driver] Add support for -fuse-ld=lld

LLVM currently ships with a new ELF linker http://lld.llvm.org/. I experiment a lot with gcc and lld so it would be nice if -fuse-ld=lld is supported (considering the linker is now mature enough to link large C/C++ applications). Also, IMHO, -fuse-ld should be a generic facility which accept

[PATCHv2q, rs6000] Add minimum __float128 built-in support required for glib

Hi, Once more with feeling... I've revised my v2 patch to rename the functions to __builtin_q rather than __builtin_f128 to avoid the collision with Joseph's work. I've also corrected the formatting problems that Segher noted with my previous attempt. Bootstrapped and tested on

Re: [PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

> > On Jun 23, 2016, at 5:41 PM, Joseph Myers wrote: > > On Thu, 23 Jun 2016, Bill Schmidt wrote: > >> After discussing with the glibc folks, I'd like to propose that this patch >> be altered to use the 'q' suffix for the builtin names. That way we won't >> have a

Re: [PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

Thanks, I'll make these changes and re-spin. Not sure what was up with my tabs... > On Jun 23, 2016, at 6:49 PM, Segher Boessenkool > wrote: > > Hi Bill, > > Some little things about the patch... > > On Thu, Jun 23, 2016 at 04:44:27PM -0500, Bill Schmidt wrote:

[PATCH] Enable non-PIC noplt tests on 32-bit x86 target

Since non-PIC noplt works on 32-bit x86 target now with assembler/linker support, enable non-PIC noplt tests on 32-bit x86 target. main in noplt-2.c and noplt-4.c are renamed to bar to avoid stack re-alignment in main for 32-bit target, which disables tailcall optimization. Tested on x86. OK

Re: [PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

Hi Bill, Some little things about the patch... On Thu, Jun 23, 2016 at 04:44:27PM -0500, Bill Schmidt wrote: > We no longer have a half-clever implementation to construct an infinity > inside vector registers, or the full-clever one that Segher proposed in > response. :) We can try to add that

Re: [PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

On Thu, 23 Jun 2016, Bill Schmidt wrote: > After discussing with the glibc folks, I'd like to propose that this patch > be altered to use the 'q' suffix for the builtin names. That way we won't > have a naming conflict with Joseph's patch in the short term, and we'll > be able to stage the

[PATCH], Add PowerPC ISA 3.0 lxsihzx, lxsibzx, stxsihx, stxsibx support

PowerPC ISA 3.0 adds new instructions (LXSIHZX, LXSIBZX, STXSIHX, and STXSIBX) that allow you to load and zero extend byte and half word values from memory and to store them back. This patch is similar in spirit to the patch I wrote years ago for power7 that generates LFIWAX, LFIWZX, and STFIWX

Re: [PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

After discussing with the glibc folks, I'd like to propose that this patch be altered to use the 'q' suffix for the builtin names. That way we won't have a naming conflict with Joseph's patch in the short term, and we'll be able to stage the movement on trunk to the f128 support. I've been

Re: [PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

So, I wasn't quite clear here... this is what I want to be able to put in 6.2. Normally we would put it upstream in trunk for burn-in, and then backport after a bit. Unfortunately we are going to have a naming conflict with Joseph's patch to add the _Floatn, etc., builtin support. So we can't

[PATCHv2, rs6000] Add minimum __float128 built-in support required for glibc

Hi, This is a revision of my previous patch, correcting two issues. The inff128 and huge_valf128 builtins now participate in folding so they are suitable for use in static initializers, and the new builtins are now documented. We no longer have a half-clever implementation to construct an

Re: [PATCH] c++/60760 - arithmetic on null pointers should not be allowed in constant expressions

On 06/20/2016 10:17 PM, Martin Sebor wrote: + && tree_int_cst_equal (lhs, null_pointer_node) + && !tree_int_cst_equal (rhs, integer_zero_node)) Not integer_zerop? + "invalid conversion involving a null pointer"); ... + "invalid

Re: [PATCH] Reject boolean/enum types in last arg of __builtin_*_overflow_p (take 2)

I thought I already approved that patch. If not, consider this approval. Jason On Wed, Jun 22, 2016 at 12:34 AM, Jeff Law wrote: > On 06/15/2016 05:47 AM, Jakub Jelinek wrote: >> >> On Tue, Jun 14, 2016 at 11:13:28AM -0600, Martin Sebor wrote: Here is an untested

Re: [PATCH, PR71602] Give error for invalid va_list argument to va_arg

On Thu, Jun 23, 2016 at 1:27 PM, Tom de Vries wrote: > Hi, > > this patch fixes PR71602, a 6/7 regression. > > Consider this test-case: > ... > __builtin_va_list *pap; > > void > fn1 (void) > { > __builtin_va_arg(pap, double); > } > ... > > The testcase is invalid,

Fix zero size debug array swap noexcept qualification

Debug mode array had simply been forgotten when fixing zero-size swap method as part of swappable traits implementation. * include/debug/array (array<>::swap): Fix noexcept qualificaton for zero-size array. Tested under Linux x86_64 debug mode. François Index:

[PATCH, testsuite]: Use dg-additional-flags in vect testsuite

Hello! 2016-06-23 Uros Bizjak * g++.dg/vect/pr33834_2.cc: Use dg-additional-options instead of dg-options and remove default vector testsuite compile flags. * g++.dg/vect/pr33860a.cc: Ditto. * g++.dg/vect/pr45470-a.cc: Ditto. * g++.dg/vect/pr45470-b.cc:

RFC (attributes): PATCH for c++/50800 to set affects_type_identity for may_alias

My earlier patch for 50800 fixed the ICE by consistently stripping non-mangled attributes from template arguments, and mangling those that affect type identity. At the C++ meeting this week someone pointed out to me that this is a real problem for x86 vector code, which relies on may_alias

[RFT PATCH, i386]: Use options for 32bit targets when checking for 32bit as/ld features

Hello! This patch uses options for 32bit targets when checking for 32bit as/ld features. The patch also groups together these tests, so they can reuse a couple of option variables. 2016-06-23 Uros Bizjak * configure.ac (HAVE_AS_GOTOF_IN_DATA): Use $as_ix86_gas_32_opt

Re: [Patch, avr] Fix PR 71151

On Jun 23, 2016, at 9:16 AM, Georg-Johann Lay wrote: > Maybe even check during configure whether an appropriate version of > Binutils is used? >> That would be nice, but is it ok to add target specific conditions to >> configure.ac? > > We already have avr-specific tests

Re: move increase_alignment from simple to regular ipa pass

On 17 June 2016 at 19:52, Prathamesh Kulkarni wrote: > On 14 June 2016 at 18:31, Prathamesh Kulkarni > wrote: >> On 13 June 2016 at 16:13, Jan Hubicka wrote: diff --git a/gcc/cgraph.h b/gcc/cgraph.h index

Add minimal _FloatN, _FloatNx built-in functions

This patch, relative to a tree with (pending review) applied, adds a minimal set of built-in functions for the new _FloatN and _FloatNx types. The functions added are __builtin_fabs*, __builtin_copysign*, __builtin_huge_val*,

[PATCH, testsuite]: Skip PR71488 testcases for non-sse4 targets

2016-06-23 Uros Bizjak PR tree-optimization/71488 * gcc.target/i386/i386.exp (check_effective_target_sse4): Move to ... * lib/target-supports.exp: ... here. (check_sse4_hw_available): New procedure. (check_effective_target_sse4_runtime): Ditto. *

Re: [PING^5][PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

Ping. On 08/06/16 15:35, Andre Vieira (lists) wrote: > Ping. > > On 19/05/16 11:19, Andre Vieira (lists) wrote: >> Ping for GCC-7, patch applies cleanly, passed make check for cortex-m0. >> >> Might be worth mentioning that this patch has been used in three >> releases of the GNU ARM embedded

[PATCH] Fix big-endian bswap

This patch fixes a bug in the bswap pass. In big-endian BIT_FIELD_REF uses big-endian bit numbering so we need to adjust the bit position. The existing version could potentially generate incorrect code however GCC doesn't emit a BIT_FIELD_REF to access the low byte in a register, so the symbolic

Re: [PATCH] i386: Access external function via GOT slot for -fno-plt

On Thu, Jun 23, 2016 at 9:23 AM, Uros Bizjak wrote: > On Thu, Jun 23, 2016 at 6:08 PM, H.J. Lu wrote: > >> Here is the updated patch. OK for trunk? >> >> PR target/66232 >> PR target/67400 >> * configure.ac (as_ix86_tls_ldm_opt): Renamed to ... >>

Re: [PATCH] i386: Access external function via GOT slot for -fno-plt

On Thu, Jun 23, 2016 at 6:08 PM, H.J. Lu wrote: > Here is the updated patch. OK for trunk? > > PR target/66232 > PR target/67400 > * configure.ac (as_ix86_tls_ldm_opt): Renamed to ... > (as_ix86_gas_opt): This. > (ld_ix86_tls_ldm_opt): Renamed to ... > (ld_ix86_gld_opt):

Re: [Patch, avr] Fix PR 71151

Senthil Kumar Selvaraj schrieb: Georg-Johann Lay writes: Senthil Kumar Selvaraj schrieb: Senthil Kumar Selvaraj writes: Georg-Johann Lay writes: Senthil Kumar Selvaraj schrieb: Hi, [set JUMP_TABLES_IN_TEXT_SECTION to 1] I added tests that use linker relaxation and discovered a

Re: [PATCH] i386: Access external function via GOT slot for -fno-plt

On Thu, Jun 23, 2016 at 5:33 AM, Uros Bizjak wrote: > On Thu, Jun 23, 2016 at 1:45 PM, H.J. Lu wrote: >> i386 psABI has been updated to clarify that R_386_GOT32X and R_386_GOT32 >> relocations can be used to access GOT without base register when PIC is >>

Re: [PATCH,openacc] check for compatible loop parallelism with acc routine calls

On 06/17/2016 07:42 AM, Jakub Jelinek wrote: > On Wed, Jun 15, 2016 at 08:12:15PM -0700, Cesar Philippidis wrote: >> The second set of changes involves teaching the gimplifier to error when >> it detects a function call to an non-acc routines inside an OpenACC >> offloaded region. Actually, I

Re: IRA costs tweaks, PR 56069

On 04/27/2016 05:33 AM, Bernd Schmidt wrote: On 04/27/2016 06:02 AM, Jeff Law wrote: AFAICT the sra-1.c expects to see the incremented value and I'm at a loss to understand what's really going on here. Can you give more details? Yeah, maybe my first impression wasn't very accurate. When I

Re: [PATCH v2] Allocate constant size dynamic stack space in the prologue

Third version of the patch. Changes: * Corrected a typo in a test case comment. * Verify that stack variable alignment does not force the frame pointer into existence (with -fomit-frame-pointer) The test should hopefully run on all targets. Tested on s390, s390x biarch, x86_64. The only

[RFC] __atomic_compare_exchange* optimizations (PR middle-end/66867)

Hi! This PR is about 2 issues with the *atomic_compare_exchange* APIs, which didn't exist with __sync_*_compare_and_swap: 1) the APIs make the expected argument addressable, although it is very common it is an automatic variable that is addressable only because of these APIs 2) for the fear

Re: [PATCH] Handle undefined extern vars in output_in_order

Hi, I've discovered that this assert in my patch was too restrictive: + if (DECL_HAS_VALUE_EXPR_P (pv->decl)) + { + gcc_checking_assert (lookup_attribute ("omp declare target link", +DECL_ATTRIBUTES (pv->decl))); Testing for the

[PATCH 1/3] Add gcc-auto-profile script

From: ak Using autofdo is currently something difficult. It requires using the model specific branches taken event, which differs on different CPUs. The example shown in the manual requires a special patched version of perf that is non standard, and also

Committed version of autofdo testing patches

I committed the autofdo bootstrap and testing patches now. I did some small changes to the patchkit, so I'm reposting the final committed version: - Addressed Jeff's comments - Fixed the grep code in the scripts - Unsupported tooling is now reported as unsupported - Unified tree bootstrap is

[PATCH 2/3] Run profile feedback tests with autofdo

From: ak Extend the existing bprob and tree-prof tests to also run with autofdo. The test runtimes are really a bit too short for autofdo, but it's a reasonable sanity check. This only works natively for now. dejagnu doesn't seem to support a wrapper

Re: [PATCH] Print column numbers in inclusion trace consistently.

On Tue, 2016-06-21 at 21:09 -0600, Jeff Law wrote: > On 06/03/2016 05:24 AM, Marcin Baczyński wrote: > > Hi, > > the patch below fixes PR/42014. Although the fix itself seems easy > > enough, > > I have a problem with the test. Is there a way to match the output > > before > > the "warning:" line?

Implement C _FloatN, _FloatNx types [version 3]

[The only changes in version 3 of the patch are additions to the testcases to provide more thorough test coverage for comparisons on the new types, both the C operators == != < <= > >= and the __builtin_is* comparisons.] ISO/IEC TS 18661-3:2015 defines C bindings to IEEE interchange and extended

Re: [PATCH, rs6000] Add minimum __float128 built-in support required for glibc

> On Jun 22, 2016, at 8:10 PM, Bill Schmidt wrote: > >> On Jun 22, 2016, at 6:27 PM, Joseph Myers wrote: >> >> (b) for trunk, having an insn pattern infkf1 for a built-in function that >> loads a constant is not appropriate (other insn

Re: [PATCH] i386: Access external function via GOT slot for -fno-plt

On Thu, Jun 23, 2016 at 1:45 PM, H.J. Lu wrote: > i386 psABI has been updated to clarify that R_386_GOT32X and R_386_GOT32 > relocations can be used to access GOT without base register when PIC is > disabled: > > https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs >

Re: [patch,avr]: ad PR71151: Make test cases pass on smaller targets.

Georg-Johann Lay writes: > On 22.06.2016 19:06, Mike Stump wrote: >> On Jun 22, 2016, at 7:21 AM, Georg-Johann Lay wrote: >>> >>> Some tests for PR71151 assume that the target MCU has a 3-byte PC. The >>> tests are failing because the simulator (avrtest) rejects to load the >>> respective

[PATCH] i386: Access external function via GOT slot for -fno-plt

i386 psABI has been updated to clarify that R_386_GOT32X and R_386_GOT32 relocations can be used to access GOT without base register when PIC is disabled: https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs 32-bit x86 assembler and linker from binutils 2.26.1 and 2.27 support call/jmp

Re: [PATCH, rs6000] Add minimum __float128 built-in support required for glibc

On Wed, 22 Jun 2016, Bill Schmidt wrote: > I understand that this is what we want for GCC 7. My current concern is to > get my patch included in GCC 6.2, where I can't be polluting common code. > To get it accepted there, I first need this code approved in mainline. So I > am quite willing to

Re: [PATCH] Do not emit SAVE_EXPR for already assigned SSA_NAMEs (PR71606).

> The gimplifier has been changed recently to use anonymous SSA_NAMEs instead > of temporary decls. But the PR is a regression present since GCC 4.7... > And the gimplifier uses save_expr (which is a gimplifier function BTW) on > both not gimplified at all as well as partially gimplified trees.

Re: [patch,avr]: ad PR71151: Make test cases pass on smaller targets.

On 22.06.2016 19:06, Mike Stump wrote: On Jun 22, 2016, at 7:21 AM, Georg-Johann Lay wrote: Some tests for PR71151 assume that the target MCU has a 3-byte PC. The tests are failing because the simulator (avrtest) rejects to load the respective executables if .text exceeds 128KiB, e.g. for

[PATCH] Fix PR rtl-optimization/71634

Hello. Following patch changes minimum of ira-max-loops-num to 1. Having the minimum equal to zero does not make much sense. Ready after it finishes reg on x86_64-linux? Thanks, Martin >From e72dafdf3a2a7cfaca4a617fd10e80dd7aae1e91 Mon Sep 17 00:00:00 2001 From: marxin Date:

Re: [PATCH] Do not emit SAVE_EXPR for already assigned SSA_NAMEs (PR71606).

On Thu, Jun 23, 2016 at 12:41:53PM +0200, Eric Botcazou wrote: > > This is candidate patch for the PR, which do not create SAVE_EXPR trees for > > already assigned SSA_NAMEs. > > > > Patch survives reg on x86_64-linux-gnu. > > > > Thoughts? > > This looks like a layering violation, save_expr is

[PATCH] Fix PR middle-end/71619

Hi. Following patch reverts the hunk that was removed in r237103. Patch can bootstrap & passes regression tests on x86_64-linux-gnu. Patch is approved by Honza. Thanks, Martin >From e31bef9738193edd46fae118074bd7f241f366c2 Mon Sep 17 00:00:00 2001 From: marxin Date: Thu, 23 Jun

Re: [PATCH] Do not emit SAVE_EXPR for already assigned SSA_NAMEs (PR71606).

> This is candidate patch for the PR, which do not create SAVE_EXPR trees for > already assigned SSA_NAMEs. > > Patch survives reg on x86_64-linux-gnu. > > Thoughts? This looks like a layering violation, save_expr is a GENERIC thing so invoking it on an SSA_NAME is weird. How does this

[PATCH, PR71602] Give error for invalid va_list argument to va_arg

Hi, this patch fixes PR71602, a 6/7 regression. Consider this test-case: ... __builtin_va_list *pap; void fn1 (void) { __builtin_va_arg(pap, double); } ... The testcase is invalid, because we're not passing a va_list as first argument of va_arg, but a va_list*. When compiling for x86_64

Re: [PATCH, i386] Add native detection for VIA C7 and Eden CPUs

On Thu, Jun 23, 2016 at 10:26 AM, J. Mayer wrote: > The following patch adds native detection for C7, Eden "Esther" and > Eden "Nehemiah" VIA CPUs. > > Please CC me to any comment / review / change request. > > --- > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > index

Re: [PATCH 2/2][v3] Drop excess size used for run time allocated stack variables.

On Wed, Jun 22, 2016 at 10:24:02PM -0600, Jeff Law wrote: > On 05/25/2016 07:32 AM, Dominik Vogt wrote: > >On Wed, May 25, 2016 at 02:30:54PM +0100, Dominik Vogt wrote: > >>> On Tue, May 03, 2016 at 03:17:53PM +0100, Dominik Vogt wrote: > > Version two of the patch including a test case. >

Re: [PATCH, vec-tails 05/10] Check if loop can be masked

On 22 Jun 11:42, Jeff Law wrote: > On 06/22/2016 10:09 AM, Ilya Enkovich wrote: > > >>Given the common structure & duplication I can't help but wonder if a single > >>function should be used for widening/narrowing. Ultimately can't you swap > >>mask_elems/req_elems and always go narrower to

[PATCH/AARCH64] Add rtx_costs routine for vulcan.

Hi gcc-patches group, Please find the patch for adding rtx_costs routine for vulcan cpu. Tested with compiling cross aarch64-linux-gcc , bootstrapped native aarch64-unknown-linux-gnu and make check (gcc). No new regression failure is added by this patch. Kindly review and merge the patch to

[PATCH, i386] Add native detection for VIA C7 and Eden CPUs

The following patch adds native detection for C7, Eden "Esther" and Eden "Nehemiah" VIA CPUs. Please CC me to any comment / review / change request. --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 14b8030..55afd8b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2016-06-21  

Re: [PATCH] Prevent LTO wrappers to process a recursive execution

On 06/23/2016 06:57 AM, Jeff Law wrote: > Is this still something you want to pursue? It looks pretty reasonable and > one could make an argument that it's a good idea in and of itself. > > jeff Yeah, I would like to install the patch :) Can I take your reply as signal that it's accepted?

[PATCH] Do not emit SAVE_EXPR for already assigned SSA_NAMEs (PR71606).

Hi. This is candidate patch for the PR, which do not create SAVE_EXPR trees for already assigned SSA_NAMEs. Patch survives reg on x86_64-linux-gnu. Thoughts? Thanks, Martin >From 91d01830302171b5cd53fa2f32cc881b2b50762f Mon Sep 17 00:00:00 2001 From: marxin Date: Wed, 22 Jun

Re: [PATCH 2/3] Add support for arm*-*-phoenix* targets.

How about backporting this to gcc-6 and gcc-5? 2016-06-21 22:10 GMT+02:00 Jeff Law : > On 06/15/2016 08:22 AM, Kuba Sejdak wrote: >> >> Is it ok for trunk? If possible, If possible, please merge it also to >> GCC-6 and GCC-5 branches. >> >> 2016-06-15 Jakub Sejdak

Re: [PATCH 3/3] Add support for arm*-*-phoenix* targets in libgcc.

How about backporting this to gcc-6 and gcc-5? 2016-06-21 22:11 GMT+02:00 Jeff Law : > On 06/15/2016 08:22 AM, Kuba Sejdak wrote: >> >> Is it ok for trunk? If possible, If possible, please merge it also to >> GCC-6 and GCC-5 branches. >> >> 2016-06-15 Jakub Sejdak

Re: [Patch, avr] Fix PR 71151

Georg-Johann Lay writes: > Senthil Kumar Selvaraj schrieb: >> Senthil Kumar Selvaraj writes: >> >>> Georg-Johann Lay writes: >>> Senthil Kumar Selvaraj schrieb: > Hi, > > [set JUMP_TABLES_IN_TEXT_SECTION to 1] >>> >>> I added tests that use linker relaxation and discovered a