Re: [ipa-vrp] ice in set_value_range

Hi Andrew, On 10/11/16 17:14, Andrew Pinski wrote: On Wed, Nov 9, 2016 at 12:01 AM, kugan wrote: Hi Andrew, On 09/11/16 17:02, Andrew Pinski wrote: Either this patch or the patch for "Handle unary pass-through jump functions for ipa-vrp" caused a

Re: [ipa-vrp] ice in set_value_range

On Wed, Nov 9, 2016 at 12:01 AM, kugan wrote: > Hi Andrew, > > On 09/11/16 17:02, Andrew Pinski wrote: >> >> Either this patch or the patch for "Handle unary pass-through jump >> functions for ipa-vrp" caused a bootstrap failure on >> aarch64-linux-gnu. >>

[PATCH] loop distribution bug fix

This fixes a bug in code adding edges to the dependence graph. Values for this_dir can be -1 (backward edge), 0 (no edge), 1 (forward edge), and 2 (both backward and forward edges). There can be multiple dependencies checked, creating multiple edges that have to be merged together. this_dir

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On 11/09/2016 10:58 PM, Segher Boessenkool wrote: I'll do a PowerPC-specific testcase for all rl[wd]* next week. rl[wd]imi will show this xor-xor thing (half of all possible insns were not optimised before this patch). Is that enough? Sure. Once David's rtl testing work is ready we'll want

[committed] Fix g++.dg/asan/asan_test.C failure

Hi! I've noticed that the asan_test.C test started failing today. The problem are many -Wc++1z-compat warnings. This lead to discovery of PR78283, which fixes the "many" part of it, but there are still some, so this patch disables them. While playing with the preprocessed source of the

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On Wed, Nov 09, 2016 at 11:29:45PM +0100, Marc Glisse wrote: > >>>This patch makes RTL simplify transform (xor (and (xor A B) C) B) back > >>>to (ior (and A C) (and B ~C)) for constant C (and similar with A instead > >>>of B for that last term). > >> > >>Would it make sense to implement this

[committed] Fix -Wc++1z-compat warning (PR c++/78283)

Hi! Once mangle_decl warns once about the mangling changes for C++1z, it warns about all following symbols, including stuff like , .L* symbols etc. or any other symbols that are not affected by the exception specification mangling changes. Fixed thusly, bootstrapped/regtested on x86_64-linux and

Re: Review debug message generation

On 09/11/16 22:36 +0100, François Dumont wrote: Hi Here is a proposal to review how we generate the debug output in case of assertion failure. It removes usage of format_word which, as a side effect will fix PR 77459. Should I reference this PR in the ChangeLog ? Please do either

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On Wed, 9 Nov 2016, Marc Glisse wrote: On Wed, 9 Nov 2016, Segher Boessenkool wrote: On Wed, Nov 09, 2016 at 10:54:53PM +0100, Marc Glisse wrote: match.pd transforms (A)|(B&~C) to ((A^B))^B, which is fewer operations if C is not const (and it is not on simple tests at least, this transform

[PING] [PATCH] enhance buffer overflow warnings (and c/53562)

The attached minor update to the patch also resolves bug 77784 that points out that -Wformat-length issues a warning also issued during the expansion of some of the __builtin___sprintf_chk intrinsics. Martin On 11/04/2016 02:16 PM, Martin Sebor wrote: Attached is an update to the patch that

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On Wed, 9 Nov 2016, Segher Boessenkool wrote: On Wed, Nov 09, 2016 at 10:54:53PM +0100, Marc Glisse wrote: match.pd transforms (A)|(B&~C) to ((A^B))^B, which is fewer operations if C is not const (and it is not on simple tests at least, this transform is done very early already). Various

Re: [PATCH, LIBGCC] Avoid count_leading_zeros with undefined result (PR 78067)

On Wed, 9 Nov 2016, Bernd Edlinger wrote: > Yes, but maybe introduce a test if the half-wide value fits? > > like: > > #define M_OK2(M, T) ((M) > sizeof(T) * CHAR_BIT / 2 - 1) Something like that. -- Joseph S. Myers jos...@codesourcery.com

[PATCH] PR78241, fix loop unroller when niter expr is not reliable

The following fixes a problem introduced by my earlier loop unroller patch, https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01612.html. In instances where the niter expr is not reliable we need to still emit an initial peel copy of the loop. Bootstrap/regtest on powerpc64le with no new

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On Wed, Nov 09, 2016 at 10:54:53PM +0100, Marc Glisse wrote: > >match.pd transforms (A)|(B&~C) to ((A^B))^B, which is fewer > >operations if C is not const (and it is not on simple tests at least, > >this transform is done very early already). > > > >Various processors have "insert" instructions

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On Wed, Nov 09, 2016 at 10:27:35PM +0100, Bernd Schmidt wrote: > On 11/09/2016 10:13 PM, Segher Boessenkool wrote: > > * simplify-rtx.c (simplify_binary_operation_1): Simplify > > (xor (and (xor A B) C) B) to (ior (and A C) (and B ~C)) and > > (xor (and (xor A B) C) B) to (ior (and A

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On Wed, 9 Nov 2016, Segher Boessenkool wrote: match.pd transforms (A)|(B&~C) to ((A^B))^B, which is fewer operations if C is not const (and it is not on simple tests at least, this transform is done very early already). Various processors have "insert" instructions that can do this, but

[PATCH] shrink-wrap: New spread_components

This patch changes spread_components to use a simpler algorithm that puts prologue components as early as possible, and epilogue components as late as possible. This allows better scheduling, and also saves a bit of code size. The blocks that run with some specific component enabled after this

Re: [PATCH TEST]Drop xfail for gcc.dg/vect/vect-cond-2.c

Hi Bin On 8 November 2016 at 13:37, Bin Cheng wrote: > Hi, > Test gcc.dg/vect/vect-cond-2.c can be vectorized by GCC now, this patch drops > the xfail. > > Thanks, > bin > > gcc/testsuite/ChangeLog > 2016-11-04 Bin Cheng > > *

Go patch committed: rework static initializer code

This patch to the Go frontend reworks the static initializer code. It renames is_immutable to is_static_initializer to try to capture what it really means. It is more precise about when an address expression, or a binary expression, can be a static initializer. Stop checking whether a type has

Review debug message generation

Hi Here is a proposal to review how we generate the debug output in case of assertion failure. It removes usage of format_word which, as a side effect will fix PR 77459. Should I reference this PR in the ChangeLog ? I introduced a print_literal function to avoid using strlen on

[ARM] PR 78253 do not resolve weak ref locally

Hi, PR 78253 shows that the handling of weak references has changed for ARM with gcc-5. When r220674 was committed, default_binds_local_p_2 gained a new parameter (weak_dominate), which, when true, implies that a reference to a weak symbol defined locally will be resolved locally, even though it

Re: [PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

On 11/09/2016 10:13 PM, Segher Boessenkool wrote: * simplify-rtx.c (simplify_binary_operation_1): Simplify (xor (and (xor A B) C) B) to (ior (and A C) (and B ~C)) and (xor (and (xor A B) C) B) to (ior (and A ~C) (and B C)) if C is a const_int. I think one of the

[PATCH] libstdc++: Improve code generation for atomic reference counting

Atomic reference counting generates pessimistic code in platforms where builtin atomics could optimize code for following branch with subtract instruction. To allow better code generation with compile time constant addition can be checked for negative value. Those cases can then be better

[PATCH] libstdc++: Allow using without lock free atomic int

Compiling programs using std::future for old arm processors fails. The problem is caused by preprocessor check for atomic lock free int. Future can be changed to work correctly without lock free atomics with minor changes to exception_ptr implementation. Without lock free atomics there is

[PATCH] simplify-rtx: Transform (xor (and (xor A B) C) B) with C const

match.pd transforms (A)|(B&~C) to ((A^B))^B, which is fewer operations if C is not const (and it is not on simple tests at least, this transform is done very early already). Various processors have "insert" instructions that can do this, but combine cannot build those from the xor-and-xor,

Re: [PATCH] (v2) print-rtl-function.c: add (param) directive to dump

On Wed, 2016-11-09 at 17:46 +0100, Bernd Schmidt wrote: > On 11/09/2016 05:46 PM, David Malcolm wrote: > > > OK for trunk if it passes bootstrap and regrtest? > > > > gcc/ChangeLog: > > * print-rtl-function.c (print_any_param_name): New function. > > (print_param): New function. > >

Re: [PATCH], PowerPC ISA 3.0, allow QImode/HImode to go into vector registers

Of course it would help, if I actually attached the patches: -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797 Index: gcc/config/rs6000/rs6000.md

Re: [Patch, fortran] PR44265 - Link error with reference to parameter array in specification expression

> Le 9 nov. 2016 à 20:09, Paul Richard Thomas a > écrit : > > Dear Dominique, > > I am deeply embarrassed. This is the consequence of an additional > condition added at the last minute. No reason to be embarrassed;-) > The attached removes it and makes sure

[PATCH], PowerPC ISA 3.0, allow QImode/HImode to go into vector registers

The PowerPC ISA 3.0 (power9) has new instructions that make it feasible to allow QImode and HImode to be allocated to vector registers. The new instructions are: * load byte with zero extend * load half word with zero extend * store byte * store half word * extract byte from

[Patch, Fortran, committed] PR 46459: ICE (segfault): Invalid read in compare_actual_formal [error recovery]

Hi all, I have committed yet another obvious ice-on-invalid fix: https://gcc.gnu.org/viewcvs?rev=242020=gcc=rev Cheers, Janus Index: gcc/fortran/interface.c === --- gcc/fortran/interface.c (Revision 241993) +++

Re: [PATCH][1/2] GIMPLE Frontend, C FE parts (and GIMPLE parser)

On Mon, Nov 7, 2016 at 2:24 AM, Richard Biener wrote: > The issue with moving is that I failed to export the definition of > c_parser in c-parser.h due to gengtype putting vec > handlers into gtype-c.h but not gtype-objc.h and thus objc bootstrap > fails :/ > >

RE: [PATCH,testsuite] MIPS: Upgrade to MIPS IV if using (HAS_MOVN) with MIPS III.

> -Original Message- > From: Toma Tabacu [mailto:toma.tab...@imgtec.com] > Sent: Wednesday, November 9, 2016 12:19 PM > Subject: RE: [PATCH,testsuite] MIPS: Upgrade to MIPS IV if using (HAS_MOVN) > with MIPS III. > > No, I don't have write access. > I would be grateful if you could

C++ PATCH for some C++17 class deduction issues

Discussion at the meeting led me to notice that class template deduction wasn't working with template template parameters. This patch also improves a few diagnostic issues. Tested x86_64-pc-linux-gnu, applying to trunk. commit 66d2621abd8ed6bb47d0fda747a572e00aece25e Author: Jason Merrill

C++ PATCH for C++17 auto non-type template parameters

This was pretty straightforward; auto template parameters look more or less the same as any other parameter with dependent type, so substitution works without any changes, we just need to do auto deduction in a couple of places. The most involved bit was handling deduction of a type parameter

[PATCH, i386]: Fix PR78626, wrong code with -fschedule-insns

Hello! We need earlyclobber on output operand of doubleword shift insns, since we have to prevent (partial) output matching %ecx as count argument. 2016-11-09 Uros Bizjak PR target/78262 * config/i386/i386.md (*3_doubleword): Mark operand 0 as earlyclobber.

Re: [PATCH 2/4] BRIG (HSAIL) frontend: The FE itself.

Hi Martin, On Fri, Nov 4, 2016 at 4:58 PM, Martin Jambor wrote: > I personally primarily want this for debugging purposes, and we should > try to eventually report errors in a more comprehensible way than > HSAILasm. But more generally, and more importantly, if the input, >

Re: [PATCH] Fix PR78189

On 9 November 2016 at 09:36, Bin.Cheng wrote: > On Tue, Nov 8, 2016 at 9:11 AM, Richard Biener wrote: >> On Mon, 7 Nov 2016, Christophe Lyon wrote: >> >>> Hi Richard, >>> >>> >>> On 7 November 2016 at 09:01, Richard Biener wrote: >>>

[Patch, Fortran, committed] PR 60777: [F03] RECURSIVE function rejected in specification expression

Hi all, I just committed a close-to-obvious fix for PR60777 (ok'd by Steve in the PR), see attachment: https://gcc.gnu.org/viewcvs?rev=242009=gcc=rev Cheers, Janus Index: gcc/fortran/expr.c === --- gcc/fortran/expr.c (Revision

Re: [PATCH, LIBGCC] Avoid count_leading_zeros with undefined result (PR 78067)

On 11/09/16 17:52, Joseph Myers wrote: > On Wed, 9 Nov 2016, James Greenhalgh wrote: > >> These new test cases look like they are going to be out of exponent range >> for _Float16 - so the testcases will fail for a target which tests either >> of: >> >> gcc.dg/torture/fp-int-convert-float16.c >>

Re: [PATCH][1/2] GIMPLE Frontend, C FE parts (and GIMPLE parser)

On November 9, 2016 5:45:32 PM GMT+01:00, Joseph Myers wrote: >On Wed, 9 Nov 2016, Richard Biener wrote: > >> I'll push back c_parser to the header and put inlines I need to >export >> there as well. >> >> Joseph, is this (with regard to the inlines) your preference as

RE: [PATCH,testsuite] MIPS: Upgrade to MIPS IV if using (HAS_MOVN) with MIPS III.

> From: Moore, Catherine [mailto:catherine_mo...@mentor.com] > Sent: 08 November 2016 20:47 > To: Toma Tabacu; gcc-patches@gcc.gnu.org > Cc: Matthew Fortune > Subject: RE: [PATCH,testsuite] MIPS: Upgrade to MIPS IV if using (HAS_MOVN) > with MIPS III. > > > > > -Original Message- > >

Re: [PATCH] enable -fprintf-return-value by default

On 11/08/2016 08:13 PM, Martin Sebor wrote: The -fprintf-return-value optimization has been disabled since the last time it caused a bootstrap failure on powerpc64le. With the underlying problems fixed GCC has bootstrapped fine on all of powerpc64, powerpc64le and x86_64 and tested with no

Re: [patch,avr] Add new option -mabsdata.

On 11/07/2016 05:54 AM, Georg-Johann Lay wrote: @@ -15261,6 +15262,13 @@ GCC supports the following AVR devices a @include avr-mmcu.texi +@item -mabsdata +@opindex mabsdata + +Assume that all data in static stocage can be accessed by LDS / STS s/stocage/storage/ +inctructions. This

Re: [PATCH, LIBGCC] Avoid count_leading_zeros with undefined result (PR 78067)

On Wed, 9 Nov 2016, James Greenhalgh wrote: > These new test cases look like they are going to be out of exponent range > for _Float16 - so the testcases will fail for a target which tests either > of: > > gcc.dg/torture/fp-int-convert-float16.c >

Re: [PATCH][1/2] GIMPLE Frontend, C FE parts (and GIMPLE parser)

On Wed, 9 Nov 2016, Richard Biener wrote: > I'll push back c_parser to the header and put inlines I need to export > there as well. > > Joseph, is this (with regard to the inlines) your preference as well? I'm not clear what the proposal is. If some patch is now proposed different from what

Re: [PATCH] (v2) print-rtl-function.c: add (param) directive to dump

On 11/09/2016 05:46 PM, David Malcolm wrote: OK for trunk if it passes bootstrap and regrtest? gcc/ChangeLog: * print-rtl-function.c (print_any_param_name): New function. (print_param): New function. (print_rtx_function): Call print_param for each argument. *

Re: [PATCH, GCC/ARM] Fix PR77933: stack corruption on ARM when using high registers and lr

I've reworked the patch following comments from Wilco [1] (sorry could not find it in my MUA for some reason). [1] https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00317.html == Context == When saving registers, function thumb1_expand_prologue () aims at minimizing the number of push

Re: [PATCH, LIBGCC] Avoid count_leading_zeros with undefined result (PR 78067)

On Sat, Oct 29, 2016 at 05:47:54AM +, Bernd Edlinger wrote: > On 10/28/16 16:05, Bernd Edlinger wrote: > > On 10/27/16 22:23, Joseph Myers wrote: > >> On Thu, 27 Oct 2016, Bernd Edlinger wrote: > >> > >>> Hi, > >>> > >>> by code reading I became aware that libgcc can call count_leading_zeros >

Re: [PATCH] fix PR68468

On Wed, Nov 09, 2016 at 04:08:39PM +0100, Bernd Schmidt wrote: > On 11/05/2016 06:14 PM, Waldemar Brodkorb wrote: > >Hi, > > > >the following patch fixes PR68468. > >Patch is used for a while in Buildroot without issues. > > > >2016-11-05 Waldemar Brodkorb Two spaces before <

[PATCH, GCC/ARM] Fix ICE when compiling empty FIQ interrupt handler in ARM mode

Hi, This patch fixes the following ICE when building when compiling an empty FIQ interrupt handler in ARM mode: empty_fiq_handler.c:5:1: error: insn does not satisfy its constraints: } ^ (insn/f 13 12 14 (set (reg/f:SI 13 sp) (plus:SI (reg/f:SI 11 fp) (const_int 4

[PATCH] (v2) print-rtl-function.c: add (param) directive to dump

On Wed, 2016-11-09 at 12:59 +0100, Bernd Schmidt wrote: > On 11/08/2016 07:03 PM, David Malcolm wrote: > > int __RTL("rtl-combine") f1 (int n) > > { > > (function "f1" > > (param "n" > > (DECL_RTL > > (reg/v:SI %1 [ n ]) > > ) ;; DECL_RTL > > The ;; DECL_RTL etc. comments seem

Re: [PATCH] Add testcase for PR middle-end/77718

On November 9, 2016 4:34:27 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >I've noticed this PR is still open, but has been fixed, though >apparently Bernd's patch from the PR has been applied as is with >the needed tab eaten (instead 7 spaces) and no testcase has been added. >

Re: [PATCH] Fix folding of memcmp("a", "a", 2) (PR, tree-optimization/78257)

This patch breaks bootstrap on AIX and probably on any 32 bit host. Thanks, David /nasfarm/edelsohn/src/src/gcc/fold-const-call.c: In function 'tree_node* fold_const_call(combined_fn, tree, tree, tree, tree)': /nasfarm/edelsohn/src/src/gcc/fold-const-call.c:1541:36: error: cannot convert

[PATCH, Fortran] PR78259: ICE in gfc_trans_subcomponent_assign, at fortran/trans-expr.c:7330

All, Will commit the below to trunk as an obvious fix for PR78259. (The regression was introduced in r241626 from https://gcc.gnu.org/ml/fortran/2016-10/msg00206.html). The patch clears regtests. --- Fritz Reese From: Fritz O. Reese Date: Wed, 9 Nov 2016 10:59:17 -0500

[PING][PATCH][aarch64] Improve Logical And Immediate Expressions

Ping. Link to original post: https://gcc.gnu.org/ml/gcc-patches/2016-10/msg02305.html

[PATCH] Add testcase for PR middle-end/77718

Hi! I've noticed this PR is still open, but has been fixed, though apparently Bernd's patch from the PR has been applied as is with the needed tab eaten (instead 7 spaces) and no testcase has been added. Tested with cross-compiler and the r240625 change reverted and as is and running the

Re: [PATCH] fix PR68468

On 11/05/2016 06:14 PM, Waldemar Brodkorb wrote: Hi, the following patch fixes PR68468. Patch is used for a while in Buildroot without issues. 2016-11-05 Waldemar Brodkorb PR gcc/68468 * libgcc/unwind-dw2-fde-dip.c: fix build on FDPIC targets. This is ok.

Re: [Patch, fortran] PR44265 - Link error with reference to parameter array in specification expression

Sorry for the bad news, but while gfortran regtests with regression with the patch I still get a link error with the original test: % gfc pr44265.f90 Undefined symbols for architecture x86_64: "___fruits_MOD_names", referenced from: _MAIN__ in ccyeNqa1.o ld: symbol(s) not found for

Re: [PATCHv2 6/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call

On 27/10/16 11:01, Andre Vieira (lists) wrote: > On 25/10/16 17:30, Andre Vieira (lists) wrote: >> On 24/08/16 12:01, Andre Vieira (lists) wrote: >>> On 25/07/16 14:26, Andre Vieira (lists) wrote: This patch extends support for the ARMv8-M Security Extensions 'cmse_nonsecure_call' to use

Re: [PATCH 7/7, GCC, ARM, V8M] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

On 09/11/16 10:26, Kyrill Tkachov wrote: > > @@ -1832,6 +1834,17 @@ arm_init_builtins (void) > = add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr, > ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE); > } > + > + if (arm_arch_cmse) > +{ > + tree

Re: [RFC] Check number of uses in simplify_cond_using_ranges().

On Wed, Nov 9, 2016 at 3:30 PM, Dominik Vogt wrote: > On Wed, Nov 09, 2016 at 01:43:58PM +0100, Richard Biener wrote: >> On Tue, Nov 8, 2016 at 5:18 PM, Marc Glisse wrote: >> > On Tue, 8 Nov 2016, Dominik Vogt wrote: >> > >> >> On Fri, Nov 04, 2016

Re: [patch, avr] Add flash size to device info and make wrap around default

On 09.11.2016 10:14, Pitchumani Sivanupandi wrote: On Tuesday 08 November 2016 02:57 PM, Georg-Johann Lay wrote: On 08.11.2016 08:08, Pitchumani Sivanupandi wrote: I have updated patch to include the flash size as well. Took that info from device headers (it was fed into crt's device

Re: [PATCH] Fix folding of memcmp("a", "a", 2) (PR, tree-optimization/78257)

On Wed, Nov 9, 2016 at 3:08 PM, Martin Liška wrote: > On 11/09/2016 02:58 PM, Richard Biener wrote: >> On Wed, Nov 9, 2016 at 2:56 PM, Martin Liška wrote: >>> Hello. >>> >>> Following patch fixes [1] (f0 function), where we have off-by-one error. >>> Patch can

Re: [RFC] Check number of uses in simplify_cond_using_ranges().

On Wed, Nov 09, 2016 at 01:43:58PM +0100, Richard Biener wrote: > On Tue, Nov 8, 2016 at 5:18 PM, Marc Glisse wrote: > > On Tue, 8 Nov 2016, Dominik Vogt wrote: > > > >> On Fri, Nov 04, 2016 at 01:54:20PM +0100, Richard Biener wrote: > >>> > >>> On Fri, Nov 4, 2016 at 12:08

[arm-embedded][PATCH, gcc/ARM, ping] Add support for Cortex-M23

Hi, We have decided to backport this patch to add support for ARM Cortex-M23 to our embedded-6-branch. 2016-11-09 Thomas Preud'homme Backport from mainline 2016-11-04 Thomas Preud'homme gcc/ *

Re: [PATCH] Fix folding of memcmp("a", "a", 2) (PR, tree-optimization/78257)

On 11/09/2016 02:58 PM, Richard Biener wrote: > On Wed, Nov 9, 2016 at 2:56 PM, Martin Liška wrote: >> Hello. >> >> Following patch fixes [1] (f0 function), where we have off-by-one error. >> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. >> >> Ready to

[PATCH] Remove unused parameter from tree_swap_operands_p

Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. Richard. 2016-11-09 Richard Biener * fold-const.c (tree_swap_operands_p): Remove unused arg. * fold-const.c (tree_swap_operands_p): Likewise. (fold_binary_loc): Adjust.

Re: [PATCH] Fix folding of memcmp("a", "a", 2) (PR, tree-optimization/78257)

On Wed, Nov 9, 2016 at 2:56 PM, Martin Liška wrote: > Hello. > > Following patch fixes [1] (f0 function), where we have off-by-one error. > Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. > > Ready to be installed? Ok (w/o the unrelated gimplify.c

[PATCH] Fix folding of memcmp("a", "a", 2) (PR, tree-optimization/78257)

Hello. Following patch fixes [1] (f0 function), where we have off-by-one error. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be installed? Martin [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78257#c0 >From d7c46e5eb4d295d7653eae188cae04a8f7f0719f Mon

Re: [PATCH] Remove unneeded gcc_assert in gimplifier (PR sanitizer/78270)

On 11/09/2016 02:29 PM, Jakub Jelinek wrote: > On Wed, Nov 09, 2016 at 02:16:45PM +0100, Martin Liška wrote: >> As shown in the attached test-case, the assert cannot always be true. >> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. >> >> Ready to be installed? >> Martin

Re: [PATCH] Remove unneeded gcc_assert in gimplifier (PR sanitizer/78270)

On Wed, Nov 09, 2016 at 02:16:45PM +0100, Martin Liška wrote: > As shown in the attached test-case, the assert cannot always be true. > Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. > > Ready to be installed? > Martin > >From b55459461f3f7396a094be6801082715ddb4b30d

[PATCH] Remove unneeded gcc_assert in gimplifier (PR sanitizer/78270)

As shown in the attached test-case, the assert cannot always be true. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be installed? Martin >From b55459461f3f7396a094be6801082715ddb4b30d Mon Sep 17 00:00:00 2001 From: marxin Date: Wed, 9 Nov

Re: [WIP C++ PATCH] P0217R3 - C++17 structured bindings

Hi! On Wed, Nov 09, 2016 at 01:24:22PM +0100, Jakub Jelinek wrote: > The following patch is a WIP on P0217R3 - decomposition declarations. > It contains various FIXMEs, Jason, do you think you could finish it up? Some more comments: Invalid? code like int arr[2]; extern int x, y; auto [ x, y ]

Re: [PATCH, RFC] Improve ivopts group costs

On Thu, Nov 3, 2016 at 4:00 PM, Bin.Cheng wrote: > On Thu, Nov 3, 2016 at 1:35 PM, Evgeny Kudryashov > wrote: >> Hello, >> >> I'm facing the following problem related to ivopts. The problem is that GCC >> generates a lot of induction variables and as

[PATCH, ARM] Enable ldrd/strd peephole rules unconditionally

Hi! This patch enables the ldrd/strd peephole rules unconditionally. It is meant to fix cases, where the patch to reduce the sha512 stack usage splits ldrd/strd instructions into separate ldr/str insns, but is technically independent from the other patch: See

Re: [PATCH, vec-tails] Support loop epilogue vectorization

On Wed, 9 Nov 2016, Yuri Rumyantsev wrote: > Thanks Richard for your comments. > Your proposed to handle epilogue loop just like normal short-trip loop > but this is not exactly truth since e.g. epilogue must not be peeled > for alignment. But if we know the epilogue data-refs are aligned we

[PING][PATCH v2][aarch64] Add mcpu flag for Qualcomm falkor core

Ping! Siddhesh On 4 November 2016 at 21:17, Siddhesh Poyarekar wrote: > This adds an mcpu option for the upcoming Qualcomm Falkor core. This > is identical to the qdf24xx part that was added earlier and hence > retains the same tuning structure and continues to

[Patch, fortran] PR44265 - Link error with reference to parameter array in specification expression

Dear All, The title of this PR says what this is all about, except that it applies uniquely applicable to character function result string lengths. Ian Harvey wrote the first patch for this PR for which many thanks. However, two issues came up that took some little while to understand; (i) In

Re: [RFC] Check number of uses in simplify_cond_using_ranges().

On Tue, Nov 8, 2016 at 5:18 PM, Marc Glisse wrote: > On Tue, 8 Nov 2016, Dominik Vogt wrote: > >> On Fri, Nov 04, 2016 at 01:54:20PM +0100, Richard Biener wrote: >>> >>> On Fri, Nov 4, 2016 at 12:08 PM, Dominik Vogt >>> wrote: On Fri, Nov

Re: [PATCH, vec-tails] Support loop epilogue vectorization

On Wed, Nov 9, 2016 at 12:12 PM, Yuri Rumyantsev wrote: > I am familiar with SVE extension and understand that implemented > approach might be not suitable for ARM. The main point is that only > load/store instructions are masked but all other calculations are not > (we did

[WIP C++ PATCH] P0217R3 - C++17 structured bindings

Hi! The following patch is a WIP on P0217R3 - decomposition declarations. It contains various FIXMEs, Jason, do you think you could finish it up? The most important unfinished part in the patch is that cp_finish_decomp for classes doesn't try to check if std::tuple_size::value is well-formed

Re: [PATCH, vec-tails] Support loop epilogue vectorization

I am familiar with SVE extension and understand that implemented approach might be not suitable for ARM. The main point is that only load/store instructions are masked but all other calculations are not (we did special conversion for reduction statements to implement merging predication semantic).

Re: [PATCH] DECL_RTL and DECL_RTL_INCOMING in RTL dumps

On 11/08/2016 07:03 PM, David Malcolm wrote: int __RTL("rtl-combine") f1 (int n) { (function "f1" (param "n" (DECL_RTL (reg/v:SI %1 [ n ]) ) ;; DECL_RTL The ;; DECL_RTL etc. comments seem somewhat redundant and add clutter. Please remove those. Also, why is the closing paren

Re: [PATCH, vec-tails] Support loop epilogue vectorization

On Wed, Nov 9, 2016 at 11:28 AM, Yuri Rumyantsev wrote: > Thanks Richard for your comments. > Your proposed to handle epilogue loop just like normal short-trip loop > but this is not exactly truth since e.g. epilogue must not be peeled > for alignment. Yes there must be some

Re: [PATCH, vec-tails] Support loop epilogue vectorization

Thanks Richard for your comments. Your proposed to handle epilogue loop just like normal short-trip loop but this is not exactly truth since e.g. epilogue must not be peeled for alignment. It is not clear for me what are my next steps? Should I re-design the patch completely or simply decompose

[PATCH] Remove redundant canonicalize_comparison from DOM

DOM currently canonicalizes GIMPLE_COND operand order. But it does so before constant/copy propagation into that stmt (so quite pointless) and furthermore we fold the stmt if we constant/copy propagated into it and fold already does the canonicalization. Thus, removed. Bootstrap & regtest

[PATCH, GCC/testsuite] Fix PR78269: noexcept-type9.C should be a compile test

g++.dg/cpp1z/noexcept-type9.C contains a dg-error but is currently a runtime test. The intent was clearly to make it a compile test to test that error, especially since there is no main. This patch changes it to a compile test. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog ***

[PATCH] Remove flag_evaluation_order (Java remains)

The Java FE was the only thing setting flag_evaluation_order to nonzero thus the following removes that flag and adjusts code checking it (a followup will remove the now unused arg from tree_swap_operands_p). Bootstrap / regtest in progress on x86_64-unknown-linux-gnu. Richard. 2016-11-09

Re: Prevent aliasing between arguments in calls to move_alloc

Hi Steve, Committed as r241995. Thanks. Paul On 8 November 2016 at 20:43, Steve Kargl wrote: > Yes. I saw Ian's analysis in c.l.f. It seems we both got > caught out on this one. The patch looks fine. > > -- > steve > > On Tue, Nov 08, 2016 at 08:26:37PM

Reject out-of-range bit pos in bit-fields insns operating on a register.

As seen by the testcase in PR77822, combine can generate out-of-range bit pos in a bit-field insn, unless the pattern explicitly rejects it. This only makes a difference for expressions that are undefined at runtime. Without that we would either generate bad assembler or ICE in output_btst.

Re: [PATCH, vec-tails] Support loop epilogue vectorization

On Tue, Nov 1, 2016 at 12:38 PM, Yuri Rumyantsev wrote: > Hi All, > > I re-send all patches sent by Ilya earlier for review which support > vectorization of loop epilogues and loops with low trip count. We > assume that the only patch - vec-tails-07-combine-tail.patch - was

Re: [PATCH 7/7, GCC, ARM, V8M] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

Hi Andre, On 25/10/16 17:30, Andre Vieira (lists) wrote: On 24/08/16 12:01, Andre Vieira (lists) wrote: On 25/07/16 14:28, Andre Vieira (lists) wrote: This patch adds support ARMv8-M's Security Extension's cmse_nonsecure_caller intrinsic. This intrinsic is used to check whether an entry

Re: [Patch, Fortran, committed] PR 71894: [OOP] ICE in gfc_add_component_ref, at fortran/class.c:227

Hi Andre, sorry, didn't want to be impolite. I was just not aware that it makes a big difference whether I attach the patch or post the link. Patch below. Cheers, Janus Index: gcc/fortran/class.c === --- gcc/fortran/class.c

Re: [PATCH] Convert character arrays to string csts

On Fri, Nov 4, 2016 at 2:33 PM, Martin Liška wrote: > On 11/03/2016 02:00 PM, Jan Hubicka wrote: >>> On 11/03/2016 01:12 PM, Martin Liška wrote: + tree init = DECL_INITIAL (decl); + if (init + && TREE_READONLY (decl) + &&

[PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics

Hi, This patch implements support for the ARM ACLE Coprocessor MCR and MRC intrinsics. See below a table mapping the intrinsics to their respective instructions: +---+---+ | Intrinsic signature

[PATCH 5/6][ARM] Implement support for ACLE Coprocessor MCR and MRC intrinsics

Hi, This patch implements support for the ARM ACLE Coprocessor MCR and MRC intrinsics. See below a table mapping the intrinsics to their respective instructions: +---+---+ | Intrinsic signature

[PATCH 4/6][ARM] Implement support for ACLE Coprocessor LDC and STC intrinsics

Hi, This patch implements support for the ARM ACLE Coprocessor LDC and STC intrinsics. See below a table mapping the intrinsics to their respective instructions: ++--+ | Intrinsic signature

[PATCH 3/6][ARM] Implement support for ACLE Coprocessor CDP intrinsics

Hi, This patch implements support for the ARM ACLE Coprocessor CDP intrinsics. See below a table mapping the intrinsics to their respective instructions: ++--+ | Intrinsic signature

[PATCH 1/6][ARM] Refactor NEON builtin framework to work for other builtins

Hi, Refactor NEON builtin framework such that it can be used to implement other builtins. Is this OK for trunk? Regards, Andre gcc/ChangeLog 2016-11-09 Andre Vieira * config/arm/arm-builtins.c (neon_builtin_datum): Rename to .. (arm_builtin_datum):

[PATCH 2/6][ARM] Move CRC builtins to refactored framework

Hi, This patch refactors the implementation of the ARM ACLE CRC builtins to use the builtin framework. Is this OK for trunk? Regards, Andre gcc/ChangeLog 2016-11-09 Andre Vieira * config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers): New.

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