[RFC][C++] Parser: Simplifying tentative firewall

I carefully examined the code of setting up tentative firewalls to guard current context in cp/parser.c recent days, and think the code could be simplified. For example, in function cp_parser_start_tentative_firewall, 4427 cp_parser_parse_tentatively (parser); 4428

[wwwdocs] Adjust to new upstream URL for OpenMP specifications

Adjust to new upstream URL for OpenMP specifications. On the way, avoid one duplicate (on that page) link and one for GCC 4.4. Appplied Index: gcc-4.4/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.4/changes.html,v

[wwwdocs] Nick's Blog now defaults to https

...like all of developers.redhat.com. Applied. Index: index.html === RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v retrieving revision 1.1034 diff -u -r1.1034 index.html --- index.html 21 Dec 2016 11:21:20 - 1.1034 +++

[wwwdocs] news/ssa.html -- remove link to www.codesourcery.com

Applied. Gerald Index: news/ssa.html === RCS file: /cvs/gcc/wwwdocs/htdocs/news/ssa.html,v retrieving revision 1.6 diff -u -r1.6 ssa.html --- news/ssa.html 29 Dec 2006 10:03:38 - 1.6 +++ news/ssa.html 28 Dec

Re: [1/9][RFC][DWARF] Reserve three DW_OP numbers in vendor extension space

> OK on this proposal and to install this patch to gcc trunk? > > Hi GDB, Binutils maintainer: > > OK on this proposal and install this patch to binutils-gdb master? > > include/ > 2016-11-29 Richard Earnshaw > Jiong Wang > > *

Re: [1/9][RFC][DWARF] Reserve three DW_OP numbers in vendor extension space

> I'd like to point out that especially the vendor range of DW_OP_* is > extremely scarce resource, we have only a couple of unused values, so taking > 3 out of the remaining unused 12 for a single architecture is IMHO too much. > Can't you use just a single opcode and encode which of the 3

[PATCH, Fortran, pr78781, v1] [7 Regression] [Coarray] ICE in gfc_deallocate_scalar_with_status, at fortran/trans.c:1588

Hi all, attached patch fixes and implements pointer components in derived typed coarrays. The testcase in the description also has a class coarray, which is still not implemented but tracked by pr77961. Therefore only the test in comment #2 now passes. Bootstraps and regtests ok on

Re: [PATCH] Fix late dwarf generated early from optimized out globals

On 28.12.16 19:24, Richard Biener wrote: On December 27, 2016 11:17:00 PM GMT+01:00, Andreas Tobler wrote: On 16.09.16 13:30, Richard Biener wrote: On Thu, 15 Sep 2016, Richard Biener wrote: This addresses sth I needed to address with the early LTO debug patches

Re: [PATCH][GIMPLEFE] Fix for ICE due to undeclared variable

Sorry for the wrong email address. On 28 December 2016 at 23:57, Prasad Ghangal wrote: > Hi, > The attached patch tries fix ICE due to undeclared variable(s) in the input. > Successfully bootstrapped on x86_64-pc-linux-gnu, testing is in progress > > > Thanks, > Prasad

[PATCH][GIMPLEFE] Fix for ICE due to undeclared variable

Hi, The attached patch tries fix ICE due to undeclared variable(s) in the input. Successfully bootstrapped on x86_64-pc-linux-gnu, testing is in progress Thanks, Prasad Changelog Description: Binary data diff --git a/gcc/c/gimple-parser.c b/gcc/c/gimple-parser.c index b7cef93..13bf2b1 100644

Re: [PATCH] Fix late dwarf generated early from optimized out globals

On December 27, 2016 11:17:00 PM GMT+01:00, Andreas Tobler wrote: >On 16.09.16 13:30, Richard Biener wrote: >> On Thu, 15 Sep 2016, Richard Biener wrote: >> >>> >>> This addresses sth I needed to address with the early LTO debug >patches >>> (you might now figure I'm

[Ping^3][1/9][RFC][DWARF] Reserve three DW_OP numbers in vendor extension space

Jiong Wang writes: > Jiong Wang writes: > >> Jiong Wang writes: >> >>> On 16/11/16 14:02, Jakub Jelinek wrote: On Wed, Nov 16, 2016 at 02:54:56PM +0100, Mark Wielaard wrote: > On Wed, 2016-11-16 at 10:00 +, Jiong Wang wrote: >> The two operations DW_OP_AARCH64_paciasp and

[PATCH, i386]: Allow non-REX memory operand for x86_64 zero-extracts involving high registers

Hello! Attached patch allows non-REX memory operands for x86_64 zero-extracts involving high registers. This needs to be implemented using peephole2 pattern, since we can't distinguish non-REX memory operand from normal memory operands. 2016-12-28 Uros Bizjak PR

Re: [PATCH, ARM] PR71607: New approach to arm_disable_literal_pool

On 29/11/16 09:45, Andre Vieira (lists) wrote: > On 17/11/16 10:00, Ramana Radhakrishnan wrote: >> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists) >> wrote: >>> Hello, >>> >>> This patch tackles the issue reported in PR71607. This patch takes a >>> different

Re: [PATCH], Add PowerPC ISA 3.0 vec_vinsert4b and vec_vextract4b built-in functions

On Dez 13 2016, Michael Meissner wrote: > @@ -15766,6 +15766,40 @@ altivec_expand_builtin (tree exp, rtx ta > case VSX_BUILTIN_VEC_EXT_V1TI: >return altivec_expand_vec_ext_builtin (exp, target); > > +case P9V_BUILTIN_VEXTRACT4B: > +case