Re: [PATCH AArch64/V3]Add new patterns for vcond_mask and vec_cmp

On Mon, Aug 1, 2016 at 6:18 AM, Bin Cheng wrote: > Hi, > This is the 3rd version patch implementing vcond_mask and vec_cmp patterns on > AArch64. > Bootstrap and test along with next patch on AArch64, is it OK? > > Thanks, > bin > > 2016-07-28 Alan Lawrence

Re: [PATCH 3/3] Introduce IntegerRange for options (PR driver/79659).

On 03/15/2017 03:58 AM, Martin Liška wrote: > Huh, I forgot to attach the patch. > > Martin > > 0001-Introduce-IntegerRange-for-options-PR-driver-79659.patch > > > From bb89456e6cecfa9497cf8e265d2083e762d5bc3e Mon Sep 17 00:00:00 2001 > From: marxin > Date: Mon, 27 Feb 2017

Re: [PATCH] Port Doxygen support script from Perl to Python; add unittests

On 05/31/2017 08:10 AM, Martin Liška wrote: > ..adding missing patch > > > 0001-Doxygen-add-default-location-for-filters-and-output-.patch > > > From 3021b695a8111e1552176529ab3342cdd2ae3a43 Mon Sep 17 00:00:00 2001 > From: marxin > Date: Wed, 3 May 2017 11:42:41 +0200 >

Re: [PATCH], Add check ppc_cpu_supports_hw to testsuite

On 06/27/2017 05:53 PM, Michael Meissner wrote: > The PowerPC __builtin_cpu_supports and __builtin_cpu_is built-in functions > require GLIBC 2.23, since they use fixed words at the end of thread control > area to store the HWCAP and HWCAP2 bits. If the compiler was not configured > with the

Re: [PATCH], PR ipa/81238, make default target_clone static

On 06/27/2017 05:34 PM, Michael Meissner wrote: > In going through the target_clone support for the PowerPC, I noticed > that the default target clone function was not explicitly set to private. > This > patch fixes this. I have checked both the x86_64 and PowerPC target clone > code, and the

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On 06/27/2017 04:31 PM, Joseph Myers wrote: On Tue, 27 Jun 2017, Martin Sebor wrote: There's the usual question of what should be done with arrays of qualified types (where C does not consider such an array type to be qualified, but C++ considers it to have the same qualifiers as the element

[patch, fortran] PR80164 ICE in gfc_format_decoder at gcc/fortran/error.c:933

I plan to commit the following patch that was provided by Steve in PR on Bugzilla. Simple. I will also backport to 7. Without patch we get a segfault when -Warray-temporaries is used on several existing test cases. I will prepare a test case based on one of those. Regards, Jerry

Re: [AARCH64] Disable pc relative literal load irrespective of TARGET_FIX_ERR_A53_84341

Hi Ramana, On 27 June 2017 at 18:01, Ramana Radhakrishnan wrote: > On 27/06/17 02:20, Kugan Vivekanandarajah wrote: >> >> https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00614.html added this >> workaround to get kernel building with when

Re: [PATCH], PR ipa/81238, make default target_clone static

On Tue, Jun 27, 2017 at 07:34:13PM -0400, Michael Meissner wrote: > In going through the target_clone support for the PowerPC, I noticed > that the default target clone function was not explicitly set to private. > This > patch fixes this. I have checked both the x86_64 and PowerPC target clone

[PATCH], Add check ppc_cpu_supports_hw to testsuite

The PowerPC __builtin_cpu_supports and __builtin_cpu_is built-in functions require GLIBC 2.23, since they use fixed words at the end of thread control area to store the HWCAP and HWCAP2 bits. If the compiler was not configured with the appropriate GLIBC, the compiler will generate a 0 as the

Re: [PATCH rs6000] remove implicit static var outputs of toc_relative_expr_p

Hi Aaron, On Tue, Jun 27, 2017 at 11:43:57AM -0500, Aaron Sawdey wrote: > The function toc_relative_expr_p implicitly sets two static vars > (tocrel_base and tocrel_offset) that are declared in rs6000.c. The real > purpose of this is to communicate between > print_operand/print_operand_address

[PATCH], PR ipa/81238, make default target_clone static

In going through the target_clone support for the PowerPC, I noticed that the default target clone function was not explicitly set to private. This patch fixes this. I have checked both the x86_64 and PowerPC target clone code, and the patch does make it private. I'm doing bootstrap builds on

Re: [PATCH/AARCH64] Improve aarch64 conditional compare usage

On 05/01/2017 11:16 AM, Steve Ellcey wrote: > This is a resubmittal of an earlier patch > (https://gcc.gnu.org/ml/gcc-patches/2017-02/msg00203.html) to improve the > use of ccmp (conditional compare) on aarch64. I made a couple of tweaks > after the first submittal and retested now that we are

libgo patch committed: AIX memory management

On AIX: * mmap does not allow to map an already mapped range, * mmap range start at 0x3000 for 32 bits processes, * mmap range start at 0x7000_ for 64 bits processes This libgo patch by Matthieu Sarter addresses these issues. Bootstrapped and ran Go testsuite on

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Tue, 27 Jun 2017, Martin Sebor wrote: > > There's the usual question of what should be done with arrays > > of qualified types (where C does not consider such an array type to be > > qualified, but C++ considers it to have the same qualifiers as the element > > type). There's also the matter

Re: [PATCH] Simplify vec_merge of vec_duplicate with const_vector

On 06/06/2017 02:25 AM, Kyrill Tkachov wrote: > Hi all, > > I'm trying to improve some of the RTL-level handling of vector lane > operations on aarch64 and that > involves dealing with a lot of vec_merge operations. One simplification > that I noticed missing > from simplify-rtx are combinations

Re: [PATCH] vec_merge + vec_duplicate + vec_concat simplification

On 06/06/2017 02:35 AM, Kyrill Tkachov wrote: > Hi all, > > Another vec_merge simplification that's missing is transforming: > (vec_merge (vec_duplicate x) (vec_concat (y) (z)) (const_int N)) > into > (vec_concat x z) if N == 1 (0b01) or > (vec_concat y x) if N == 2 (0b10) > > For the testcase

Re: [PATCH][simplify-rtx] Simplify vec_merge of vec_duplicates into vec_concat

On 06/06/2017 02:38 AM, Kyrill Tkachov wrote: > Hi all, > > Another vec_merge simplification that's missing from simplify-rtx.c is > transforming > a vec_merge of two vec_duplicates. For example: > (set (reg:V2DF 80) > (vec_merge:V2DF (vec_duplicate:V2DF (reg:DF 84)) >

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On 06/27/2017 11:50 AM, Joseph Myers wrote: On Tue, 27 Jun 2017, Martin Sebor wrote: Another thing, with the current patch, __typeof_noqual__(const int) would still produce "const int". With the __atomic_load_n proposal it'd return "int". I don't know what we want to do for typenames, but

Re: [gofrontend-dev] [PATCH, go]: S/390: Fix generation of PtraceRegs

On Tue, Jun 27, 2017 at 12:52 AM, Andreas Krebbel wrote: > > go bootstrap fails on s390x starting with r249472. With including the ptrace > header the s390 special > code in mksysinfo.sh isn't used anymore: > > if test "$regs" = ""; then > # s390 > regs=`grep

Re: fix libcc1 dependencies in toplevel Makefile

On Jun 26, 2017, Olivier Hainque wrote: > On Jun 22, 2017, at 14:12 , Alexandre Oliva wrote: >> Your patch takes care of the build dependencies of libcc1, which should >> avoid some scenarios that might lead to concurrency between staged and >> non-staged

[C++ PATCH] tsubs_decl

I was looking at why tsubst_decl wanted to call constructor_name. Turned out it was a check with no effect -- setting 'member' to 2 instead of 1. And we only ever check if member is zero or non-zero. so deleted that check, turned member into a bool, and tidied up the code a bit to declare

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On 6/27/17 11:07 AM, Segher Boessenkool wrote: > Not use an installed header, that's not what I'm asking. Share the > source file, i.e., just copy it over from the glibc source tree (it > should probably hold the master copy). Fewer typos, cannot forget to > update some entry, etc. So the glibc

Re: Use ucontext_t not struct ucontext in linux-unwind.h files

On Tue, 27 Jun 2017, Joseph Myers wrote: > Current glibc no longer gives the ucontext_t type the tag struct > ucontext, to conform with POSIX namespace rules. This requires > various linux-unwind.h files in libgcc, that were previously using > struct ucontext, to be fixed to use ucontext_t

Re: [PATCH] Fold (a > 0 ? 1.0 : -1.0) into copysign (1.0, a) and a * copysign (1.0, a) into abs(a)

On Tue, Jun 27, 2017 at 7:56 AM, Richard Biener wrote: > On June 27, 2017 4:52:28 PM GMT+02:00, Tamar Christina > wrote: >>> >> +(for cmp (gt ge lt le) >>> >> + outp (convert convert negate negate) >>> >> + outn (negate negate convert

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Tue, 27 Jun 2017, Martin Sebor wrote: > > Another thing, with the current patch, __typeof_noqual__(const int) > > would still produce "const int". With the __atomic_load_n proposal > > it'd return "int". I don't know what we want to do for typenames, > > but __typeof__(_Atomic int) produces

Re: [PATCH GCC][6/6]Avoid aggressive predcom for high register pressure cases

On 05/12/2017 05:28 AM, Bin Cheng wrote: > Hi, > Aggressive precom could result in larger number loop carried variables, > causes high > register pressure and spilling. One example is the hot loop of > 436.cactusADM, in > which >25 loop carried variables are introduced for the vectorized

Re: [PATCH GCC][3/6]New file computing regional register pressure on TREE SSA

On 05/12/2017 05:28 AM, Bin Cheng wrote: > Hi, > This patch computes register pressure information on TREE SSA by a backward > live > range data flow problem. The major motivation is to estimate register > pressure > for inner-most loop on TREE SSA, then other optimizations can use it. So far

Re: Backports to 6 (and 7, and 5)

On Tue, Jun 27, 2017 at 11:02:37AM -0500, Segher Boessenkool wrote: > On Tue, Jun 27, 2017 at 09:18:07AM +0200, Richard Biener wrote: > > On Mon, 26 Jun 2017, Segher Boessenkool wrote: > > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01853.html > > >

[C++ PATCH] CLASSTYPE_DESTRUCTOR

There can only be one destructor, so CLASSTYPE_DESTRUCTORS is a confusing name. (we're not talking about the various flavours of the single destructor) Applied. nathan -- Nathan Sidwell 2017-06-27 Nathan Sidwell * cp-tree.h (CLASSTYPE_DESTRUCTORS): Rename to ...

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

Hi Andrew, On 27/06/17 17:11, Andrew Pinski wrote: On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li wrote: Hi Andrew, On 25/06/17 22:38, Andrew Pinski wrote: On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li wrote: Hi all, In this patch, a new integer

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On 06/27/2017 07:14 AM, Marek Polacek wrote: On Mon, Jun 26, 2017 at 10:37:03AM -0600, Martin Sebor wrote: On 06/23/2017 08:46 AM, Marek Polacek wrote: This patch adds a variant of __typeof, called __typeof_noqual. As the name suggests, this variant always drops all qualifiers, not just when

Re: [PATCH GCC][02/13]Skip distribution if there is no loop

On 06/12/2017 11:02 AM, Bin Cheng wrote: > Hi, > this is a simple patch skipping distribution if there is no loop at all. > > Bootstrap and test on x86_64 and AArch64. Is it OK? > > Thanks, > bin > > 2017-06-07 Bin Cheng > > * cfgloop.h

[PING^3] Re: [PATCH] c/c++: Add fix-it hints for suggested missing #includes

Ping re: https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00321.html On Tue, 2017-06-20 at 15:32 -0400, David Malcolm wrote: > Ping re: > > https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00321.html > > > On Fri, 2017-05-26 at 15:54 -0400, David Malcolm wrote: > > Ping: > >

Re: [PATCH] LFS support for libbacktrace

On 06/20/2017 05:15 AM, Richard Biener wrote: > On Wed, 14 Jun 2017, Richard Biener wrote: > >> >> This fixes the [f]open use in libgfortran. Doesn't fix the ones >> in libsanitizer because those appearantly use a copy because they >> need to rename stuff... >> >> Bootstrapped and tested on

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On Tue, Jun 27, 2017 at 3:59 PM, Richard Biener wrote: > On June 27, 2017 4:27:17 PM GMT+02:00, "Bin.Cheng" > wrote: >>On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener >> wrote: >>> On Fri, Jun 23, 2017 at 12:10 PM,

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On 6/27/17 11:07 AM, Segher Boessenkool wrote: > Not use an installed header, that's not what I'm asking. Share the > source file, i.e., just copy it over from the glibc source tree (it > should probably hold the master copy). Fewer typos, cannot forget to > update some entry, etc. Ah, that's

[PATCH rs6000] remove implicit static var outputs of toc_relative_expr_p

So, this is to set things up so I can in a future patch separate out the code that deals with optimizing byte swapping for LE on P8 into a separate file. The function toc_relative_expr_p implicitly sets two static vars (tocrel_base and tocrel_offset) that are declared in rs6000.c. The real

Re: [PATCH, 1/4] Show value of GOMP_OPENACC_DIM in libgomp nvptx plugin

On 06/26/2017 01:31 PM, Tom de Vries wrote: On 06/26/2017 01:24 PM, Tom de Vries wrote: Hi, I've written a patch series to facilitate debugging libgomp openacc testcase failures on the nvptx accelerator. When running an openacc test-case on an nvptx accelerator, the following happens: -

Re: [PATCH] Fix PR bootstrap/81217

On 06/27/2017 07:16 AM, Martin Liška wrote: > Hello. > > Following fixes the PR by removal of superfluous bootstrap_target. > > Ready to be installed? > > ChangeLog: > > 2017-06-27 Martin Liska > > PR bootstrap/81217 > * Makefile.def: Remove superfluous

Re: [PATCH][AArch64] Improve Cortex-A53 shift bypass

On Wed, Jun 14, 2017 at 2:55 PM, James Greenhalgh wrote: > On Fri, May 05, 2017 at 05:02:46PM +0100, Wilco Dijkstra wrote: >> Richard Earnshaw (lists) wrote: >> >> > --- a/gcc/config/arm/aarch-common.c >> > +++ b/gcc/config/arm/aarch-common.c >> > @@ -254,12 +254,7 @@

Re: fix libcc1 dependencies in toplevel Makefile

Hi Alex, > On Jun 26, 2017, at 09:16 , Olivier Hainque wrote: > >> I'd like to understand better what the concurrency problem is with the >> current build machinery, before we proceed with this change. If you >> manage to trigger the problem again, could you try to further

Re: [PATCH] PR libstdc++/81221 fix namespace qualification for parallel mode

On 27/06/17 15:46 +0100, Jonathan Wakely wrote: std::sample needs to call _GLIBCXX_STD_A::__sample instead of std::__sample, so that it works when Parallel Mode is active. PR libstdc++/81221 * include/bits/stl_algo.h (sample): Qualify with _GLIBCXX_STD_A not std.

Re: Fix genmultilib reuse rule checks for large sets of option combinations

On 06/08/2017 02:28 PM, Joseph Myers wrote: > genmultilib computes combination_space, a list of all combinations of > options in MULTILIB_OPTIONS that might have multilibs built for them > (some of which may end up not having multilibs built for them, and > some of those may end up being mapped to

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li wrote: > Hi Andrew, > > On 25/06/17 22:38, Andrew Pinski wrote: >> >> On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li wrote: >>> >>> Hi all, >>> >>> In this patch, a new integer register operand modifier 'r' is

Re: [PATCH 1/1] Remove ns32k leftover

On 06/24/2017 11:11 PM, Maya Rashish wrote: > Support for ns32k was removed in GCC4. > --- > include/longlong.h | 36 > 1 file changed, 36 deletions(-) Thanks. I added a ChangeLog entry and committed your change. jeff

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On Tue, Jun 27, 2017 at 10:55:53AM -0500, Peter Bergner wrote: > On 6/27/17 10:51 AM, Segher Boessenkool wrote: > > On Mon, Jun 26, 2017 at 10:33:48PM -0500, Peter Bergner wrote: > >> Tulio added support for two new AT_HWCAP2 bits to GLIBC which have been > >> recently added to the kernel: > >> >

Re: [Doc, AArch64] Fix/Update AArch64 options.

On 06/27/2017 06:19 AM, Yvan Roux wrote: diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index 942a7d5..0fd1bfa 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -146,7 +146,7 @@ EnumValue Enum(aarch64_abi) String(lp64)

Re: Backports to 6 (and 7, and 5)

On Tue, Jun 27, 2017 at 09:18:07AM +0200, Richard Biener wrote: > On Mon, 26 Jun 2017, Segher Boessenkool wrote: > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01853.html > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01923.html > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02048.html >

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On 6/27/17 10:51 AM, Segher Boessenkool wrote: > On Mon, Jun 26, 2017 at 10:33:48PM -0500, Peter Bergner wrote: >> Tulio added support for two new AT_HWCAP2 bits to GLIBC which have been >> recently added to the kernel: >> >> https://www.sourceware.org/ml/libc-alpha/2017-06/msg00069.html >> >>

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On Mon, Jun 26, 2017 at 10:33:48PM -0500, Peter Bergner wrote: > Tulio added support for two new AT_HWCAP2 bits to GLIBC which have been > recently added to the kernel: > > https://www.sourceware.org/ml/libc-alpha/2017-06/msg00069.html > > This patch adds support for them to the

Re: [PATCH] multiarch support for non-glibc linux systems

On 07/06/17 18:22, Szabolcs Nagy wrote: > Current multiarch directory name is always *-linux-gnu* on linux, > this patch configures different names for uclibc and musl targets. > (tested by the debian rebootstrap scripts for various *-linux-musl > and *-linux-uclibc targets see debian bug #861588)

Ping^2 Re: Fix genmultilib reuse rule checks for large sets of option combinations

Ping^2. This patch is still pending review. -- Joseph S. Myers jos...@codesourcery.com

Re: [Patch] Forward triviality in variant

On 18/06/17 12:37 -0700, Tim Shen via libstdc++ wrote: Besides the changes on the comments, I also changed the definition of _S_trivial_copy_assign and _S_trivial_move_assign to match what union has. See [class.copy.assign]p9. On Thu, Jun 1, 2017 at 8:13 AM, Jonathan Wakely wrote: On 30/05/17

Re: [PATCH][ARM] Update max_cond_insns settings

  ping     Richard Earnshaw (lists) wrote: > On 05/05/17 13:42, Wilco Dijkstra wrote: >> Richard Earnshaw (lists) wrote: >>> On 04/05/17 18:38, Wilco Dijkstra wrote: >>> > Richard Earnshaw wrote: >>> > > -  5, /* Max cond insns.  */ > +  2, 

Re: [PATCH][AArch64] Improve Cortex-A53 shift bypass

ping   On Fri, May 05, 2017 at 05:02:46PM +0100, Wilco Dijkstra wrote: > Richard Earnshaw (lists) wrote: > > > --- a/gcc/config/arm/aarch-common.c > > +++ b/gcc/config/arm/aarch-common.c > > @@ -254,12 +254,7 @@ arm_no_early_alu_shift_dep (rtx producer, rtx consumer) > >  return 0; > > 

Re: [PATCH][ARM] Remove movdi_vfp_cortexa8

  ping     Richard Earnshaw (lists) wrote: >  (define_insn "*movdi_vfp" > -  [(set (match_operand:DI 0 "nonimmediate_di_operand" > "=r,r,r,r,q,q,m,w,r,w,w, Uv") > +  [(set (match_operand:DI 0 "nonimmediate_di_operand" > "=r,r,r,r,q,q,m,w,!r,w,w, Uv") > Why have you introduced a no-reloads

Re: [PATCH][ARM] Fix ldrd offsets

    ping From: Wilco Dijkstra Sent: 03 November 2016 12:20 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Fix ldrd offsets     Fix ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020, without -255..4091.  This reduces the number of addressing instructions when using DI mode operations

Re: [PATCH][ARM] Remove Thumb-2 iordi_not patterns

  ping From: Wilco Dijkstra Sent: 17 January 2017 18:00 To: GCC Patches Cc: nd; Kyrylo Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove Thumb-2 iordi_not patterns     After Bernd's DImode patch [1] almost all DImode operations are expanded early (except for -mfpu=neon). This means the

Re: [PATCH][ARM] Improve max_insns_skipped logic

  ping From: Wilco Dijkstra Sent: 10 November 2016 17:19 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Improve max_insns_skipped logic     Improve the logic when setting max_insns_skipped.  Limit the maximum size of IT to MAX_INSN_PER_IT_BLOCK as otherwise multiple IT instructions are

Re: [PATCH][ARM] Remove DImode expansions for 1-bit shifts

  ping From: Wilco Dijkstra Sent: 17 January 2017 19:23 To: GCC Patches Cc: nd; Kyrill Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove DImode expansions for 1-bit shifts     A left shift of 1 can always be done using an add, so slightly adjust rtx cost for DImode left shift by 1 so

Re: [RFC][PATCH][AArch64] Cleanup frame pointer usage

ping   Wilco Dijkstra wrote: > James Greenhalgh wrote: > > > I note this is still marked as an RFC, are you now proposing it as a > > patch to be merged to trunk? > > Absolutely. It was marked as an RFC to get some comments - I thought it > may be controversial to separate the frame pointer

Re: [PATCH v3][AArch64] Fix symbol offset limit

ping From: Wilco Dijkstra Sent: 17 January 2017 15:14 To: Richard Earnshaw; GCC Patches; James Greenhalgh Cc: nd Subject: Re: [PATCH v3][AArch64] Fix symbol offset limit     Here is v3 of the patch - tree_fits_uhwi_p was necessary to ensure the size of a declaration is an integer. So the

Re: [PATCH] Move static chain and non-local goto init after NOTE_INSN_FUNCTION_BEG (PR sanitize/81186).

Hi, On Tue, 27 Jun 2017, Martin Liška wrote: > Following bug was for me very educative. I learned that we support > non-local gotos that can be combined with nested functions. Real fun :) > Well, the problem is that both cfun->nonlocal_goto_save_area and > cfun->static_chain_decl (emitted in

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

Hi Andrew, On 25/06/17 22:38, Andrew Pinski wrote: On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li wrote: Hi all, In this patch, a new integer register operand modifier 'r' is added. This will use the proper register name according to the mode of corresponding operand. 'w'

[C++ PATCH] Kill IDENTIFIER_TEMPLATE

I discovered IDENTIFIER_TEMPLATE is never assigned to, and consequently never non-null. Nuked after a successful bootstrap. nathan -- Nathan Sidwell 2017-06-27 Nathan Sidwell Kill IDENTIFIER_TEMPLATE. * cp-tree.h (lang_identifier): Remove class_template_info field.

Re: [PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

> diff --git a/gcc/ipa-visibility.c b/gcc/ipa-visibility.c > index d5a3ae56c46..69e6e295d55 100644 > --- a/gcc/ipa-visibility.c > +++ b/gcc/ipa-visibility.c > @@ -97,7 +97,8 @@ non_local_p (struct cgraph_node *node, void *data > ATTRIBUTE_UNUSED) >&& !DECL_EXTERNAL (node->decl) >

Re: [PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

On 06/27/2017 04:57 PM, Jan Hubicka wrote: >> Hello. >> >> Currently ifunc is interpreted as normal alias by IPA optimizations. That's >> problematic >> as should not consider ifunc alias as candidate for inlining, or redirection. >> >> Patch can bootstrap on ppc64le-redhat-linux and survives

Re: [PATCH][AArch64] Fix PR79041

On 27 June 2017 at 16:55, Yvan Roux wrote: > Hi > > On 27 June 2017 at 16:49, Wilco Dijkstra wrote: >> As described in PR79041, -mcmodel=large -mpc-relative-literal-loads >> may be used to avoid generating ADRP/ADD or ADRP/LDR. However both >> trunk

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On June 27, 2017 4:27:17 PM GMT+02:00, "Bin.Cheng" wrote: >On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener > wrote: >> On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng >wrote: >>> On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng

Re: [PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

> Hello. > > Currently ifunc is interpreted as normal alias by IPA optimizations. That's > problematic > as should not consider ifunc alias as candidate for inlining, or redirection. > > Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. > And survives MVC tests on

RE: [PATCH] Fold (a > 0 ? 1.0 : -1.0) into copysign (1.0, a) and a * copysign (1.0, a) into abs(a)

On June 27, 2017 4:52:28 PM GMT+02:00, Tamar Christina wrote: >> >> +(for cmp (gt ge lt le) >> >> + outp (convert convert negate negate) >> >> + outn (negate negate convert convert) >> >> + /* Transform (X > 0.0 ? 1.0 : -1.0) into copysign(1, X). */ >> >> + /*

Re: [PATCH][AArch64] Fix PR79041

Hi On 27 June 2017 at 16:49, Wilco Dijkstra wrote: > As described in PR79041, -mcmodel=large -mpc-relative-literal-loads > may be used to avoid generating ADRP/ADD or ADRP/LDR. However both > trunk and GCC7 may still emit ADRP for some constant pool literals. > Fix this

RE: [PATCH] Fold (a > 0 ? 1.0 : -1.0) into copysign (1.0, a) and a * copysign (1.0, a) into abs(a)

> >> +(for cmp (gt ge lt le) > >> + outp (convert convert negate negate) > >> + outn (negate negate convert convert) > >> + /* Transform (X > 0.0 ? 1.0 : -1.0) into copysign(1, X). */ > >> + /* Transform (X >= 0.0 ? 1.0 : -1.0) into copysign(1, X). */ > >> + /* Transform (X < 0.0 ? 1.0 :

Re: [PATCH] Bail out HARD_REGISTER vars in asan (PR sanitizer/81224).

On Tue, Jun 27, 2017 at 04:42:18PM +0200, Martin Liška wrote: > Similar to what we do for UBSAN and TSAN, DECL_HARD_REGISTER variables should > not > be instrumented. > > Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. > > Ready to be installed? > Martin > >

[PATCH][AArch64] Fix PR79041

As described in PR79041, -mcmodel=large -mpc-relative-literal-loads may be used to avoid generating ADRP/ADD or ADRP/LDR. However both trunk and GCC7 may still emit ADRP for some constant pool literals. Fix this by adding a aarch64_pcrelative_literal_loads check. OK for trunk/GCC7 backport?

[PATCH] PR libstdc++/81221 fix namespace qualification for parallel mode

std::sample needs to call _GLIBCXX_STD_A::__sample instead of std::__sample, so that it works when Parallel Mode is active. PR libstdc++/81221 * include/bits/stl_algo.h (sample): Qualify with _GLIBCXX_STD_A not std. * testsuite/25_algorithms/sample/81221.cc: New.

[PATCH] Bail out HARD_REGISTER vars in asan (PR sanitizer/81224).

Similar to what we do for UBSAN and TSAN, DECL_HARD_REGISTER variables should not be instrumented. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be installed? Martin gcc/ChangeLog: 2017-06-27 Martin Liska PR sanitizer/81224

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng wrote: >> On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote: >>> Hi, >>> I was asked by upstream to split the loop

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

On Tue, Jun 27, 2017 at 1:44 PM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 12:30 PM, Bin.Cheng wrote: >> On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote: >>> On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng

Re: [PATCH][AArch64] Fix ILP32 memory access

On 27/06/17 14:39, Wilco Dijkstra wrote: > This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c > triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html - > it supersedes https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01907.html > as this fixes the root cause of the

Use ucontext_t not struct ucontext in linux-unwind.h files

Current glibc no longer gives the ucontext_t type the tag struct ucontext, to conform with POSIX namespace rules. This requires various linux-unwind.h files in libgcc, that were previously using struct ucontext, to be fixed to use ucontext_t instead. This is similar to the removal of the struct

Re: [PATCH][AArch64] Fix ldp/stp patterns for ILP32

Hi, This patch has been superseded by: https://gcc.gnu.org/ml/gcc-patches/2017-06/msg02027.html Wilco

minor cleanups in x86*-vxworks support file

Hello, Minor cleanups, tested together with the previous patches introducing the vx7 support. Committing to mainline. With Kind Regards, Olivier 2017-06-27 Jerome Lambourg * config/i386/vxworks.h (ASM_SPEC): Remove definition. No target specific need,

Re: [Neon intrinsics] Literal vector construction through vcombine is poor

On 27/06/17 07:13, Michael Collison wrote: > Richard, > > I reworked the patch using an assert as you suggested. Bootstrapped and > retested. Okay for trunk? > Yes, fine thanks. R. > > -Original Message- > From: Richard Earnshaw (lists) [mailto:richard.earns...@arm.com] > Sent:

x86_64-vxworks* support, vxworks target files updates

Hello, Minor updates to the x86 specific config files for VxWorks, to account for 64bit ABIs. Tested together with the previous patches in the vx7 series, for x86_64-vxworks7 in particular. Committing to mainline. With Kind Regards, Olivier 2017-06-27 Jerome Lambourg

[PATCH][AArch64] Fix ILP32 memory access

This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html - it supersedes https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01907.html as this fixes the root cause of the failure. In ILP32 all memory accesses must have

Re: adjust libgcc build support for VxWorks to VxWorks 7

> On Jun 27, 2017, at 15:25 , Ian Lance Taylor wrote: > > On Tue, Jun 27, 2017 at 5:17 AM, Olivier Hainque wrote: >> >> 2017-06-27 Olivier Hainque >> >>libgcc/ >>* config/t-vxworks7: New file. >>*

Re: adjust libgcc build support for VxWorks to VxWorks 7

On Tue, Jun 27, 2017 at 5:17 AM, Olivier Hainque wrote: > > 2017-06-27 Olivier Hainque > > libgcc/ > * config/t-vxworks7: New file. > * config.host (*-*-vxworks7): Use it. This is OK. Thanks. Ian

[PATCH] Fix PR bootstrap/81217

Hello. Following fixes the PR by removal of superfluous bootstrap_target. Ready to be installed? ChangeLog: 2017-06-27 Martin Liska PR bootstrap/81217 * Makefile.def: Remove superfluous bootstrap_target from bootstrap_stage. * Makefile.in:

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Mon, Jun 26, 2017 at 10:37:03AM -0600, Martin Sebor wrote: > On 06/23/2017 08:46 AM, Marek Polacek wrote: > > This patch adds a variant of __typeof, called __typeof_noqual. As the name > > suggests, this variant always drops all qualifiers, not just when the type > > is atomic. This was

x86-vxworks7 and x86_64-vxworks7 support, "config" files

Hello, The "config" files bits for the x86 families of targets for which VxWorks 7 support is being introduced. Just accept the triplets on the libgcc end and handle the common need of x86-64.h for x86_64 on the gcc front. Tested together with the previous patches of the vxworks7 series.

[PATCH] Move static chain and non-local goto init after NOTE_INSN_FUNCTION_BEG (PR sanitize/81186).

Hi. Following bug was for me very educative. I learned that we support non-local gotos that can be combined with nested functions. Real fun :) Well, the problem is that both cfun->nonlocal_goto_save_area and cfun->static_chain_decl (emitted in expand_function_start) are put before

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng wrote: > On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote: >> Hi, >> I was asked by upstream to split the loop distribution patch into small ones. >> It is hard because data structure and algorithm are closely

[PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

Hello. Currently ifunc is interpreted as normal alias by IPA optimizations. That's problematic as should not consider ifunc alias as candidate for inlining, or redirection. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. And survives MVC tests on x86_64-linux-gnu.

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

On Fri, Jun 23, 2017 at 12:30 PM, Bin.Cheng wrote: > On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote: >> On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote: >>> Hi, >>> This is the main patch rewriting loop distribution in order

Re: [PATCH 2/2] C++: bulletproof the %H and %I format codes (PR c++/81167)

On 06/22/2017 08:20 PM, David Malcolm wrote: PR c++/81167 reports a case where a NULL is passed to one of these %qH, and it turns out that we now ICE for this case (with a gcc_assert) whereas previously we printed a '' for the type > This patch slightly reworks the %H and %I-handling code so

Re: [PATCH, 2/4] Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS} in libgomp nvptx plugin

On 06/26/2017 05:29 PM, Jakub Jelinek wrote: On Mon, Jun 26, 2017 at 03:26:57PM +, Joseph Myers wrote: On Mon, 26 Jun 2017, Tom de Vries wrote: 2. Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS} in libgomp nvptx plugin This patch adds handling of: - GOMP_OPENACC_NVPTX_SAVE_TEMPS=[01], and

[Doc, AArch64] Fix/Update AArch64 options.

Hi, I just noticed that some AArch64 options (-mpc-relative-literal-loads, -msign-return-address=scope and -moverride=string) are missing in the option summary part of the manual: https://gcc.gnu.org/onlinedocs/gcc/Option-Summary.html#Option-Summary and that the "-no" version of

adjust libgcc build support for VxWorks to VxWorks 7

Hello, This replicates for VxWorks 7 the "trick" used to let libgcc build for VxWorks in absence of fixincludes, namely the last piece libgcc/config/t-vxworks: ... # This ensures that the correct target headers are used; some # VxWorks system headers have names that collide with GCC's # internal

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