Re: [og7] vector_length extension part 2: Generalize state propagation and synchronization

On 03/21/2018 10:10 AM, Tom de Vries wrote: > On 03/02/2018 05:55 PM, Cesar Philippidis wrote: >> In addition, nvptx_cta_sync and the corresponding nvptx_barsync insn, >> have been extended to take a barrier ID and a thread count. The idea >> here is to assign one barrier for each logical vector.

Re: [PR c++/84789] do not resolve typename into template-independent

OK, thanks. On Wed, Mar 21, 2018 at 11:48 AM, Jason Merrill wrote: > On Tue, Mar 20, 2018 at 11:27 PM, Alexandre Oliva wrote: >> On Mar 20, 2018, Jason Merrill wrote: >> >>> On Tue, Mar 20, 2018 at 6:07 PM, Alexandre Oliva

C++ PATCH for c++/81311, wrong C++17 overload resolution

Here, the code in build_special_member_function to avoid involving the copy constructor in initialization from a prvalue was causing wrongly different overload resolution. To fix it, instead of trying to produce a prvalue there, we now go through normal overload resolution and then specifically

Re: [PATCH,rs6000] GCC -7, no swap optimization for vpermxor instruction

On 3/21/18 5:16 PM, Carl Love wrote: > The following patch is a back port from mainlin of a fix for [snip] > > 2018-03-21 Carl Love > > * config/rs6000/r6000.c (rtx_is_swappable_p): Add case UNSPEC_VPERMXOR. > > gcc/testsuite/ChangeLog: > > 2018-03-21 Carl Love

Re: [PATCH, rs6000] Fix PR83789: __builtin_altivec_lvx fails for powerpc for altivec-4.c

On 3/21/18 7:37 PM, Segher Boessenkool wrote: > On Wed, Mar 21, 2018 at 12:47:41PM -0500, Peter Bergner wrote: >> I'll note that GCC 7 does not need any of the changes to rs6000-p8swap.c, >> since that file doesn't exist and doesn't need to exist in GCC 7, so I've >> left those changes out. > >

Re: [Aarch64] Fix conditional branches with target far away.

Hi Sudakshina, As per the ARMv8 ARM, for the offset range (-1048576 ,1048572), the far branch instruction offset is inclusive of both the offsets. Hence, I am using <=||=> and not <||>= as it was in previous implementation. On 16 March 2018 at 00:51, Sudakshina Das wrote: > On

Re: [PR c++/84789] do not resolve typename into template-independent

On Mar 21, 2018, Jason Merrill wrote: > On Tue, Mar 20, 2018 at 11:27 PM, Alexandre Oliva wrote: >> I understood you were saying it was ok to peek in this case. Would you >> please state, for clarity, what your stance is on peeking in this case, >>

[C++ PATCH] Implement P0962

Tested on Linux-PPC64. 2018-03-22 Ville Voutilainen gcc/cp/ Implement P0962 * parser.c (cp_parser_perform_range_for_lookup): Change the condition for deciding whether to use members. testsuite/ Implement P0962 *

Re: [PATCH, rs6000] Fix PR83789: __builtin_altivec_lvx fails for powerpc for altivec-4.c

On Wed, Mar 21, 2018 at 12:47:41PM -0500, Peter Bergner wrote: > On 3/20/18 12:27 PM, Peter Bergner wrote: > > On 3/20/18 11:42 AM, Segher Boessenkool wrote: > >> On Mon, Mar 19, 2018 at 09:12:08PM -0500, Peter Bergner wrote: > >>> Looking at mu build dirs insn-modes.h, I don't see HAVE_V8HFmode

Adjust __builtin_tgmath handling of integer arguments to _FloatN narrowing macros

When adding __builtin_tgmath to support a better tgmath.h implementation, I noted that further changes might be needed regarding the TS 18661 functions that round their results to a narrower type, because of unresolved issues with how the corresponding type-generic macros are defined in TS 18661.

[PATCH] PR fortran/84922 -- Check MODULE prefix is used

If an interface body includes a MODULE prefix on a subroutine or function, then the prefix must appear on the contained subprogram. This patch does that check, and issues an error message. 2018-03-21 Steven G. Kargl PR fortran/84922 * decl.c

[PATCH,rs6000] GCC -7, no swap optimization for vpermxor instruction

GCC Maintainers: The following patch is a back port from mainlin of a fix for define_insn crypto_vpermxor_ in gcc/config/rs6000/crypto.md. The issue is the vpermxor instruction does not work correctly when the swap optimization is applied.   The issue was found as part of commit 258530 to

Re: [PATCH] [PR c++/71965] silence multi-dim array init sorry without tf_error

On Mar 20, 2018, Jason Merrill wrote: >> + if ((complain & tf_error)) >> + error ("cannot initialize multi-dimensional" >> + " array with initializer"); > Let's also use the other diagnostic message: "array must be > initialized

Re: [PR c++/84729] convert new init to array elt type

On Mar 20, 2018, Jason Merrill wrote: >> -permerror (input_location, >> - "parenthesized initializer in array new"); >> +error_at (input_location, >> + "parenthesized initializer in array new"); >

Re: [PATCH] [PR c++/84610,84642] recover from implicit template parms gracefully

On Mar 20, 2018, Jason Merrill wrote: > On Tue, Mar 20, 2018 at 5:57 PM, Alexandre Oliva wrote: >> On Mar 20, 2018, Jason Merrill wrote: > Let's put this in cp-tree.h, with warning_sentinel. >> + (void)cleanup; > There are lots of RAII

[PATCH] Fix ICE from path isolation (PR tree-optimization/84960)

Hi! On the following testcase, path isolation decides to duplicate a bb and redirect edge from ENTRY bb to its successor to this duplicate bb and tree cleanup then removes all other basic blocks as unreachable. When blocks are removed, forced labels are moved to their bb->prev_bb block, but

Re: [PATCH] Fix C FE ICE with vector comparison (PR c/84999)

On Wed, 21 Mar 2018, Jakub Jelinek wrote: > Hi! > > On ia32, we don't support __int128, nor mode (TI) integers, but we do > support 128-bit __float128 and (generic) vectors containing it. The result > of a comparison of such vectors is supposed to be integral vector with the > same element

Re: Deprecate not defining NO_IMPLICIT_EXTERN_C

On Wed, 21 Mar 2018, Nathan Sidwell wrote: > Unfortunately it's a negative-sense define, that now at least most ports > define. Do all ports define it? It's hard to determine that, because many > ports get it set via config/gnu-user.h or similar common file. Bare-metal ports often fail to

Re: [PATCH, fortran] PR84957 - [8 Regression] ICE in gfc_sym_type, at fortran/trans-types.c:2255

Hi Harald, The attached obvious patch fixes a NULL pointer dereference. Testcase derived from report. Changelogs below. Regtested on i686-pc-linux-gnu. Whoever reviews this, please feel free to commit. Reviewed and committed as r258745. Thanks for the patch! Regards Thomas

Re: [PATCH] Fix ICE from path isolation (PR tree-optimization/84960)

On March 21, 2018 9:24:06 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >On the following testcase, path isolation decides to duplicate a bb and >redirect edge from ENTRY bb to its successor to this duplicate bb and >tree cleanup then removes all other basic blocks as unreachable. >

[PATCH, fortran] PR84957 - [8 Regression] ICE in gfc_sym_type, at fortran/trans-types.c:2255

The attached obvious patch fixes a NULL pointer dereference. Testcase derived from report. Changelogs below. Regtested on i686-pc-linux-gnu. Whoever reviews this, please feel free to commit. Thanks, Harald 2018-03-21 Harald Anlauf PR fortran/84957 *

[C++ PATCH] Fix ICE with inline asm and MODIFY_EXPR/preinc/predec in output operand (PR c++/84961, take 2)

On Wed, Mar 21, 2018 at 01:01:38PM -0400, Jason Merrill wrote: > >> Hmm, it would be nice to share this with the similar patterns in > >> unary_complex_lvalue and cp_build_modify_expr. > > > You mean just outline the > > if (TREE_SIDE_EFFECTS (TREE_OPERAND (lhs, 0))) > > lhs =

[PATCH] Fix C FE ICE with vector comparison (PR c/84999)

Hi! On ia32, we don't support __int128, nor mode (TI) integers, but we do support 128-bit __float128 and (generic) vectors containing it. The result of a comparison of such vectors is supposed to be integral vector with the same element size, but we really don't want to allow one in this case,

Re: [og7] vector_length extension part 4: target hooks and automatic parallelism

On 03/21/2018 08:49 AM, Tom de Vries wrote: > On 03/02/2018 08:18 PM, Cesar Philippidis wrote: > >> og7-vl-part4-hooks.diff > >> diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c >> index 5642941c6a3..507c8671704 100644 >> --- a/gcc/config/nvptx/nvptx.c >> +++

Re: C++ PATCH to fix an ICE on invalid with OVERLOADs (PR c++/84854)

On Wed, Mar 21, 2018 at 02:55:36PM -0400, Jason Merrill wrote: > On Wed, Mar 21, 2018 at 2:37 PM, Marek Polacek wrote: > > On Thu, Mar 15, 2018 at 08:55:59AM -0400, Jason Merrill wrote: > >> On Thu, Mar 15, 2018 at 7:49 AM, Marek Polacek wrote: > >> > On

Re: Desire to allocate bit in DT_PARM bitmask for DEC FORMAT compatibility purposes

On 03/21/2018 12:38 PM, Janne Blomqvist wrote: > On Wed, Mar 21, 2018 at 7:29 PM, Jeff Law wrote: >> On 03/21/2018 11:25 AM, Jakub Jelinek wrote: >>> On Tue, Mar 20, 2018 at 12:41:25PM -0600, Jeff Law wrote: This is documented in the old manuals from DEC and I've found

[PR c++/85008] ICE looking for clone

This ICE turned out to be a latent bug exposed by moving the member fns onto the FIELDS list. We should be using DECL_CLONED_FUNCTION_P not DECL_CLONED_FUNCTION. Grepping showed another place (doing a similar linkage check) affected too. nathan -- Nathan Sidwell 2018-03-21 Nathan Sidwell

Re: C++ PATCH to fix an ICE on invalid with OVERLOADs (PR c++/84854)

On Wed, Mar 21, 2018 at 2:37 PM, Marek Polacek wrote: > On Thu, Mar 15, 2018 at 08:55:59AM -0400, Jason Merrill wrote: >> On Thu, Mar 15, 2018 at 7:49 AM, Marek Polacek wrote: >> > On Wed, Mar 14, 2018 at 02:06:36PM -0400, Jason Merrill wrote: >> >> On

Re: Desire to allocate bit in DT_PARM bitmask for DEC FORMAT compatibility purposes

On Wed, Mar 21, 2018 at 7:29 PM, Jeff Law wrote: > On 03/21/2018 11:25 AM, Jakub Jelinek wrote: >> On Tue, Mar 20, 2018 at 12:41:25PM -0600, Jeff Law wrote: >>> This is documented in the old manuals from DEC and I've found >>> essentially the same documentation in Oracle/Sun's

Re: C++ PATCH to fix an ICE on invalid with OVERLOADs (PR c++/84854)

On Thu, Mar 15, 2018 at 08:55:59AM -0400, Jason Merrill wrote: > On Thu, Mar 15, 2018 at 7:49 AM, Marek Polacek wrote: > > On Wed, Mar 14, 2018 at 02:06:36PM -0400, Jason Merrill wrote: > >> On Wed, Mar 14, 2018 at 11:59 AM, Marek Polacek wrote: > >> >

Re: [PATCH] Fix PR84512

Hi Eric, >> So it failed before Toms original patch. Please add sparc-solaris >> to the list of XFAILed targets. > > SPARC/Linux is affected too so sparc*-*-* instead. actually, it's sparc*-*-* && lp64 only. Done like this after testing on sparc-sun-solaris2.11 and i386-pc-solaris2.11.

Re: [C++ PATCH] Fix ICE with inline asm and MODIFY_EXPR/preinc/predec in output operand (PR c++/84961, take 2)

OK. On Wed, Mar 21, 2018 at 1:47 PM, Jakub Jelinek wrote: > On Wed, Mar 21, 2018 at 01:01:38PM -0400, Jason Merrill wrote: >> >> Hmm, it would be nice to share this with the similar patterns in >> >> unary_complex_lvalue and cp_build_modify_expr. >> >> > You mean just outline

Re: [C++ Patch] PR 84972 ("[6/7/8 Regression] ICE: tree check: expected class 'type', have 'exceptional' (error_mark)...")

OK. On Wed, Mar 21, 2018 at 5:28 AM, Paolo Carlini wrote: > Hi, > > as I told Marek in the audit trail, I'm working on a more complete patch > consistently changing maybe_deduce_size_from_array_init for various error > recovery issues (see the trail of c++/84632 too),

Re: [PATCH, rs6000] Fix PR83789: __builtin_altivec_lvx fails for powerpc for altivec-4.c

On 3/20/18 12:27 PM, Peter Bergner wrote: > On 3/20/18 11:42 AM, Segher Boessenkool wrote: >> On Mon, Mar 19, 2018 at 09:12:08PM -0500, Peter Bergner wrote: >>> Looking at mu build dirs insn-modes.h, I don't see HAVE_V8HFmode being >>> defined on either my LE or BE builds. What am I missing? >>

Re: [PATCH] PR 84615 Regressions due to type mismatch with character functions

On Wed, Mar 21, 2018 at 10:39:06AM +0200, Janne Blomqvist wrote: > Since the kind of the hidden character length variable is not part of > the character variable definition, we must ensure that character > lengths are always of the same kind in interfaces, regardless of how > they were declared in

[PATCH][ARM][PR target/84826] Fix ICE in extract_insn, at recog.c:2304 on arm-linux-gnueabi

Hi The ICE in the bug report was happening because the macro USE_RETURN_INSN (FALSE) was returning different values at different points in the compilation. This was internally occurring because the function arm_compute_static_chain_stack_bytes () which was dependent on arm_r3_live_at_start_p ()

Re: Desire to allocate bit in DT_PARM bitmask for DEC FORMAT compatibility purposes

On 03/21/2018 11:25 AM, Jakub Jelinek wrote: > On Tue, Mar 20, 2018 at 12:41:25PM -0600, Jeff Law wrote: >> This is documented in the old manuals from DEC and I've found >> essentially the same documentation in Oracle/Sun's current documentation >> as well as old MIPS documentation. I have a

Re: Desire to allocate bit in DT_PARM bitmask for DEC FORMAT compatibility purposes

On Tue, Mar 20, 2018 at 12:41:25PM -0600, Jeff Law wrote: > This is documented in the old manuals from DEC and I've found > essentially the same documentation in Oracle/Sun's current documentation > as well as old MIPS documentation. I have a high degree of confidence > it exists in IBM's

Re: [PATCH][ARM] Fix test pr82989.c for big endian and mthumb

Hi On 21/03/18 17:03, Kyrill Tkachov wrote: On 21/03/18 16:33, Christophe Lyon wrote: On 21 March 2018 at 13:11, Sudakshina Das wrote: Hi The test pr82989.c which was added in one of previous commits is failing for mthumb and big-endian configurations. The aim of this

Re: [og7] vector_length extension part 2: Generalize state propagation and synchronization

On 03/02/2018 05:55 PM, Cesar Philippidis wrote: In addition, nvptx_cta_sync and the corresponding nvptx_barsync insn, have been extended to take a barrier ID and a thread count. The idea here is to assign one barrier for each logical vector. Worker-single synchronization is controlled by

Re: Remove long-dead deprecation documentation

On 03/21/2018 05:11 AM, Nathan Sidwell wrote: Sandra, this removes the now-deleted deprecated features. AFAICT these have been gone for a long time -- 2008 is the most recent changelog entry -- so no need to put it in any release notes. ok? Yes, this is fine. At some point we might want

Re: [PATCH v2] C++: show private field accessor hints with -g and optimization (PR c++/84994)

OK. On Wed, Mar 21, 2018 at 12:52 PM, David Malcolm wrote: > On Tue, 2018-03-20 at 21:51 -0400, Jason Merrill wrote: >> On Tue, Mar 20, 2018 at 7:37 PM, David Malcolm >> wrote: >> > PR c++/84894 reports that the fix-it hints suggesting accessor >> >

Re: [PATCH][ARM] Fix test pr82989.c for big endian and mthumb

On 21/03/18 16:33, Christophe Lyon wrote: On 21 March 2018 at 13:11, Sudakshina Das wrote: Hi The test pr82989.c which was added in one of previous commits is failing for mthumb and big-endian configurations. The aim of this test was to check that NEON instructions are not

Re: [C++ PATCH] Fix ICE with inline asm and MODIFY_EXPR/preinc/predec in output operand (PR c++/84961)

On Wed, Mar 21, 2018 at 6:26 AM, Jakub Jelinek wrote: > On Tue, Mar 20, 2018 at 05:58:43PM -0400, Jason Merrill wrote: >> On Tue, Mar 20, 2018 at 5:04 PM, Jakub Jelinek wrote: >> > --- gcc/cp/semantics.c.jj 2018-03-20 11:58:17.069356145 +0100 >> > +++

[PATCH v2] C++: show private field accessor hints with -g and optimization (PR c++/84994)

On Tue, 2018-03-20 at 21:51 -0400, Jason Merrill wrote: > On Tue, Mar 20, 2018 at 7:37 PM, David Malcolm > wrote: > > PR c++/84894 reports that the fix-it hints suggesting accessor > > calls for > > private fields doesn't work with -g for -O1 and above. > > > > The issue is

Re: [PATCH][ARM] Fix test pr82989.c for big endian and mthumb

On 21 March 2018 at 13:11, Sudakshina Das wrote: > Hi > > The test pr82989.c which was added in one of previous commits is failing > for mthumb and big-endian configurations. The aim of this test was to > check that NEON instructions are not being used for simple shift >

Re: [C++ PATCH] Fix FIX_TRUNC_EXPR instantiation (PR c++/84942)

On Wed, Mar 21, 2018 at 4:42 AM, Jakub Jelinek wrote: > On Tue, Mar 20, 2018 at 05:00:34PM -0400, Jason Merrill wrote: >> On Mon, Mar 19, 2018 at 3:50 PM, Jakub Jelinek wrote: >> > +int a(__attribute__((b((int)__builtin_inf() * 1ULL / auto; >> >> This

[PR c++/84804] ICE with default arg, template friend & lambda

When instantiating a template we end up with a rather strange binding hierarchy -- the innermost binding is the template and the next one is the instantiation. Anyway, the upshot is we end up trying to push a tsubst'd lambda into the template itself and die because that's marked as a complete

Re: [PR c++/84789] do not resolve typename into template-independent

On Tue, Mar 20, 2018 at 11:27 PM, Alexandre Oliva wrote: > On Mar 20, 2018, Jason Merrill wrote: > >> On Tue, Mar 20, 2018 at 6:07 PM, Alexandre Oliva wrote: >>> On Mar 20, 2018, Jason Merrill wrote: that doesn't

Re: [og7] vector_length extension part 4: target hooks and automatic parallelism

On 03/02/2018 08:18 PM, Cesar Philippidis wrote: og7-vl-part4-hooks.diff diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c index 5642941c6a3..507c8671704 100644 --- a/gcc/config/nvptx/nvptx.c +++ b/gcc/config/nvptx/nvptx.c @@ -5205,14 +5205,36 @@ nvptx_simt_vf () return

Re: [parloops, PR83126], Use cached affine_ivs canonicalize_loop_ivs

On Wed, 21 Mar 2018, Tom de Vries wrote: > On 03/12/2018 01:14 PM, Richard Biener wrote: > > On Thu, 22 Feb 2018, Tom de Vries wrote: > > > > > Hi, > > > > > > this patch fixes an ICE in the parloops pass. > > > > > > The ICE (when compiling the test-case in attached patch) follows from the >

[PATCH], PR target/84914, Fix complex long double multiply/divide on PowerPC -mabi=ieeelongdouble

Joseph Myers pointed out that we call the wrong function for complex long double multiply and divide. This patch changes the functions called from __multc3/__divtc3 to __mulkc3/__divkc3. I have built this on power8 systems, both a little endian system, and a big endian system using

Re: Deprecate not defining NO_IMPLICIT_EXTERN_C

On 03/21/2018 10:18 AM, David Edelsohn wrote: AIX still requires implicit extern C. I previously have tried to disable the feature on AIX and it failed miserably. That's unfortunate :( nathan -- Nathan Sidwell

Re: [parloops, PR83126], Use cached affine_ivs canonicalize_loop_ivs

On Wed, Mar 21, 2018 at 3:06 PM, Tom de Vries wrote: > On 03/12/2018 01:14 PM, Richard Biener wrote: >> >> On Thu, 22 Feb 2018, Tom de Vries wrote: >> >>> Hi, >>> >>> this patch fixes an ICE in the parloops pass. >>> >>> The ICE (when compiling the test-case in attached

Re: [parloops, PR83126], Use cached affine_ivs canonicalize_loop_ivs

On 03/12/2018 01:14 PM, Richard Biener wrote: On Thu, 22 Feb 2018, Tom de Vries wrote: Hi, this patch fixes an ICE in the parloops pass. The ICE (when compiling the test-case in attached patch) follows from the fact that here in gen_parallel_loop the call to canonicalize_loop_ivs fails to

Re: [PATCH, rs6000] Finish implementation of __builtin_atlivec_lvx_v1ti

On 3/14/18 4:27 PM, Kelvin Nilsen wrote: > 2018-03-14 Kelvin Nilsen > > * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add > entries for V1TI variants of __builtin_altivec_ld builtin. > * config/rs6000/rs6000.c (altivec_expand_lv_builtin): Add

Re: Deprecate not defining NO_IMPLICIT_EXTERN_C

AIX still requires implicit extern C. I previously have tried to disable the feature on AIX and it failed miserably. Thanks, David On Wed, Mar 21, 2018 at 8:15 AM, Nathan Sidwell wrote: > Port maintainers CC'd, apologies if I've missed you. > > NO_IMPLICIT_EXTERN_C is a target

Re: Deprecate not defining NO_IMPLICIT_EXTERN_C

Isn't this an OS issue rather than a general port issue. Seems to me it will depend on the system header files. With a few notable exceptions I'm not sure the port maintainers can answer this for all their target OSs. R. On 21/03/18 12:15, Nathan Sidwell wrote: > Port maintainers CC'd,

Re: lm32 port?

The lm32 architecture is still included in the standard RTEMS tool set. However, I noticed that lm32-specific GCC bugs get not fixed. I was about to suggest to deprecated this architecture for RTEMS. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany

Re: [PATCH, gotools]: Add -test.timeout to to runtime gotools tests

On Wed, Mar 21, 2018 at 2:07 AM, Uros Bizjak wrote: > > Attached patch adds -test.timeout argument to runtime gotools test. > Without this argument, default 4 minute timeout instead of > $(GOTOOLS_TEST_TIMEOUT) is used which is way to short for slow > machines. > > Patch was

Re: [PATCH] Fix compile-time hog in MPX boundary checking (PR target/84988).

On Wed, Mar 21, 2018 at 01:40:08PM +0100, Martin Liška wrote: > 2018-03-21 Martin Liska > > PR target/84988 > * config/i386/i386.c (ix86_function_arg_advance): Do not call > chkp_type_bounds_count if MPX is not enabled. > --- > gcc/config/i386/i386.c | 3 ++-

Re: [PATCH] Fix compile-time hog in MPX boundary checking (PR target/84988).

On 03/21/2018 10:39 AM, Martin Liška wrote: On 03/21/2018 10:36 AM, Richard Biener wrote: On Tue, Mar 20, 2018 at 10:44 PM, Richard Sandiford wrote: Jeff Law writes: On 03/20/2018 01:36 PM, Martin Liška wrote: Hi. This is a work-around to not

Re: MAINTAINERS with no port

On 03/21/2018 08:02 AM, Richard Biener wrote: On Wed, Mar 21, 2018 at 12:38 PM, Nathan Sidwell wrote: I just had reason to look at the target maintainer list. There seems to be a couple of CPU ports listed in MAINTAINERS that do not exist in the config directory. Ok to

lm32 port?

I got a bounce from: lm32 port Sebastien Bourdeauducq 2011 seems the most recent period of activity (not counting mechanical interface changes). 2011-11-04 Ralf Corsépius * config/lm32/t-rtems: New. *

Re: Results for 8.0.1 20180316 (experimental) [trunk revision 258610] (GCC) libstdc++ testsuite on x86_64-pc-linux-gnu

On 20 March 2018 at 21:06, Jonathan Wakely wrote: > On 20 March 2018 at 21:02, François Dumont wrote: >> On 20/03/2018 19:20, Jonathan Wakely wrote: >>> >>> On 17 March 2018 at 09:01, Jonathan Wakely wrote: Native configuration is x86_64-pc-linux-gnu ===

Deprecate not defining NO_IMPLICIT_EXTERN_C

Port maintainers CC'd, apologies if I've missed you. NO_IMPLICIT_EXTERN_C is a target machine define that turns off wrapping system header files in 'extern "C" { ... }'. It is the remaining non-deprecated ARM-era compatibility behaviour. Can we deprecated it? Unfortunately it's a

[PATCH][ARM] Fix test pr82989.c for big endian and mthumb

Hi The test pr82989.c which was added in one of previous commits is failing for mthumb and big-endian configurations. The aim of this test was to check that NEON instructions are not being used for simple shift operations. The scanning of lsl and lsr instructions and checking its counts were

Re: MAINTAINERS with no port

On Wed, Mar 21, 2018 at 12:38 PM, Nathan Sidwell wrote: > I just had reason to look at the target maintainer list. There seems to be > a couple of CPU ports listed in MAINTAINERS that do not exist in the config > directory. > > Ok to remove? (Jeff you're the lucky, 'who do I

Re: Fix ICE after sorry for big stack arguments (PR 84964)

On Wed, Mar 21, 2018 at 12:16 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Wed, Mar 21, 2018 at 11:48 AM, Richard Sandiford >> wrote: >>> Richard Biener writes:

Re: [PATCH][ARM][PR82989] Fix unexpected use of NEON instructions for shifts

Hi On 21/03/18 08:51, Christophe Lyon wrote: On 20 March 2018 at 11:58, Sudakshina Das wrote: Hi On 20/03/18 10:03, Richard Earnshaw (lists) wrote: On 14/03/18 10:11, Sudakshina Das wrote: Hi This patch fixes PR82989 so that we avoid NEON instructions when

MAINTAINERS with no port

I just had reason to look at the target maintainer list. There seems to be a couple of CPU ports listed in MAINTAINERS that do not exist in the config directory. Ok to remove? (Jeff you're the lucky, 'who do I ask' recipient) nathan -- Nathan Sidwell 2018-03-21 Nathan Sidwell

Re: Fix ICE after sorry for big stack arguments (PR 84964)

Richard Biener writes: > On Wed, Mar 21, 2018 at 11:48 AM, Richard Sandiford > wrote: >> Richard Biener writes: >>> On Wed, Mar 21, 2018 at 9:33 AM, Richard Sandiford >>> wrote:

Remove long-dead deprecation documentation

Sandra, this removes the now-deleted deprecated features. AFAICT these have been gone for a long time -- 2008 is the most recent changelog entry -- so no need to put it in any release notes. ok? nathan -- Nathan Sidwell 2018-03-21 Nathan Sidwell * doc/extend.texi

[PR c++/84836] ICE with local scopes

I'd flubbed the condition on when a local binding was updated, leading to an ICE when popping them. For a local overload set we need to look in the binding list and find the one to update. We didn't do that when we'd already hidden a TYPE_DECL of the same name. Fixed thusly. nathan --

Re: Fix ICE after sorry for big stack arguments (PR 84964)

On Wed, Mar 21, 2018 at 11:48 AM, Richard Sandiford wrote: > Richard Biener writes: >> On Wed, Mar 21, 2018 at 9:33 AM, Richard Sandiford >> wrote: >>> Index: gcc/diagnostic.c >>>

Re: Fix ICE after sorry for big stack arguments (PR 84964)

Richard Biener writes: > On Wed, Mar 21, 2018 at 9:33 AM, Richard Sandiford > wrote: >> Index: gcc/diagnostic.c >> === >> --- gcc/diagnostic.c2018-03-01

Re: [parloops, PR83126], Use cached affine_ivs canonicalize_loop_ivs

On Wed, 21 Mar 2018, Tom de Vries wrote: > On 03/12/2018 01:14 PM, Richard Biener wrote: > > On Thu, 22 Feb 2018, Tom de Vries wrote: > > > I can > > > rework the bit of the patch that adds an assert after > > > canonicalize_loop_ivs > > > into a patch that aborts the optimization instead of

Re: Use SCEV information when aligning for vectorisation (PR 84005)

On Tue, Mar 20, 2018 at 4:26 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Mon, Mar 19, 2018 at 10:27 PM, Richard Sandiford >> wrote: >>> Richard Biener writes:

Re: [parloops, PR83126], Use cached affine_ivs canonicalize_loop_ivs

On 03/12/2018 01:14 PM, Richard Biener wrote: On Thu, 22 Feb 2018, Tom de Vries wrote: I can rework the bit of the patch that adds an assert after canonicalize_loop_ivs into a patch that aborts the optimization instead of ICE-ing. I think that's something reasonable anyway. Patch attached

Re: [PATCH] Prefer mempcpy to memcpy on x86_64 target (PR middle-end/81657).

On Wed, Mar 14, 2018 at 02:54:00PM +0100, Martin Liška wrote: > > The variable is not named very well, shouldn't it be avoid_libcall or > > something similar? Perhaps the variable should have a comment describing > > what it is. Do you need separate argument for that bool and > > is_move_done,

Re: [C++ PATCH] Fix ICE with inline asm and MODIFY_EXPR/preinc/predec in output operand (PR c++/84961)

On Tue, Mar 20, 2018 at 05:58:43PM -0400, Jason Merrill wrote: > On Tue, Mar 20, 2018 at 5:04 PM, Jakub Jelinek wrote: > > --- gcc/cp/semantics.c.jj 2018-03-20 11:58:17.069356145 +0100 > > +++ gcc/cp/semantics.c 2018-03-20 21:56:43.745292245 +0100 > > @@ -1512,6 +1512,26

Re: [PATCH] Fix up handling of bool BIT_NOT_EXPRs in store-merging (PR tree-optimization/84982, take 2)

On Wed, 21 Mar 2018, Jakub Jelinek wrote: > On Wed, Mar 21, 2018 at 09:20:40AM +0100, Richard Biener wrote: > > > + tree lhs = gimple_assign_lhs (info->stmt); > > > + if (TREE_CODE (TREE_TYPE (lhs)) == BOOLEAN_TYPE && info->bitsize > 1) > > > > So I'm slightly uncomfortable with keying this

[PATCH] Fix up handling of bool BIT_NOT_EXPRs in store-merging (PR tree-optimization/84982, take 2)

On Wed, Mar 21, 2018 at 09:20:40AM +0100, Richard Biener wrote: > > + tree lhs = gimple_assign_lhs (info->stmt); > > + if (TREE_CODE (TREE_TYPE (lhs)) == BOOLEAN_TYPE && info->bitsize > 1) > > So I'm slightly uncomfortable with keying this just on BOOLEAN_TYPE. > Do you think anything

Re: Fix ICE after sorry for big stack arguments (PR 84964)

On Wed, Mar 21, 2018 at 9:33 AM, Richard Sandiford wrote: > After the sorry we'd skip storing the argument, but that just creates an > inconsistency later when we try to deallocate the arguments. This used to > "work" because pending_stack_adjust and

Re: poly_span_traits fixes (PR 84811)

On Wed, Mar 21, 2018 at 9:31 AM, Richard Sandiford wrote: > This patch fixes incorrect results for HOST_WIDE_INT positions > at opposite extremes when used with HOST_WIDE_INT sizes. It also > fixes UB when comparing such positions with unsigned HOST_WIDE_INT > sizes

Re: [PATCH, PR84660] Fix combine bug with SHIFT_COUNT_TRUNCATED.

On Tue, Mar 20, 2018 at 11:10 PM, Jim Wilson wrote: > This fixes a wrong-code issue on RISC-V, but in theory could be a problem for > any SHIFT_COUNT_TRUNCATED target. > > The testcase computes 46 or 47 (0x2e or 0x2f), then ANDs the value with 0xf, > and then SHIFTs the value.

Re: [PATCH] Fix compile-time hog in MPX boundary checking (PR target/84988).

On 03/21/2018 10:36 AM, Richard Biener wrote: On Tue, Mar 20, 2018 at 10:44 PM, Richard Sandiford wrote: Jeff Law writes: On 03/20/2018 01:36 PM, Martin Liška wrote: Hi. This is a work-around to not iterate all members of array that can be

Re: [PATCH] Fix compile-time hog in MPX boundary checking (PR target/84988).

On Tue, Mar 20, 2018 at 10:44 PM, Richard Sandiford wrote: > Jeff Law writes: >> On 03/20/2018 01:36 PM, Martin Liška wrote: >>> Hi. >>> >>> This is a work-around to not iterate all members of array that can be huge. >>> As MPX will be removed in

[C++ Patch] PR 84972 ("[6/7/8 Regression] ICE: tree check: expected class 'type', have 'exceptional' (error_mark)...")

Hi, as I told Marek in the audit trail, I'm working on a more complete patch consistently changing maybe_deduce_size_from_array_init for various error recovery issues (see the trail of c++/84632 too), but since this specific regression ultimately started with a previous change of mine and

Re: [PATCH PR84969]Don't reorder builtin memsets if they set different rhs values

On Tue, Mar 20, 2018 at 7:18 PM, Bin Cheng wrote: > Hi, > As noted in PR84969, fuse_memset_builtins breaks dependence between different > memsets. > Specifically, it reorders different builtin memset partitions though it > doesn't merge > them in the end. This simple patch

Re: [PR middle-end/70359] uncoalesce IVs outside of loops

On Tue, Mar 20, 2018 at 7:15 PM, Bin.Cheng wrote: > On Tue, Mar 20, 2018 at 5:56 PM, Richard Biener > wrote: >> On March 20, 2018 6:11:53 PM GMT+01:00, "Bin.Cheng" >> wrote: >>>On Mon, Mar 19, 2018 at 5:08 PM, Aldy

Re: [PATCH][arm] PR target/82518: Return false in ARRAY_MODE_SUPPORTED_P for BYTES_BIG_ENDIAN

On 21/03/18 09:07, Christophe Lyon wrote: On 20 March 2018 at 18:11, Kyrill Tkachov wrote: Hi all, This PR shows that we get the load/store_lanes logic wrong for arm big-endian. It is tricky to get right. Aarch64 does it by adding the appropriate lane-swapping

Re: [PATCH][arm] PR target/82518: Return false in ARRAY_MODE_SUPPORTED_P for BYTES_BIG_ENDIAN

On 20 March 2018 at 18:11, Kyrill Tkachov wrote: > Hi all, > > This PR shows that we get the load/store_lanes logic wrong for arm > big-endian. > It is tricky to get right. Aarch64 does it by adding the appropriate > lane-swapping > operations during expansion. > >

[PATCH, gotools]: Add -test.timeout to to runtime gotools tests

Hello! Attached patch adds -test.timeout argument to runtime gotools test. Without this argument, default 4 minute timeout instead of $(GOTOOLS_TEST_TIMEOUT) is used which is way to short for slow machines. Patch was tested on alphaev68-linux-gnu. Uros. diff --git a/gotools/Makefile.am

Re: [PATCH] Fix PR84512

> So it failed before Toms original patch. Please add sparc-solaris > to the list of XFAILed targets. SPARC/Linux is affected too so sparc*-*-* instead. -- Eric Botcazou

Re: [PATCH][ARM][PR82989] Fix unexpected use of NEON instructions for shifts

On 20 March 2018 at 11:58, Sudakshina Das wrote: > Hi > > On 20/03/18 10:03, Richard Earnshaw (lists) wrote: >> >> On 14/03/18 10:11, Sudakshina Das wrote: >>> >>> Hi >>> >>> This patch fixes PR82989 so that we avoid NEON instructions when >>> -mneon-for-64bits is not enabled.

[wwwdocs] Couple of items for gcc-8/changes.html

Plus a wording change for the sake of consistency. OK to commit? -- Eric BotcazouIndex: htdocs/gcc-8/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v retrieving revision 1.47 diff -u -r1.47 changes.html ---

Re: [C++ PATCH] Fix FIX_TRUNC_EXPR instantiation (PR c++/84942)

On Tue, Mar 20, 2018 at 05:00:34PM -0400, Jason Merrill wrote: > On Mon, Mar 19, 2018 at 3:50 PM, Jakub Jelinek wrote: > > +int a(__attribute__((b((int)__builtin_inf() * 1ULL / auto; > > This seems like another situation like 84610 and 84642 that Alex sent > a patch for, of

[PATCH] PR 84615 Regressions due to type mismatch with character functions

Since the kind of the hidden character length variable is not part of the character variable definition, we must ensure that character lengths are always of the same kind in interfaces, regardless of how they were declared in the source. This patch ensures this when calling a procedure. Regtested

Fix ICE after sorry for big stack arguments (PR 84964)

After the sorry we'd skip storing the argument, but that just creates an inconsistency later when we try to deallocate the arguments. This used to "work" because pending_stack_adjust and stack_pointer_delta were int rather than HWI, so 1<<33 got truncated to 0. It's not easy to back out at this

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