Emit a variable defined in gcc

Hello, I am working on a gcc patch for asan. The patch is almost ready except one thing. To make sure that the user has applied this patch before using asan feature, I want to declare an additional variable in gcc which is referenced by our source code so that if this patch is missing, the user

Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.

On Mon, Jun 29, 2020 at 01:42:56PM -0500, Segher Boessenkool wrote: > Hi! > > On Mon, Jun 29, 2020 at 02:23:22PM -0400, Michael Meissner wrote: > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c > > @@ -0,0 +1,13 @@ > > +/* { dg-do compile } */ > > +/* {

[PATCH] RISC-V: Handle multi-letter extension for multilib-generator

- The order of multi-lib config could be wrong if multi-ltter are used, e.g. `./multilib-generator rv32izfh-ilp32--c`, would expect rv32ic_zfh/ilp32 reuse rv32izfh/ilp32, however the multi-ltter is not handled correctly, it will generate reuse rule for rv32izfhc/ilp32 which is invalid

RE: [PATCH PR95855]A missing ifcvt optimization to generate fcsel

Hi, > > Hi, > > > > This is a simple fix for pr95855. > > > > With this fix, pass_split_paths can recognize the if-conversion > opportunity of the testcase and doesn't duplicate the corresponding block. > > > > Added one testcase for this. Bootstrap and tested on both aarch64 and >

[PATCH] RISC-V: Preserve arch version info during normalizing arch string

- Arch version should preserved if user explicitly specified the version. e.g. After normalize, -march=rv32if3d should be -march=rv32i_f3p0d instead of-march=rv32ifd. gcc/ChangeLog: * common/config/riscv/riscv-common.c(riscv_subset_t): New field added.

[PATCH PR95961] vect: ICE: in exact_div, at poly-int.h:2182

Hi, PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95961 In the test case for PR95961, vectorization factor computed by vect_determine_vectorization_factor is [8,8]. But this is updated to [1,1] later by vect_update_vf_for_slp. When we call vect_get_num_vectors in

[wwwdocs PATCH] Fix typo

Hi, this patch fix a typo in contribute.html. Best Regards. Hujp --- htdocs/contribute.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/htdocs/contribute.html b/htdocs/contribute.html index 80a4470e..a913565b 100644 --- a/htdocs/contribute.html +++

Re: [RFC] rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Mon, 29 Jun 2020, Richard Biener via Gcc-patches wrote: > I'm not sure if the actual choice of macro values for the fe* builtins > need glueing logic or if we want them to be determined statically > by the target configuration - see how we handle folding of > fpclassify. At least without

Re: [PATCH] [og10] amdgcn: Add waitcnt after LDS write instructions

On 29 Jun 2020 22:03, "Brown, Julian" wrote: On Mon, 29 Jun 2020 21:32:41 +0100 Andrew Stubbs wrote: > In particular, it seems logical that any barrier should be a memory > barrier, so inserting it in the barrier pattern is not a big deal. > IIRC, only OpenACC is using that anyway (OpenMP has

[PATCH] PR middle-end/90597: gcc_assert ICE in layout_type

It turns out that the ICE diagnosed/fixed in my earlier nvptx patch, caused by TYPE_SIZE(type) being zero during error handling in gcc.dg/attr-vector_size.c is actually fairly common among backends, and is known in bugzilla as PR middle-end/90597, apparently a recent regression. The following

RE: [PATCH 5/6 ver 3] rs6000, Add vector splat builtin support

On Mon, 2020-06-29 at 16:58 -0500, Segher Boessenkool wrote: > On Mon, Jun 29, 2020 at 02:29:54PM -0700, Carl Love wrote: > > Segher: > > > > On Thu, 2020-06-25 at 17:39 -0500, Segher Boessenkool wrote: > > > > +;; Return 1 if op is a constant 32-bit floating point value > > > >

Re: [RFC] rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Mon, Jun 29, 2020 at 11:45:41PM +0200, Marc Glisse wrote: > On Mon, 29 Jun 2020, Segher Boessenkool wrote: > > >Another question. How do these builtins prevent other FP insns from > >being moved (or optimised) "over" them? > > At the GIMPLE level they don't. And not at RTL level, either. >

Re: [PATCH 5/6 ver 3] rs6000, Add vector splat builtin support

On Mon, Jun 29, 2020 at 02:29:54PM -0700, Carl Love wrote: > Segher: > > On Thu, 2020-06-25 at 17:39 -0500, Segher Boessenkool wrote: > > > +;; Return 1 if op is a constant 32-bit floating point value > > > +(define_predicate "f32bit_const_operand" > > > + (match_code "const_double") > > > +{ >

Re: [RFC] rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Mon, 29 Jun 2020, Segher Boessenkool wrote: Another question. How do these builtins prevent other FP insns from being moved (or optimised) "over" them? At the GIMPLE level they don't. They prevent other function calls from moving across, just because function calls where at least one is

Re: [PATCH] Accept "user" as an alias for "login" in .netrc

Please ignore this (unless you happen to be a wget maintainer in a different life ;-). As a friendly soul pointed out - wrong address... Gerald

RE: [PATCH 5/6 ver 3] rs6000, Add vector splat builtin support

Segher: On Thu, 2020-06-25 at 17:39 -0500, Segher Boessenkool wrote: > > +;; Return 1 if op is a constant 32-bit floating point value > > +(define_predicate "f32bit_const_operand" > > + (match_code "const_double") > > +{ > > + if (GET_MODE (op) == SFmode) > > +return 1; > > + > > + else if

Go patch committed: Remove some erroneous code that was never run

This patch to the Go frontend removes some erroneous code that was never run. The code accidentally called Type::type_descriptor rather than the do_type_descriptor method. Calling Type::type_descriptor with a second argument of NULL would always crash. Since that never happened, it revealed

[PATCH, committed] PR fortran/95978 - [10/11 Regression] ICE in gfc_match_data, at fortran/decl.c:731

Committed as obvious on mastger. Regtested on x86_64-pc-linux-gnu. Will backport to 10-branch. Thanks, Harald PR fortran/95978 - ICE in gfc_match_data, at fortran/decl.c:731 Catch NULL pointer dereference on invalid DATA statement. gcc/fortran/ PR fortran/95978 * decl.c

[patch, fortran, committed] Fix bogus recursion check

Hello world, I just committed the attached patch as obvious and simple. It's one line, or alternatively, 24 characters long :-) Best regards Thomas Do not generate recursion check for compiler-generated procedures. This one-line fix removes a check for recursion for procedures which

Re: [PATCH] [og10] amdgcn: Add waitcnt after LDS write instructions

On Mon, 29 Jun 2020 21:32:41 +0100 Andrew Stubbs wrote: > On 29/06/2020 21:16, Julian Brown wrote: > > Data-share write (ds_write) instructions do not necessarily complete > > the write to LDS immediately. When a write completes, LGKM_CNT is > > decremented. For now, we wait until LGKM_CNT

[PATCH] PR fortran/95980 - ICE in get_unique_type_string, at fortran/class.c:485

Dear all, here's a couple of NULL pointer dereferences on invalid code. Regtested on x86_64-pc-linux-gnu. OK for master? Thanks, Harald PR fortran/95980 - ICE on using sync images with -fcheck=bounds In SELECT TYPE, the argument may be an incorrectly specified unlimited polymorphic

Re: [RFC] rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

Hi! On Mon, Jun 29, 2020 at 08:49:05AM +0200, Richard Biener via Gcc-patches wrote: > On Fri, Jun 26, 2020 at 10:12 PM Raoni Fassina Firmino via Gcc-patches > wrote: > > This is an early draft I'm working on to add fegetround , feclearexcept > > and feraiseexcept as builtins on rs6000. This is

Re: [PATCH] [og10] amdgcn: Add waitcnt after LDS write instructions

On 29/06/2020 21:16, Julian Brown wrote: Data-share write (ds_write) instructions do not necessarily complete the write to LDS immediately. When a write completes, LGKM_CNT is decremented. For now, we wait until LGKM_CNT reaches zero after each ds_write instruction. This fixes a race condition

[PATCH] [og10] OpenACC: Fix race condition in Fortran loop collapse tests

The gangs participating in a gang-partitioned loop are not all guaranteed to complete before some given gang continues to execute beyond that loop. This means that two existing test cases contain a race condition, because a loop that may be gang-partitioned is followed immediately by another loop.

[PATCH] [og10] OpenACC: Turn off worker partitioning if num_workers==1

This patch turns off the middle-end worker-partitioning support if the number of workers for an outlined offload function is one. In that case, we do not need to perform the broadcasting/neutering code transformation. OK for og10 branch? Julian ChangeLog gcc/ * omp-offload.c

[PATCH] [og10] OpenACC: Shared memory layout optimisation

This patch implements an algorithm to lay out local data-share (LDS) space. It currently works for AMD GCN. At the moment, LDS is used for three things: 1. Gang-private variables 2. Reduction temporaries (accumulators) 3. Broadcasting for worker partitioning After the patch is applied,

[PATCH] [og10] OpenACC: Fix mkoffload SGPR/VGPR count parsing for HSACO v3

If an offload kernel uses a large number of VGPRs, AMD GCN hardware may need to limit the number of threads/workers launched for that kernel. The number of SGPRs/VGPRs in use is detected by mkoffload and recorded in the processed output. The patterns emitted detailing SGPR/VGPR occupancy changed

[PATCH] [og10] amdgcn: Add waitcnt after LDS write instructions

Data-share write (ds_write) instructions do not necessarily complete the write to LDS immediately. When a write completes, LGKM_CNT is decremented. For now, we wait until LGKM_CNT reaches zero after each ds_write instruction. This fixes a race condition in the case where LDS is read immediately

[PATCH] [og10] OpenACC: Remove unnecessary barriers (gimple worker partitioning/broadcast)

This is an optimisation for middle-end worker-partitioning support (used to support multiple workers on AMD GCN). At present, barriers may be emitted in cases where they aren't needed and cannot be optimised away. This patch stops the extraneous barriers from being emitted in the first place.

Re: [PATCH v2] arm: Warn if IRQ handler is not compiled with -mgeneral-regs-only [PR target/94743]

Ping? On Tue, 9 Jun 2020 at 11:48, Christophe Lyon wrote: > > Ping? > > Maybe I could mention that LLVM emits a warning in this case > (https://reviews.llvm.org/D28820). > > Thanks, > > Christophe > > > On Wed, 3 Jun 2020 at 15:23, Christophe Lyon > wrote: > > > > Ping? > >

[PATCH] [8/9/10/11 Regression] PR fortran/93423 - ICE on invalid with argument list for module procedure

Early ping (might make it into 10.2). > A simple situation where a NULL pointer dereference occurs during error > recovery. > > Regtested on x86_64-pc-linux-gnu. > > OK for master / backports? > > Thanks, > Harald > > > PR fortran/93423 - ICE on invalid with argument list for module procedure >

[PATCH] [9/10/11 Regression] PR fortran/93337 - ICE in gfc_dt_upper_string, at fortran/module.c:441

Early ping (might make it into 10.2.1). > This PR is due to a plain NULL pointer that needs to get caught in the right > place. > > Regtested on x86_64-pc-linux-gnu. > > OK for master / backports where applicable? > > Thanks, > Harald > > > PR fortran/93337 - ICE in gfc_dt_upper_string, at

Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.

Hi! On Mon, Jun 29, 2020 at 02:23:22PM -0400, Michael Meissner wrote: > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c > @@ -0,0 +1,13 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target powerpc_prefixed_addr } */ > +/* { dg-require-effective-target lp64

Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.

>From 212475e5757fe3335cba30c9c3eec1707ac0c271 Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Sat, 27 Jun 2020 00:40:48 -0500 Subject: [PATCH, committed] Add PowerPC tests for power10. 2020-06-27 Michael Meissner * gcc.target/powerpc/prefix-add.c: New test. *

Re: PSA: Default C++ dialect is now C++17

On 6/29/20 9:51 AM, Martin Liška wrote: On 6/26/20 9:34 PM, Marek Polacek via Gcc-patches wrote: As discussed last month: it's time to change the C++ default to gnu++17.  I've committed the patch after testing x86_64-pc-linux-gnu

Re: [PATCH 2/7 v5] rs6000: lenload/lenstore optab support

Hi Kewen, On Mon, Jun 29, 2020 at 02:32:47PM +0800, Kewen.Lin wrote: > V5: Like V4. It is still okay for trunk, like before :-) Segher

Re: PSA: Default C++ dialect is now C++17

On 6/29/20 4:57 PM, Marek Polacek wrote: On Mon, Jun 29, 2020 at 09:51:57AM +0200, Martin Liška wrote: On 6/26/20 9:34 PM, Marek Polacek via Gcc-patches wrote: As discussed last month: it's time to change the C++ default to

[PATCH] nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c

This patch addresses the ICE in gcc.dg/attr-vector_size.c during make -k check on nvptx-none. The actual ICE looks like: testsuite/gcc.dg/attr-vector_size.c:29:1: internal compiler error: in tree_to_shwi, at tree.c:7321 0xf53bf2 tree_to_shwi(tree_node const*) ../../gcc/gcc/tree.c:7321

[committed] middle-end: Optimize (A)^(B) to (A^B) in simplify_rtx (take 3).

Hi Richard, Many thanks for the review. Many thanks also to Hans-Peter Nilsson, Joseph Myers and overse...@gcc.gnu.org for helping get my ssh keys updated. I've taken the opportunity of committing this patch to check that everything is working. For the record, here's the final version as

Re: [PATCH] underline null argument in -Wnonnull (PR c++/86568)

On 6/29/20 3:24 AM, Andreas Schwab wrote: This breaks bootstrap: In static member function 'static Expression* Type::type_descriptor(Gogo*, Type*)', inlined from 'virtual Expression* Named_type::do_type_descriptor(Gogo*, Named_type*)' at ../../gcc/go/gofrontend/types.cc:4:53,

Re: [PATCH] c++: Make convert_like complain about bad ck_ref_bind again [PR95789]

Ping. On Mon, Jun 22, 2020 at 10:09:27PM -0400, Marek Polacek via Gcc-patches wrote: > convert_like issues errors about bad_p conversions at the beginning > of the function, but in the ck_ref_bind case, it only issues them > after we've called convert_like on the next conversion. > > This

Re: PSA: Default C++ dialect is now C++17

On Mon, Jun 29, 2020 at 09:51:57AM +0200, Martin Liška wrote: > On 6/26/20 9:34 PM, Marek Polacek via Gcc-patches wrote: > > As discussed last month: > > > > it's time to change the C++ default to gnu++17. I've committed the patch

Re: [PATCH] reassoc: Propagate PHI_LOOP_BIAS along single uses

On Thu, 2020-06-25 at 14:34 +0200, Richard Biener wrote: > On Wed, Jun 24, 2020 at 1:31 AM Ilya Leoshkevich via Gcc-patches > wrote: > > Bootstrapped and regtested x86_64-redhat-linux, ppc64le-redhat- > > linux and > > s390x-redhat-linux. I also ran SPEC 2006 and 2017 on these > > platforms, > >

[PATCH] Accept "user" as an alias for "login" in .netrc

On one of my system I have been getting warnings like wget: .../.netrc:2: unknown token "user" wget: .../.netrc:2: unknown token "..." wget: .../.netrc:8: unknown token "user" wget: .../.netrc:8: unknown token "..." wget: .../.netrc:15: unknown token "user" wget: .../.netrc:15:

Re: [PATCH] coroutines: Collect the function body rewrite code.

On 6/27/20 4:13 PM, Iain Sandoe wrote: Hi, This is a enabler patch that enables a reasonable approach to fixing 5 reported PRs (it doesn’t fix anything in its own right). It has been tested on x86_64-linux, darwin, powerpc64-linux OK for master / 10.2? thanks Iain OK, yes it was quite a

[PATCH] tree-optimization/95916 - treat scalar ops explicitely

This explicitely treats the case of scalar operands for SLP when computing insert locations. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. 2020-06-29 Richard Biener PR tree-optimization/95916 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle

[PATCH] do not include from tree-vectorizer.h

This removes the duplicate include from tree-vectorizer.h. 2020-06-29 Richard Biener * tree-vectorizer.h: Do not include . --- gcc/tree-vectorizer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/tree-vectorizer.h b/gcc/tree-vectorizer.h index

Re: [RFC] aarch64: Treat GNU and Advanced SIMD vectors as distinct [PR92789, PR95726]

On Mon, Jun 29, 2020 at 12:38:45PM +0100, Richard Sandiford wrote: > It looks like aarch64_comp_type_attributes is missing cases for > the SVE attributes, but I'll handle that in a separate patch. > > Any thoughts? I'll apply this after 5pm UTC tomorrow if no asks > me not to. :-) > > If I do

Re: [PATCH] underline null argument in -Wnonnull (PR c++/86568)

On Fri, Jun 05, 2020 at 01:41:16PM -0600, Martin Sebor via Gcc-patches wrote: > PR c++/86568 - -Wnonnull warnings should highlight the relevant argument not > the closing parenthesis > > gcc/c-family/ChangeLog: > > PR c++/86568 > * c-common.c (struct nonnull_arg_ctx): Add members. >

[RFC] aarch64: Treat GNU and Advanced SIMD vectors as distinct [PR92789, PR95726]

PR95726 is about template look-up for things like: foo foo The immediate cause of the problem is that the hash function usually returns different hashes for these types, yet the equality function thinks they are equal. This then raises the question of how the types are supposed to be

[PATCH][OBVIOUS] Use gsi_bb instead of iterator->bb.

One obvious transformation, pushed to master. Martin gcc/ChangeLog: * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb instead of gimple_stmt_iterator::bb. * tree-ssa-math-opts.c (insert_reciprocals): Likewise. * tree-vectorizer.h: Likewise. ---

Re: [PATCH] PR fortran/71706 - [8/9/10/11 Regression] [Coarray] ICE on using sync images with integer(kind<>4), with -fcoarray=lib -fcheck=bounds

Hi Harald, Here's a fix to bounds-checking code that manifests itself essentially with checking enabled. Once found and understood, the fix is trivial: just properly convert the argument kind of SYNC IMAGES for checking. OK. (I had checked if "images" would be used later on. Tt is, so

Re: [PATCH] testsuite: Ignore line no. for BB vectorization message

On Mon, Jun 29, 2020 at 12:24 PM Kewen.Lin via Gcc-patches wrote: > > Hi, > > In my testing with vector with length, I happened to find the case > g++.dg/vect/slp-pr56812.cc need to be fixed a bit with line number > neglection since the message for basic block vectorization looks > like: >

[committed] amdgcn: Support basic DWARF

This patch configures the DWARF debug output to match the proposed DWARF specification from AMD. This is already implemented in LLVM and rocgdb (out of tree). This makes no attempt to support CFI, yet, and has some issues with vector registers. GCC will need to support some DWARF extensions

[PATCH] aarch64: Fix missing BTI instruction in trampolines

Hi, Got a small bugfix here regarding BTIs and trampolines. If two functions require trampolines, and the first has BTI enabled while the second doesn't, the generated template will be lacking a BTI instruction. This patch fixes this by always adding a BTI instruction, which is safe as BTI

GCC 10.1.1 Status Report (2020-06-29)

Status == The GCC 10 branch is in regression and documentation fixing mode. We're close to two months after the GCC 10.1 release which means a first bugfix release is about to happen. The plan is to release mid July and I am targeting for a release candidate mid next week, no later than

Re: [PATCH] handle MEM_REF with void* arguments (PR c++/95768)

On Mon, Jun 29, 2020 at 1:08 AM Martin Sebor wrote: > > On 6/23/20 1:12 AM, Richard Biener wrote: > > On Tue, Jun 23, 2020 at 12:22 AM Martin Sebor via Gcc-patches > > wrote: > >> > >> On 6/22/20 12:55 PM, Jason Merrill wrote: > >>> On 6/22/20 1:25 PM, Martin Sebor wrote: > The attached fix

[PATCH 1/7 v7] ifn/optabs: Support vector load/store with length

Hi Richard, Thanks for the comments! on 2020/6/29 下午6:07, Richard Sandiford wrote: > Thanks for the update. I agree with the summary of the IRC discussion > except for… > > "Kewen.Lin" writes: >> Hi Richard S./Richi/Jim/Segher, >> >> Thanks a lot for your comments to make this patch more

[PATCH] testsuite: Ignore line no. for BB vectorization message

Hi, In my testing with vector with length, I happened to find the case g++.dg/vect/slp-pr56812.cc need to be fixed a bit with line number neglection since the message for basic block vectorization looks like: slp-pr56812.cc:19:1: optimized: basic block part vectorized using 16 byte vectors

Re: [PATCH] tree-ssa-threadbackward.c (profitable_jump_thread_path): Do not allow __builtin_constant_p.

On Mon, Jun 29, 2020 at 08:58:57AM +0200, Richard Biener via Gcc-patches wrote: > Most of the cases I've seen involve transforms that make _b_c_p constant > on one path and then introduce a new PHI merging two _b_c_p values > to be then tested in a not simplified condition. I'm not sure how to

Re: [PATCH] c++: Check uniqueness of concepts/variable templates [PR94553]

On 6/26/20 3:26 PM, Marek Polacek wrote: This patch wraps up PR94553. Variable template names have no C compatibility implications so they should be unique in their declarative region. It occurred to me that this applies to concepts as well. This is not specified in

Re: [RFC] rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Fri, Jun 26, 2020 at 10:12 PM Raoni Fassina Firmino via Gcc-patches wrote: > > Hi all, > > > This is an early draft I'm working on to add fegetround , feclearexcept > and feraiseexcept as builtins on rs6000. This is my first patch so I > welcome any and all feedback. Foremost I have some

Re: [PATCH] tree-ssa-threadbackward.c (profitable_jump_thread_path): Do not allow __builtin_constant_p.

On Sat, Jun 27, 2020 at 4:52 PM Marc Glisse wrote: > > On Fri, 26 Jun 2020, Jeff Law via Gcc-patches wrote: > > > In theory yes, but there are cases where paths converge (like you've shown) > > where > > you may have evaluated to a constant on the paths, but it's not a constant > > at the > >

Re: [PATCH v3] c++: Fix CTAD for aggregates in template [PR95568]

On 6/26/20 5:38 PM, Marek Polacek wrote: On Fri, Jun 26, 2020 at 04:19:08PM -0400, Jason Merrill wrote: Please also test scoped enum. Here: -- >8 -- 95568 complains that CTAD for aggregates doesn't work within requires-clause and it turned out that it doesn't work when we try the deduction

Re: [PATCH][GCC][Arm] PR target/95646: Do not clobber callee saved registers with CMSE

On Mon, 29 Jun 2020 at 10:56, Andre Vieira (lists) wrote: > > > On 23/06/2020 21:52, Christophe Lyon wrote: > > On Tue, 23 Jun 2020 at 15:28, Andre Vieira (lists) > > wrote: > >> On 23/06/2020 13:10, Kyrylo Tkachov wrote: > -Original Message- > From: Andre Vieira (lists) >

[PATCH 1/7 v6] ifn/optabs: Support vector load/store with length

Hi Richard S./Richi/Jim/Segher, Thanks a lot for your comments to make this patch more solid. Based on our discussion, for the vector load/store with length optab, the length unit would be measured in lanes by default. For the targets which support length measured in bytes like Power, they

Re: [PATCH 1/7 v6] ifn/optabs: Support vector load/store with length

Thanks for the update. I agree with the summary of the IRC discussion except for… "Kewen.Lin" writes: > Hi Richard S./Richi/Jim/Segher, > > Thanks a lot for your comments to make this patch more solid. > > Based on our discussion, for the vector load/store with length > optab, the length unit

[PATCH 5/7 v6] vect: Support vector load/store with length in vectorizer

Hi, v6 changes against v5: - As len_load/store optab changes, added function can_vec_len_load_store_p and vect_get_same_size_vec_for_len. - Updated several places like vectoriable_load/store for optab changes. v5 changes against v4: - Updated the conditions of clearing

Re: [RFC patch] Clean all (sub)?module files

Le 2020-06-27 13:34, Thomas Koenig a écrit : Hi Dominieque, While investigating pr95538, I see several module files that were not cleaned. Several were cleaned by a patch I had in my working directory. However new ones were not cleaned (e.g., gfortran.dg/pr95091.f90) due to continuation

[COMMITTED] sparc: Remove register storage class in sparc.c

The switch to C++17 broke SPARC bootstrap: /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:8887:34: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 8887 | epilogue_renumber (register rtx *where, int test) | ^

[PATCH 2/7 v5] rs6000: lenload/lenstore optab support

Hi, V5: Like V4. V4: Update define_expand names as optab name changes. V3: Update the define_expand as optab changes. BR, Kewen -- gcc/ChangeLog: 2020-MM-DD Kewen Lin * config/rs6000/vsx.md (len_load_v16qi): New define_expand. (len_store_v16qi): Likewise. diff --git

Re: [PATCH PR95700] Use nullptr instead of NULL as a sentinel value

On Sat, Jun 27, 2020 at 2:06 PM Richard Sandiford wrote: > > Ilya Leoshkevich via Gcc-patches writes: > > Bootstrapped and regtested on x86_64-redhat-linux, ppc64le-redhat-linux > > and s390x-redhat-linux. > > Agree we should do this FWIW, but as a belt-and-braces fix, would it > make sense to

Re: [PATCH][GCC][Arm] PR target/95646: Do not clobber callee saved registers with CMSE

On 23/06/2020 21:52, Christophe Lyon wrote: On Tue, 23 Jun 2020 at 15:28, Andre Vieira (lists) wrote: On 23/06/2020 13:10, Kyrylo Tkachov wrote: -Original Message- From: Andre Vieira (lists) Sent: 22 June 2020 09:52 To: gcc-patches@gcc.gnu.org Cc: Kyrylo Tkachov Subject:

Re: PSA: Default C++ dialect is now C++17

On 6/26/20 9:34 PM, Marek Polacek via Gcc-patches wrote: As discussed last month: it's time to change the C++ default to gnu++17. I've committed the patch after testing x86_64-pc-linux-gnu and powerpc64le-unknown-linux-gnu. Brace

RE: [PATCH PR95854] ICE in find_bswap_or_nop_1 of pass store-merging

On Sun, 28 Jun 2020, zhoukaipeng (A) wrote: > Hi, > > Thanks for your good suggestions! > > This patch was remade and attached. Does the v2 patch look better? > > Bootstrap and new testcase tested on aarch64 & x86 Linux platform. OK. Thanks, Richard.

RE: [PATCH PR95854] ICE in find_bswap_or_nop_1 of pass store-merging

> On Sun, 28 Jun 2020, zhoukaipeng (A) wrote: > > > Hi, > > > > Thanks for your good suggestions! > > > > This patch was remade and attached. Does the v2 patch look better? > > > > Bootstrap and new testcase tested on aarch64 & x86 Linux platform. > > OK. > > Thanks, > Richard. Thanks for

Re: [PATCH] Add TARGET_LOWER_LOCAL_DECL_ALIGNMENT [PR95237]

On Fri, Jun 26, 2020 at 10:11 PM H.J. Lu wrote: > > On Thu, Jun 25, 2020 at 1:10 AM Richard Biener > wrote: > > > > On Thu, Jun 25, 2020 at 2:53 AM Sunil Pandey wrote: > > > > > > On Wed, Jun 24, 2020 at 12:30 AM Richard Biener > > > wrote: > > > > > > > > On Tue, Jun 23, 2020 at 5:31 PM Sunil

Re: [PATCH] underline null argument in -Wnonnull (PR c++/86568)

This breaks bootstrap: In static member function 'static Expression* Type::type_descriptor(Gogo*, Type*)', inlined from 'virtual Expression* Named_type::do_type_descriptor(Gogo*, Named_type*)' at ../../gcc/go/gofrontend/types.cc:4:53, inlined from 'virtual Expression*

Re: [PATCH][GCC][Arm] PR target/95646: Do not clobber callee saved registers with CMSE

On 23/06/2020 21:52, Christophe Lyon wrote: On Tue, 23 Jun 2020 at 15:28, Andre Vieira (lists) wrote: On 23/06/2020 13:10, Kyrylo Tkachov wrote: -Original Message- From: Andre Vieira (lists) Sent: 22 June 2020 09:52 To: gcc-patches@gcc.gnu.org Cc: Kyrylo Tkachov Subject:

Re: [PATCH PR95855]A missing ifcvt optimization to generate fcsel

On Sun, Jun 28, 2020 at 2:32 PM yangyang (ET) wrote: > > Hi, > > This is a simple fix for pr95855. > > With this fix, pass_split_paths can recognize the if-conversion > opportunity of the testcase and doesn't duplicate the corresponding block. > > Added one testcase for this.

Re: [PATCH] arc: add exceptions for PR92860.

On 6/27/20 12:59 AM, Jeff Law wrote: On Wed, 2020-06-24 at 09:43 +0200, Martin Liška wrote: Hey. The patch is about addition of some exceptions for arc target that address: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92860#c26 It's again another example where optimization options influence