Re: [PATCH] [RISC-V] Fix riscv_expand_conditional_move.

2023-05-19 Thread Jeff Law via Gcc-patches
On 4/27/23 20:21, Die Li wrote: Two issues have been observed in current riscv_expand_conditional_move implementation. 1. Before introduction of TARGET_XTHEADCONDMOV, op0 of comparision expression is used for mode comparision with word_mode, but after TARGET_XTHEADCONDMOV megered with

Re: [PATCH 7/7] Expand directly for single bit test

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: Instead of using creating trees to the expansion, just expand directly which makes the code a little simplier but also reduces how much GC memory will be used during the expansion. OK? Bootstrapped and tested on x86_64-linux.

[PATCH] RISC-V: Add RVV comparison autovectorization

2023-05-19 Thread juzhe . zhong
From: Juzhe-Zhong This patch enable RVV auto-vectorization including floating-point unorder and order comparison. The testcases are leveraged from Richard. So include Richard as co-author. Co-Authored-By: Richard Sandiford gcc/ChangeLog: * config/riscv/autovec.md (vcond): New

Re: [PATCH 6/7] Use BIT_FIELD_REF inside fold_single_bit_test

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: Instead of depending on combine to do the extraction, Let's create a tree which will expand directly into the extraction. This improves code generation on some targets. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog:

Re: [PATCH 5/7] Simplify fold_single_bit_test with respect to code

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: Since we know that fold_single_bit_test is now only passed NE_EXPR or EQ_EXPR, we can simplify it and just use a gcc_assert to assert that is the code that is being passed. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog:

Re: [PATCH 4/7] Simplify fold_single_bit_test slightly

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: Now the only use of fold_single_bit_test is in do_store_flag, we can change it such that to pass the inner arg and bitnum instead of building a tree. There is no code generation changes due to this change, only a decrease in GC memory

Re: [PATCH 3/7] Use get_def_for_expr in fold_single_bit_test

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: The code in fold_single_bit_test, checks if the inner was a right shift and improve the bitnum based on that. But since the inner will always be a SSA_NAME at this point, the code is dead. Move it over to use the helper function

Re: [PATCH 2/7] Inline and simplify fold_single_bit_test_into_sign_test into fold_single_bit_test

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: Since the last use of fold_single_bit_test is fold_single_bit_test, we can inline it and even simplify the inlined version. This has no behavior change. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc

Re: [PATCH 2/7] Inline and simplify fold_single_bit_test_into_sign_test into fold_single_bit_test

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: Since the last use of fold_single_bit_test is fold_single_bit_test, we can inline it and even simplify the inlined version. This has no behavior change. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc

Re: [PATCH 1/7] Move fold_single_bit_test to expr.cc from fold-const.cc

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 20:14, Andrew Pinski via Gcc-patches wrote: This is part 1 of N patch set that will change the expansion of `(A & C) != 0` from using trees to directly expanding so later on we can do some cost analysis. Since the only user of fold_single_bit_test is now expand, move it to there.

Re: [PATCH] Mode-Switching: Fix local array maybe uninitialized warning

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 17:56, pan2...@intel.com wrote: From: Pan Li There are 2 local array in function optimize_mode_switching. It will be initialized conditionally at the beginning but then always consumed in another loop. It may trigger the warning maybe-uninitialized, and may result in build

Re: [PATCH v2] RISC-V: Add bext pattern for ZBS

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/8/23 08:11, Raphael Moreira Zinsly wrote: Changes since v1: - Removed name clash change. - Fix new pattern indentation. -- >8 -- When (a & (1 << bit_no)) is tested inside an IF we can use a bit extract. gcc/ChangeLog: *

Re: [PATCH v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/8/23 08:12, Raphael Moreira Zinsly wrote: Changes since v1: - Remove subreg from operand 1. -- >8 -- We were not able to match the CTZ sign extend pattern on RISC-V because it gets optimized to zero extend and/or to ANDI patterns. For the ANDI case, combine scrambles the RTL

[PATCH 5/7] Simplify fold_single_bit_test with respect to code

2023-05-19 Thread Andrew Pinski via Gcc-patches
Since we know that fold_single_bit_test is now only passed NE_EXPR or EQ_EXPR, we can simplify it and just use a gcc_assert to assert that is the code that is being passed. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc (fold_single_bit_test): Add an assert

[PATCH 7/7] Expand directly for single bit test

2023-05-19 Thread Andrew Pinski via Gcc-patches
Instead of using creating trees to the expansion, just expand directly which makes the code a little simplier but also reduces how much GC memory will be used during the expansion. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc (fold_single_bit_test): Rename to

[PATCH 4/7] Simplify fold_single_bit_test slightly

2023-05-19 Thread Andrew Pinski via Gcc-patches
Now the only use of fold_single_bit_test is in do_store_flag, we can change it such that to pass the inner arg and bitnum instead of building a tree. There is no code generation changes due to this change, only a decrease in GC memory that is produced during expansion. OK? Bootstrapped and tested

[PATCH 6/7] Use BIT_FIELD_REF inside fold_single_bit_test

2023-05-19 Thread Andrew Pinski via Gcc-patches
Instead of depending on combine to do the extraction, Let's create a tree which will expand directly into the extraction. This improves code generation on some targets. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF

[PATCH 3/7] Use get_def_for_expr in fold_single_bit_test

2023-05-19 Thread Andrew Pinski via Gcc-patches
The code in fold_single_bit_test, checks if the inner was a right shift and improve the bitnum based on that. But since the inner will always be a SSA_NAME at this point, the code is dead. Move it over to use the helper function get_def_for_expr instead. OK? Bootstrapped and tested on

[PATCH 2/7] Inline and simplify fold_single_bit_test_into_sign_test into fold_single_bit_test

2023-05-19 Thread Andrew Pinski via Gcc-patches
Since the last use of fold_single_bit_test is fold_single_bit_test, we can inline it and even simplify the inlined version. This has no behavior change. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...

[PATCH 1/7] Move fold_single_bit_test to expr.cc from fold-const.cc

2023-05-19 Thread Andrew Pinski via Gcc-patches
This is part 1 of N patch set that will change the expansion of `(A & C) != 0` from using trees to directly expanding so later on we can do some cost analysis. Since the only user of fold_single_bit_test is now expand, move it to there. OK? Bootstrapped and tested on x86_64-linux.

[PATCH 0/7] Improve do_store_flag

2023-05-19 Thread Andrew Pinski via Gcc-patches
This patch set improves do_store_flag for the single bit case. We go back to expanding the code directly rather than building some trees. Plus instead of using shift+and we use directly bit_field extraction; this improves code generation on avr. Andrew Pinski (7): Move fold_single_bit_test to

[PATCH] Mode-Switching: Fix local array maybe uninitialized warning

2023-05-19 Thread Pan Li via Gcc-patches
From: Pan Li There are 2 local array in function optimize_mode_switching. It will be initialized conditionally at the beginning but then always consumed in another loop. It may trigger the warning maybe-uninitialized, and may result in build failure when enable werror, aka warning as error.

Re: [V7][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]

2023-05-19 Thread Bernhard Reutner-Fischer via Gcc-patches
On Fri, 19 May 2023 20:49:47 + Qing Zhao via Gcc-patches wrote: > GCC extension accepts the case when a struct with a flexible array member > is embedded into another struct or union (possibly recursively). Do you mean TYPE_TRAILING_FLEXARRAY()? > diff --git a/gcc/tree.h b/gcc/tree.h >

Re: [PATCH 1/2] Improve do_store_flag for single bit comparison against 0

2023-05-19 Thread Andrew Pinski via Gcc-patches
On Fri, May 19, 2023 at 9:40 AM Jeff Law via Gcc-patches wrote: > > > > On 5/18/23 20:14, Andrew Pinski via Gcc-patches wrote: > > While working something else, I noticed we could improve > > the following function code generation: > > ``` > > unsigned f(unsigned t) > > { > >if (t & ~(1<<30))

Re: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic.

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/6/23 10:04, Roger Sayle wrote: This patch adds support for (a pair of) bit reversal intrinsics __builtin_nvptx_brev and __builtin_nvptx_brevll which perform 32-bit and 64-bit bit reversal (using nvptx's brev instruction) matching the __brev and __brevll instrinsics provided by

Re: [PATCH] Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode.

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/17/23 00:57, liuhongt via Gcc-patches wrote: r14-172-g0368d169492017 replaces GENERAL_REGS with NO_REGS in cost calculation when the preferred register class are not known yet. It regressed powerpc PR109610 and PR109858, it looks too aggressive to use NO_REGS when mode can be allocated

Re: [PATCH] configure: Implement --enable-host-bind-now

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/16/23 09:37, Marek Polacek via Gcc-patches wrote: As promised in the --enable-host-pie patch, this patch adds another configure option, --enable-host-bind-now, which adds -z now when linking the compiler executables in order to extend hardening. BIND_NOW with RELRO allows the GOT to be

Re: [V7][PATCH 2/2] Update documentation to clarify a GCC extension [PR77650]

2023-05-19 Thread Joseph Myers
On Fri, 19 May 2023, Qing Zhao via Gcc-patches wrote: > +GCC extension accepts a structure containing an ISO C99 @dfn{flexible array "The GCC extension" or "A GCC extension". > +@item > +A structure containing a C99 flexible array member, or a union containing > +such a structure, is the middle

Re: [C PATCH] Remove dead code related to type compatibility across TUs.

2023-05-19 Thread Joseph Myers
On Fri, 19 May 2023, Martin Uecker via Gcc-patches wrote: > Repost for stage 1. > > > C: Remove dead code related to type compatibility across TUs. > > Code to detect struct/unions across the same TU is not needed > anymore. Code for determining compatibility of tagged types is

[V7][PATCH 2/2] Update documentation to clarify a GCC extension [PR77650]

2023-05-19 Thread Qing Zhao via Gcc-patches
on a structure with a C99 flexible array member being nested in another structure. "GCC extension accepts a structure containing an ISO C99 "flexible array member", or a union containing such a structure (possibly recursively) to be a member of a structure. There are two situations: * A

Re: [C PATCH v2] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]

2023-05-19 Thread Joseph Myers
On Fri, 19 May 2023, Martin Uecker via Gcc-patches wrote: > Thanks Joseph! > > Revised version attached. Ok? The C front-end changes and tests are OK. > But I wonder whether we generally need to do something  > about > > sizeof *x > > when x is NULL or not initialized. This is quite

[V7][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]

2023-05-19 Thread Qing Zhao via Gcc-patches
GCC extension accepts the case when a struct with a flexible array member is embedded into another struct or union (possibly recursively). __builtin_object_size should treat such struct as flexible size. gcc/c/ChangeLog: PR tree-optimization/101832 * c-decl.cc (finish_struct):

[V7][PATCH 0/2]Accept and Handle the case when a structure including a FAM nested in another structure

2023-05-19 Thread Qing Zhao via Gcc-patches
Hi, This is the 7th version of the patch, which rebased on the latest trunk. This is an important patch needed by Linux Kernel security project. We already have an extensive discussion on this issue and I have went through 6 revisions of the patches based on the discussion and resolved all the

[C PATCH] Remove dead code related to type compatibility across TUs.

2023-05-19 Thread Martin Uecker via Gcc-patches
Repost for stage 1. C: Remove dead code related to type compatibility across TUs. Code to detect struct/unions across the same TU is not needed anymore. Code for determining compatibility of tagged types is preserved as it will be used for C2X. Some errors in the unused

Re: [PATCH v4 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/16/23 06:35, Ajit Agarwal wrote: On 29/04/23 5:03 am, Jeff Law wrote: On 4/28/23 16:42, Hans-Peter Nilsson wrote: On Sat, 22 Apr 2023, Ajit Agarwal via Gcc-patches wrote: Hello All: This new version of patch 4 use improve ree pass for rs6000 target using defined ABI interfaces.

Re: [PATCH] MIPS: don't expand large block move

2023-05-19 Thread Maciej W. Rozycki
On Fri, 19 May 2023, Jeff Law wrote: > > diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc > > index ca491b981a3..00f26d5e923 100644 > > --- a/gcc/config/mips/mips.cc > > +++ b/gcc/config/mips/mips.cc > > @@ -8313,6 +8313,12 @@ mips_expand_block_move (rtx dest, rtx src, rtx > >

Re: [PATCH 08/14] fortran: use _P() defines from tree.h

2023-05-19 Thread Bernhard Reutner-Fischer via Gcc-patches
On Thu, 18 May 2023 21:20:41 +0200 Mikael Morin wrote: > Le 18/05/2023 à 17:18, Bernhard Reutner-Fischer a écrit : > > I've fed gfortran.h into the script and found some CLASS_DATA spots, > > see attached bootstrapped and tested patch. > > Do we want to have that? > Some of it makes sense,

Re: [PATCH] c++: mangle noexcept-expr [PR70790]

2023-05-19 Thread Patrick Palka via Gcc-patches
On Fri, 19 May 2023, Patrick Palka wrote: > This implements noexcept-expr mangling (and demangling) as per the > Itanium ABI. > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this > look OK for trunk? > > PR c++/70790 > > gcc/cp/ChangeLog: > > * mangle.cc

[PATCH v2] release the sorted FDE array when deregistering a frame [PR109685]

2023-05-19 Thread Thomas Neumann via Gcc-patches
Am 19.05.23 um 19:26 schrieb Jeff Law: See: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/617245.html I think this needs an update given the other changes in this space. jeff I have included the updated the patch below. The atomic fastpath bypasses the code that releases the sort

[PATCH] c++: mangle noexcept-expr [PR70790]

2023-05-19 Thread Patrick Palka via Gcc-patches
This implements noexcept-expr mangling (and demangling) as per the Itanium ABI. Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? PR c++/70790 gcc/cp/ChangeLog: * mangle.cc (write_expression): Handle NOEXCEPT_EXPR. libiberty/ChangeLog: *

Re: [patch] Allow plugin-specific dumps

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/17/23 17:38, Nathan Sidwell via Gcc-patches wrote: PR 99451 is about the inability to name tree and rtl dumps by plugin name.  And includes a patch.  But then I worked around the problem and forgot about it. Here it is again, retested against trunk. ok? nathan -- Nathan Sidwell

Re: [Patch] libgomp: Honor OpenMP's nteams-var ICV as upper limit on num teams [PR109875]

2023-05-19 Thread Tobias Burnus
I managed to attach an outdated patch. Namely: After I tested it, I realized that GCC's testsuite setup already marks testcases as UNSUPPORTED that use all dg-set-target-env-var – if remote testing is done → see gcc/testsuite/lib/gcc-dg.exp. Thus, instead of checking getenv, I can directly use

Re: [PATCH] Fix driver/33980: Precompiled header file not removed on error

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 08:48, Andrew Pinski via Gcc-patches wrote: So the problem here is that in the spec files, we were not marking the pch output file to be removed on error. The way to fix this is to mark the --output-pch argument as the output file argument. For the C++ specs file, we had to move

Re: PING: [PATCH] release the sorted FDE array when deregistering a frame [PR109685]

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/12/23 09:19, Thomas Neumann via Gcc-patches wrote: Summary: The old linear scan logic called free while searching the list of frames. The atomic fast path finds the frame quickly, but forgot the free call. This patches adds the missing free. Bugzilla #109685. See:

Re: [PATCH 13-backport] riscv/linux: Don't add -latomic with -pthread

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/17/23 03:22, Bo YU wrote: Hi, I just want to backport the commit to gcc-13 branch: commit 203f3060dd363361b172f7295f42bb6bf5ac0b3b Author: Andreas Schwab Date:   Sat Apr 23 15:48:42 2022 +0200     riscv/linux: Don't add -latomic with -pthread     Now that we have support for

[Committed] RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]

2023-05-19 Thread Vineet Gupta
On 5/19/23 09:33, Jeff Law wrote: On 5/18/23 14:57, Vineet Gupta wrote: [part #2 of PR/109279] SPEC2017 deepsjeng uses large constants which currently generates less than ideal code. This fix improves codegen for large constants which have same low and hi parts: e.g. long long f(void)

Re: [PATCH] RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]

2023-05-19 Thread Vineet Gupta
On 5/19/23 09:36, Palmer Dabbelt wrote: Works for me.  Did you start that performance backports branch?  Either way, I think this should go on it. Please note that there is a bit of dependency chain. Assuming the aforementioned branch is gcc 13.1 based, this change also needs my splitter

[Patch] libgomp: Honor OpenMP's nteams-var ICV as upper limit on num teams [PR109875]

2023-05-19 Thread Tobias Burnus
I intent to commit this patch early next week — any comments, questions, concerns? * * * I stumbled over this issue when looking at sollve_vv's pull requests for omp_set_num_teams and omp_get_max_teams testcase (#729 + #728). While the num_teams clause was honored everywhere, the nteams-var

Re: [patch,avr] PR105753: Fix ICE in add_clobbers.

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/16/23 02:56, Georg-Johann Lay wrote: This patch removes the superfluous parallel in [u]divmod patterns in the AVR backend.  Effect of extra parallel is that add_clobbers reaches gcc_unreachable() because the clobbers for [u]divmod are missing.  The parallel around the parts of an insn

Re: [PATCH] MIPS: don't expand large block move

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 00:11, YunQiang Su wrote: On platform with LWL/LWR, mips_block_move_loop is always used, which expand __buildin_memcpy/strcpy to a loop of lwl/lwr/swl/swl etc. For short (normally <=64), it has better performance, but when the src/dest are long, use memcpy/strcpy lib call may have

Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/19/23 08:02, Bernhard Reutner-Fischer via Gcc-patches wrote: On 19 May 2023 07:58:48 CEST, "SenthilKumar.Selvaraj--- via Gcc-patches" wrote: Just a nit: +static bool +avr_addr_space_zero_address_valid (addr_space_t as ATTRIBUTE_UNUSED) +{ + return flag_delete_null_pointer_checks ==

Re: [PATCH 2/2] Improve do_store_flag for comparing single bit against that bit

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/18/23 20:14, Andrew Pinski via Gcc-patches wrote: This is a case which I noticed while working on the previous patch. Sometimes we end up with `a == CST` instead of comparing against 0. This happens in the following code: ``` unsigned f(unsigned t) { if (t & ~(1<<30))

Re: [PATCH 1/2] Improve do_store_flag for single bit comparison against 0

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/18/23 20:14, Andrew Pinski via Gcc-patches wrote: While working something else, I noticed we could improve the following function code generation: ``` unsigned f(unsigned t) { if (t & ~(1<<30)) __builtin_unreachable(); return t != 0; } ``` Right know we just emit a comparison

Re: [PATCH] RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]

2023-05-19 Thread Palmer Dabbelt
On Fri, 19 May 2023 09:33:34 PDT (-0700), jeffreya...@gmail.com wrote: On 5/18/23 14:57, Vineet Gupta wrote: [part #2 of PR/109279] SPEC2017 deepsjeng uses large constants which currently generates less than ideal code. This fix improves codegen for large constants which have same low and hi

Re: [PATCH] RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]

2023-05-19 Thread Jeff Law via Gcc-patches
On 5/18/23 14:57, Vineet Gupta wrote: [part #2 of PR/109279] SPEC2017 deepsjeng uses large constants which currently generates less than ideal code. This fix improves codegen for large constants which have same low and hi parts: e.g. long long f(void) { return 0x0101010101010101ull;

[PATCH] Fix driver/33980: Precompiled header file not removed on error

2023-05-19 Thread Andrew Pinski via Gcc-patches
So the problem here is that in the spec files, we were not marking the pch output file to be removed on error. The way to fix this is to mark the --output-pch argument as the output file argument. For the C++ specs file, we had to move around where the %V was located such that it would be after

Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

2023-05-19 Thread Bernhard Reutner-Fischer via Gcc-patches
On 19 May 2023 07:58:48 CEST, "SenthilKumar.Selvaraj--- via Gcc-patches" wrote: Just a nit: >+static bool >+avr_addr_space_zero_address_valid (addr_space_t as ATTRIBUTE_UNUSED) >+{ >+ return flag_delete_null_pointer_checks == 0; >+} Since we are c++ nowadays, you can omit the parameter name

[pushed] wwwdocs: preprocess: Check whether input files exist

2023-05-19 Thread Gerald Pfeifer
This has not come up in all those years since the preprocess script usually is invoked from other scripts, notably post commit hooks. It can, however, be invoked manually, and error handling is generally a good thing. Instead of cat: foo/bar/index.html: No such file or directory New file

Re: [PATCH] add glibc-stdint.h to vax and lm32 linux target (PR target/105525)

2023-05-19 Thread Mikael Pettersson via Gcc-patches
On Fri, May 19, 2023 at 2:06 PM Maciej W. Rozycki wrote: > > On Sat, 29 Apr 2023, Jeff Law via Gcc-patches wrote: > > > > PR target/105525 is a build regression for the vax and lm32 linux > > > targets present in gcc-12/13/head, where the builds fail due to > > > unsatisfied references to

Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions

2023-05-19 Thread Andreas Schwab
This is built with --disable-werror, so it doesn't fail, but the warning is there: https://build.opensuse.org/package/live_build_log/devel:gcc:next/gcc14/openSUSE_Factory_RISCV/riscv64 -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA

[PATCH, OpenMP, nvptx] Improving OpenMP offloading by OpenACC

2023-05-19 Thread chunglin.tang--- via Gcc-patches
ig/nvptx/team.c (__nvptx_omp_num_threads): New global variable in shared memory. ompacc-20230519-2115.patch Description: ompacc-20230519-2115.patch

RE: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions

2023-05-19 Thread Li, Pan2 via Gcc-patches
Sorry to bother, just tried below build for the RISC-V but failed to reproduce... ../configure \ --target=riscv64-unknown-elf \ --prefix=${INSTALL_DIR} \ --disable-shared \ --enable-threads \ --enable-tls \ --enable-languages=c,c++ \ --with-system-zlib \ --with-newlib \

RE: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions

2023-05-19 Thread Li, Pan2 via Gcc-patches
Hi Andreas, Could you please help to share more information about how to trigger this error? As you don't mentioned, I assume below error comes from X86 build. I take below configuration but failed to reproduce. mkdir __BUILD_X86 && cd __BUILD_X86 ../configure --enable-language=c,c++

Re: Re: [PATCH] RISC-V: Implement autovec abs, vneg, vnot.

2023-05-19 Thread 钟居哲
>> What about the rest of the changes? It's not all typos but I tried >> to unify the mask/policy handling a bit. Oh, I see. You rename get_prefer into get_preferred. This makes perfect sense to me. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-05-19 20:07 To: 钟居哲; gcc-patches;

Re: [PATCH] RISC-V: Implement autovec abs, vneg, vnot.

2023-05-19 Thread Robin Dapp via Gcc-patches
>>> +  TAIL_UNDEFINED = -1, >>> +  MASK_UNDEFINED = -1, > Why you add this ? > >>> +  void add_policy_operands (enum tail_policy vta = TAIL_UNDEFINED, >>> +     enum mask_policy vma = MASK_UNDEFINED) > No, you should just specify this as TAIL_ANY or MASK_ANY as default value. That's the value I

Re: [PATCH] add glibc-stdint.h to vax and lm32 linux target (PR target/105525)

2023-05-19 Thread Maciej W. Rozycki
On Sat, 29 Apr 2023, Jeff Law via Gcc-patches wrote: > > PR target/105525 is a build regression for the vax and lm32 linux > > targets present in gcc-12/13/head, where the builds fail due to > > unsatisfied references to __INTPTR_TYPE__ and __UINTPTR_TYPE__, > > caused by these two targets

Re: [PATCH] RISC-V: Implement autovec abs, vneg, vnot.

2023-05-19 Thread 钟居哲
>> + TAIL_UNDEFINED = -1, >> + MASK_UNDEFINED = -1, Why you add this ? >> + void add_policy_operands (enum tail_policy vta = TAIL_UNDEFINED, >> + enum mask_policy vma = MASK_UNDEFINED) No, you should just specify this as TAIL_ANY or MASK_ANY as default value. >>const_vlmax_p (machine_mode

[C PATCH v2] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]

2023-05-19 Thread Martin Uecker via Gcc-patches
Thanks Joseph! Revised version attached. Ok? But I wonder whether we generally need to do something  about sizeof *x when x is NULL or not initialized. This is quite commonly used in C code and if the type is not of variable size, it is also unproblematic. So the UB for variable size is

Re: [committed] Enable LRA on several ports

2023-05-19 Thread Maciej W. Rozycki
On Tue, 2 May 2023, Jeff Law via Gcc-patches wrote: > Well, I'd say that my plan would be to deprecate any target that is not > converted by the end of this development cycle. So the change keeps cris from > falling into that bucket. As I noted in the other thread it is highly unlikely I will

Re: [PATCH] RISC-V: Allow more loading of const vectors.

2023-05-19 Thread Kito Cheng via Gcc-patches
LGTM Robin Dapp via Gcc-patches 於 2023年5月19日 週五 19:07 寫道: > Hi, > > this fixes a rebase oversight regarding the loading > of vector constants. Added another test to properly > catch that in the future. > > Regards > Robin > > gcc/ChangeLog: > > * config/riscv/riscv.cc

Re: [PATCH] RISC-V: testsuite: Remove empty *-run-template.h.

2023-05-19 Thread Kito Cheng via Gcc-patches
LGTM Robin Dapp via Gcc-patches 於 2023年5月19日 週五 19:10 寫道: > Hi, > > this obvious patch removes empty run template files and one redundant > stdio.h include. > > Regards > Robin > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/autovec/binop/shift-run.c: Do not include > .

[PATCH] RISC-V: Implement autovec abs, vneg, vnot.

2023-05-19 Thread Robin Dapp via Gcc-patches
Hi, this patch implements autovec expanders of abs2, vneg2 and vnot2 for integers. I also tried to refactor the helper code in riscv-v.cc a bit. Guess it's not enough to warrant a separate patch though. Regards Robin gcc/ChangeLog: * config/riscv/autovec.md (2): Fix typo.

Re: [PATCH v2 0/9] MIPS: Add MIPS16e2 ASE instrucions.

2023-05-19 Thread Maciej W. Rozycki
Hi Jie, Thank you for your submission. Since I was a member of the team that developed this ASE in cooperation with the hardware group, I did the binutils part, and it was even myself who came up with the name for the ASE in an internal discussion, I feel somewhat responsible for this

[PATCH] RISC-V: testsuite: Remove empty *-run-template.h.

2023-05-19 Thread Robin Dapp via Gcc-patches
Hi, this obvious patch removes empty run template files and one redundant stdio.h include. Regards Robin gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/shift-run.c: Do not include . * gcc.target/riscv/rvv/autovec/binop/shift-run-template.h: Removed.

Re: [PATCH V11] VECT: Add decrement IV support in Loop Vectorizer

2023-05-19 Thread Richard Sandiford via Gcc-patches
"juzhe.zh...@rivai.ai" writes: > Hi, Richard. Thanks for the comments. > > Would you mind telling me whether it is possible that we can make decrement > IV support into GCC middle-end ? > > If yes, could you tell what I should do next for the patches since I am > confused that it seems the

[PATCH] RISC-V: Allow more loading of const vectors.

2023-05-19 Thread Robin Dapp via Gcc-patches
Hi, this fixes a rebase oversight regarding the loading of vector constants. Added another test to properly catch that in the future. Regards Robin gcc/ChangeLog: * config/riscv/riscv.cc (riscv_const_insns): Remove else. gcc/testsuite/ChangeLog: *

Re: [PATCH V11] VECT: Add decrement IV support in Loop Vectorizer

2023-05-19 Thread Richard Sandiford via Gcc-patches
"juzhe.zh...@rivai.ai" writes: >>> I don't think this is a property of decrementing IVs. IIUC it's really >>> a property of rgl->factor == 1 && factor == 1, where factor would need >>> to be passed in by the caller. Because of that, it should probably be >>> a separate patch. > Is it right that

Re: Re: [PATCH V11] VECT: Add decrement IV support in Loop Vectorizer

2023-05-19 Thread juzhe.zh...@rivai.ai
Hi, Richard. Thanks for the comments. Would you mind telling me whether it is possible that we can make decrement IV support into GCC middle-end ? If yes, could you tell what I should do next for the patches since I am confused that it seems the implementation of this patch should totally be

Re: [aarch64] Code-gen for vector initialization involving constants

2023-05-19 Thread Prathamesh Kulkarni via Gcc-patches
On Thu, 18 May 2023 at 22:04, Richard Sandiford wrote: > > Prathamesh Kulkarni writes: > > On Thu, 18 May 2023 at 13:37, Richard Sandiford > > wrote: > >> > >> Prathamesh Kulkarni writes: > >> > On Tue, 16 May 2023 at 00:29, Richard Sandiford > >> > wrote: > >> >> > >> >> Prathamesh Kulkarni

Re: [PATCH] tree-ssa-math-opts: Pattern recognize some further hand written forms of signed __builtin_mul_overflow{, _p} [PR105776]

2023-05-19 Thread Richard Biener via Gcc-patches
> Am 19.05.2023 um 10:06 schrieb Jakub Jelinek : > > Hi! > > In the pattern recognition of signed __builtin_mul_overflow{,_p} we > check for result of unsigned division (which follows unsigned > multiplication) being equality compared against one of the multiplication's > argument (the one

Re: [PATCH] tree-ssa-math-opts: Pattern recognize hand written __builtin_mul_overflow_p with same unsigned types even when target just has highpart umul [PR101856]

2023-05-19 Thread Richard Biener via Gcc-patches
> Am 19.05.2023 um 10:00 schrieb Jakub Jelinek : > > Hi! > > As can be seen on the following testcase, we pattern recognize it on > i?86/x86_64 as return __builtin_mul_overflow_p (x, y, 0UL) and avoid > that way the extra division, but don't do it e.g. on aarch64 or ppc64le, > even when

Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions

2023-05-19 Thread Andreas Schwab
In function 'int optimize_mode_switching()', inlined from 'virtual unsigned int {anonymous}::pass_mode_switching::execute(function*)' at ../../gcc/mode-switching.cc:909:31: ../../gcc/mode-switching.cc:608:29: error: 'bb_info$' may be used uninitialized [-Werror=maybe-uninitialized] 608 |

Re: Re: [PATCH V11] VECT: Add decrement IV support in Loop Vectorizer

2023-05-19 Thread juzhe.zh...@rivai.ai
>> I don't think this is a property of decrementing IVs. IIUC it's really >> a property of rgl->factor == 1 && factor == 1, where factor would need >> to be passed in by the caller. Because of that, it should probably be >> a separate patch. Is it right that I just post this part code as a

Re: [PATCH V11] VECT: Add decrement IV support in Loop Vectorizer

2023-05-19 Thread Richard Sandiford via Gcc-patches
Thanks for the update. I'll split this review into two pieces. Second piece to follow (not sure when, but hopefully soon). juzhe.zh...@rivai.ai writes: > diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc > index ed0166fedab..6f49bdee009 100644 > --- a/gcc/tree-vect-loop.cc > +++

Re: [PATCH] [PR96339] AArch64: Optimise svlast[ab]

2023-05-19 Thread Richard Sandiford via Gcc-patches
Tejas Belagod writes: > Am I correct to understand that we still need to check for the case when > there's a repeating non-zero elements in the case of NELTS_PER_PATTERN == 2? > eg. { 0, 0, 1, 1, 1, 1,} which should be encoded as {0, 0, 1, 1} with > NPATTERNS = 2 ? Yeah, that's right. The

[PATCH v2] tree-ssa-sink: Improve code sinking pass

2023-05-19 Thread Ajit Agarwal via Gcc-patches
Hello All: This patch improves code sinking pass to sink statements before call to reduce register pressure. Review comments are incorporated. For example : void bar(); int j; void foo(int a, int b, int c, int d, int e, int f) { int l; l = a + b + c + d +e + f; if (a != 5) {

Re: [PATCH] [PR96339] AArch64: Optimise svlast[ab]

2023-05-19 Thread Tejas Belagod via Gcc-patches
From: Richard Sandiford Date: Tuesday, May 16, 2023 at 5:36 PM To: Tejas Belagod Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [PR96339] AArch64: Optimise svlast[ab] Tejas Belagod writes: >>> + { >>> + b = build3 (BIT_FIELD_REF, TREE_TYPE (f.lhs), val, >>> +

Re: [patch,avr] Fix PR109650 wrong code

2023-05-19 Thread Georg-Johann Lay
...Ok, and now with the patch attached... Here is a revised version of the patch. The difference to the previous one is that it adds some combine patterns for *cbranch insns that were lost in the PR92729 transition. The post-reload part of the patterns were still there. The new patterns are

Re: [RFC V2] RISC-V : Support rv64 ilp32

2023-05-19 Thread Liao Shihua
Thanks for your advice, Kito. 在 2023/5/19 15:35, Kito Cheng 写道: I am concern about we didn't define POINTERS_EXTEND_UNSIGNED here, and also concern about the code model stuffs, I know currently Guo-Ren's implementation is rely on some MMU trick, but I am not sure does it also applicable on

[committed] libgomp: Fix up -static -fopenmp linking [PR109904]

2023-05-19 Thread Jakub Jelinek via Gcc-patches
Hi! When an OpenMP program with target regions is linked statically, it fails to link on various arches (doesn't when using recent glibc because it has libdl stuff in libc), because libgomp.a(target.o) uses dlopen/dlsym/dlclose, but we aren't linking against -ldl (unless user asked for that). We

Re: [patch,avr] Fix PR109650 wrong code

2023-05-19 Thread Georg-Johann Lay
Here is a revised version of the patch. The difference to the previous one is that it adds some combine patterns for *cbranch insns that were lost in the PR92729 transition. The post-reload part of the patterns were still there. The new patterns are slightly more general in that they also

[pushed] libstdc++: Move lafstern.org reference to https

2023-05-19 Thread Gerald Pfeifer
Pushed. Gerald libstdc++-v3/ChangeLog: * doc/xml/manual/strings.xml: Move lafstern.org reference to https. * doc/html/manual/strings.html: Regenerate. --- libstdc++-v3/doc/html/manual/strings.html | 2 +- libstdc++-v3/doc/xml/manual/strings.xml | 2 +- 2 files changed, 2

Re: [pushed] wwwdocs: onlinedocs/13.1.0: Remove last trace of XHTML

2023-05-19 Thread Jakub Jelinek via Gcc-patches
On Fri, May 19, 2023 at 10:08:28AM +0200, Gerald Pfeifer wrote: > This is how I actually noticed the situation in gcc-13/buildstat.html > (and then I mixed the two up). > > Jakub, do you have some old templates somewhere maybe? Usually I git diff last year's changes and apply that after

[pushed] Darwin, libgcc : Adjust min version supported for the OS.

2023-05-19 Thread Iain Sandoe via Gcc-patches
Tested across the Darwin range (this patch has been on the WIP branches for some time) and on x86_64-linux-gnu, for reference. pushed to trunk, thanks Iain --- 8< --- Tools from later versions of the OS deprecate or fail to support earlier OS revisions. Signed-off-by: Iain Sandoe

[pushed] wwwdocs: onlinedocs/13.1.0: Remove last trace of XHTML

2023-05-19 Thread Gerald Pfeifer
This is how I actually noticed the situation in gcc-13/buildstat.html (and then I mixed the two up). Jakub, do you have some old templates somewhere maybe? Gerald Pushed: --- htdocs/onlinedocs/13.1.0/index.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH v2] MIPS16: Implement `code_readable` function attribute.

2023-05-19 Thread Jie Mei
From: Simon Dardis Support for __attribute__ ((code_readable)). Takes up to one argument of "yes", "no", "pcrel". This will change the code readability setting for just that function. If no argument is supplied, then the setting is 'yes'. gcc/ChangeLog: * config/mips/mips.cc (enum

[PATCH] tree-ssa-math-opts: Pattern recognize some further hand written forms of signed __builtin_mul_overflow{,_p} [PR105776]

2023-05-19 Thread Jakub Jelinek via Gcc-patches
Hi! In the pattern recognition of signed __builtin_mul_overflow{,_p} we check for result of unsigned division (which follows unsigned multiplication) being equality compared against one of the multiplication's argument (the one not used in the division) and check for the comparison to be done

[PATCH] tree-ssa-math-opts: Pattern recognize hand written __builtin_mul_overflow_p with same unsigned types even when target just has highpart umul [PR101856]

2023-05-19 Thread Jakub Jelinek via Gcc-patches
Hi! As can be seen on the following testcase, we pattern recognize it on i?86/x86_64 as return __builtin_mul_overflow_p (x, y, 0UL) and avoid that way the extra division, but don't do it e.g. on aarch64 or ppc64le, even when return __builtin_mul_overflow_p (x, y, 0UL); actually produces there

[PATCH] MIPS16: Implement `code_readable` function attribute.

2023-05-19 Thread Jie Mei
Support for __attribute__ ((code_readable)). Takes up to one argument of "yes", "no", "pcrel". This will change the code readability setting for just that function. If no argument is supplied, then the setting is 'yes'. gcc/ChangeLog: * config/mips/mips.cc (enum

[PATCH v1] rs6000: Update powerpc test fold-vec-extract-int.p8.c

2023-05-19 Thread Ajit Agarwal via Gcc-patches
Hello All: Update powerpc tests for both le and be endian with extra removal of zero extension and sign extension. with default ree pass for rs6000 target. Bootstrapped and regtested on powerpc64-linux-gnu. Thanks & Regards Ajit rs6000: Update powerpc test fold-vec-extract-int.p8.c Update

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