[PATCH] DW_AT_APPLE_* DWARF extensions.

Some time ago there was an attempt to add the DWARF DW_AT_APPLE_* extensions to the file include/dwarf2.def. The original patch email is here: https://sourceware.org/ml/binutils/2012-09/msg00282.html the patch committed mail is here: https://sourceware.org/ml/binutils/2012-10/msg00424.html

Re: [PATCH] DW_AT_APPLE_* DWARF extensions.

* Jakub Jelinek ja...@redhat.com [2014-11-13 10:55:34 +0100]: On Thu, Nov 13, 2014 at 10:35:28AM +0100, Andrew Burgess wrote: Am I correct to think that the include/* files are owned by GCC, and so the mistake here was not propagating the change to the GCC repository? Yes. 2014-11-13

Re: [PATCH] DW_AT_APPLE_* DWARF extensions.

* Jakub Jelinek ja...@redhat.com [2014-11-13 14:13:42 +0100]: On Thu, Nov 13, 2014 at 01:21:21PM +0100, Andrew Burgess wrote: I had a look around and couldn't find anything helpful. The best I can offer would be the current path within the llvm source code where these are defined. Would

[PATCH] cplus-demangler, free resource after a failed call to gnu_special.

Fixes issue: https://sourceware.org/bugzilla/show_bug.cgi?id=16817 A call to gnu_special within internal_cplus_demangle could cause memory resources to be allocated, even if the demangle eventually fails. The following call into demangle_prefix will then be passed some partially initialised

Re: [PATCH] cplus-demangler, free resource after a failed call to gnu_special.

On 09/05/2014 9:53 PM, Ian Lance Taylor wrote: On Fri, May 9, 2014 at 7:35 AM, Andrew Burgess aburg...@broadcom.com wrote: if ((AUTO_DEMANGLING || GNU_DEMANGLING)) { success = gnu_special (work, mangled, decl); + if (!success

Re: [PATCH] cplus-demangler, free resource after a failed call to gnu_special.

On 14/05/2014 10:01 AM, Gary Benson wrote: Ian Lance Taylor wrote: Andrew Burgess aburg...@broadcom.com wrote: On 09/05/2014 9:53 PM, Ian Lance Taylor wrote: Andrew Burgess aburg...@broadcom.com wrote: if ((AUTO_DEMANGLING || GNU_DEMANGLING)) { success = gnu_special

[PATCH] Delete temporary string within demangler even in failure cases.

Spotted that a call to demangle_template might allocate storage within a temporary string even if the call to demangle_template eventually returns failure. This will never cause the demangler to crash, but does leak memory, as a result I've not added any tests for this. Calling string_delete is

[PATCH] demangler, only access valid fields for DEMANGLE_COMPONENT_FIXED_TYPE.

In two places when a struct demangle_component is of type DEMANGLE_COMPONENT_FIXED_TYPE we fall back to accessing the default s_binary member of the union rather than the s_fixed member. This is incorrect and can cause the demangler to crash. In d_dump I've changed the code to only access the

Re: [PATCH] demangler, only access valid fields for DEMANGLE_COMPONENT_FIXED_TYPE.

On 28/05/2014 11:56 PM, Pedro Alves wrote: On 05/28/2014 09:38 PM, Andrew Burgess wrote: diff --git a/libiberty/testsuite/demangle-expected b/libiberty/testsuite/demangle-expected index 453f9a3..0e2bb12 100644 --- a/libiberty/testsuite/demangle-expected +++ b/libiberty/testsuite/demangle

Re: [PATCH] Delete temporary string within demangler even in failure cases.

On 27/05/2014 2:47 PM, Ian Lance Taylor wrote: On Tue, May 27, 2014 at 3:57 AM, Andrew Burgess aburg...@broadcom.com wrote: libiberty/ChangeLog * cplus-dem.c (do_type): Call string_delete even if the call to demangle_template fails. This is OK. Thanks. I have to ask

PING: Re: [PATCH] demangler, only access valid fields for DEMANGLE_COMPONENT_FIXED_TYPE.

Ping! Thanks for your time, Andrew On 29/05/2014 1:02 AM, Andrew Burgess wrote: On 28/05/2014 11:56 PM, Pedro Alves wrote: On 05/28/2014 09:38 PM, Andrew Burgess wrote: diff --git a/libiberty/testsuite/demangle-expected b/libiberty/testsuite/demangle-expected index 453f9a3..0e2bb12 100644

Re: [PATCH] libiberty/argv.c: Use freeargv() instead of free() to avoid memory leak.

* Chen Gang S gang.c...@sunrus.com.cn [2015-01-28 19:34:38 +0800]: libiberty/argv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libiberty/argv.c b/libiberty/argv.c index f2727e8..9fdd55b 100644 --- a/libiberty/argv.c +++ b/libiberty/argv.c @@ -454,7 +454,7 @@

Re: [PATCH 2/4] gcc/arc: Remove load_update_operand predicate

* Joern Wolfgang Rennecke <g...@amylaar.uk> [2015-12-17 10:20:44 +]: > On 16/12/15 00:15, Andrew Burgess wrote: > > > > * config/arc/arc.md (*loadqi_update): Use 'memory_operand' and fix > > RTL pattern to include the plus. > > (*load

Re: [PATCH 3/4] gcc/arc: Remove store_update_operand predicate

--git a/gcc/ChangeLog b/gcc/ChangeLog index 5c14a5a..b2dff58 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,14 @@ 2015-12-09 Andrew Burgess <andrew.burg...@embecosm.com> + * config/arc/arc.md (*storeqi_update): Use 'any_mem_operand' and + fix RTL pattern to include th

[PATCH 4/4] gcc/arc: Avoid JUMP_LABEL_AS_INSN for possible return jumps

..bd2621d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2015-12-09 Andrew Burgess <andrew.burg...@embecosm.com> + * config/arc/arc.c (arc_loop_hazard): Don't convert the jump label + rtx to an rtx_insn until we confirm it's not a return rtx. + +2015-12-09

[PATCH 1/4] gcc/arc: Fix warning in test

files changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6bcacab..bf4d198 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-12-09 Andrew Burgess <andrew.burg...@embecosm.com> + + * gcc.targ

[PATCH 3/4] gcc/arc: Remove store_update_operand predicate

-- 3 files changed, 21 insertions(+), 30 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 705d4e9..dcc0930 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,14 @@ 2015-12-09 Andrew Burgess <andrew.burg...@embecosm.com> + * config/arc/

[PATCH 0/4] [ARC] Collection Of Bug Fixes

This is a collection of 4 bug fix patches for arc. All 4 patches are really stand-alone, I've only grouped them together as they all only effect arc. I don't have write access to the GCC repository, so if they get approved could they also be applied please. Thanks, Andrew -- Andrew Burgess (4

[PATCH 2/4] gcc/arc: Remove load_update_operand predicate

-12-09 Andrew Burgess <andrew.burg...@embecosm.com> + + * config/arc/arc.md (*loadqi_update): Use 'memory_operand' and fix + RTL pattern to include the plus. + (*load_zeroextendqisi_update): Likewise. + (*load_signextendqisi_update): Likewise. + (*loadhi_

[PATCH] arc/gcc: Fix help text for some options.

The following minor patch fixes up the command line option help text for arc. This resolves one test failure in help.exp. I don't have GCC write access, so if this is approved, please could someone apply it for me. Thanks, Andrew --- Add missing period to the end of the sentences for a couple

[PATCH 2/2] gcc: Update comment in bb-reorder.c

Out of date comment ... fixed. gcc/ChangeLog: * gcc/bb-reorder.c (pass_partition_blocks::gate): Update comment. --- gcc/ChangeLog| 4 gcc/bb-reorder.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/bb-reorder.c b/gcc/bb-reorder.c index

[PATCH 1/2] gcc: Remove unneeded global flag.

The global flag `user_defined_section_attribute' is set while parsing C code when the section attribute is encountered. The flag is set when anything has the section attribute applied to it, functions or data. The only place this global was used was within the gate function for partitioning

[PATCH 0/2] Remove user_defined_section_attribute global

The first patch contains the interesting change, the second is just a small comment fix in a related area of code, that I spotted while creating the first patch. I don't have commit access, so if these are reviewed / approved, please could they also be applied. Thanks, Andrew --- Andrew

[PATCH 2/2] gcc/genrecog: Don't warn for missing mode on special predicates

-by: Andrew Burgess <andrew.burg...@embecosm.com> --- gcc/ChangeLog | 5 + gcc/genrecog.c | 22 +++--- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/gcc/genrecog.c b/gcc/genrecog.c index a9f5a4a..7596552 100644 --- a/gcc/genrecog.c +++ b/gcc/genrecog.c @@

[PATCH 1/2] gcc/arc: New peephole2 and little endian arc test fixes

Resolve some test failures introduced for little endian arc as a result of the recent arc/nps400 additions. There's a new peephole2 optimisation to merge together two zero_extracts in order that the movb instruction can be used. Source operand mode filled in for a peephole2 optimisation, to

[PATCH 0/2] Arc fixes and genrecog warning fix

audience. Thanks, Andrew --- Andrew Burgess (2): gcc/arc: New peephole2 and little endian arc test fixes gcc/genrecog: Don't warn for missing mode on special predicates gcc/ChangeLog| 11 +++ gcc/config/arc/arc.md| 16

[PATCH 07/10] gcc/arc: Add nps400 bitops support

/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400 index 2a0f820..8229d67 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,45 @@ +2013-02-19 Joern Rennecke <joern.renne...@embecosm.com> + Andrew Burgess <andrew.burg...@embecosm.com> + + * conf

[PATCH 06/10] gcc/arc: Add support for nps400 cmem xld/xst instructions

/testsuite/gcc.target/arc/cmem-st.inc diff --git a/gcc/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400 index 5d1533c..2a0f820 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,31 @@ +2013-08-31 Joern Rennecke <joern.renne...@embecosm.com> + Andrew Burgess <andrew.b

[PATCH 10/10] gcc/arc: Add __NPS400__ define for nps400 targets

a/gcc/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400 index 146370c..e1889b9 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,7 @@ +2016-02-08 Andrew Burgess <andrew.burg...@embecosm.com> + + * conig/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Add __NPS400__. + 2016-01-19

[PATCH 09/10] gcc/arc: Add an nps400 specific testcase

..20f88d0 100644 --- a/gcc/testsuite/ChangeLog.NPS400 +++ b/gcc/testsuite/ChangeLog.NPS400 @@ -1,3 +1,7 @@ +2016-02-06 Andrew Burgess <andrew.burg...@embecosm.com> + + * gcc.target/arc/nps400-1.c: New file. + 2016-01-19 Andrew Burgess <andrew.burg...@embecosm.com> * gc

[PATCH 08/10] gcc/arc: Mask integer 'L' operands to 32-bit

--- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,9 @@ +2016-01-19 Joern Rennecke <joern.renne...@embecosm.com> + Andrew Burgess <andrew.burg...@embecosm.com> + + * config/arc/arc.c (arc_print_operand): Print integer 'L' operands + as 32-bits. +

[PATCH 05/10] gcc/arc: convert some constraints to define_constraint

NPS400 b/gcc/ChangeLog.NPS400 index 71463df..5d1533c 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,10 @@ +2016-03-01 Joern Rennecke <joern.renne...@embecosm.com> + Andrew Burgess <andrew.burg...@embecosm.com> + + * config/arc/constraints.md (Usd): Conv

[PATCH 02/10] gcc/arc: Add -munaligned-access option for nps400

a/gcc/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400 index 286f2dd..0281640 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,14 @@ +2016-02-02 Joern Rennecke <joern.renne...@embecosm.com> + Andrew Burgess <andrew.burg...@embecosm.com> + + * conf

[PATCH 03/10] gcc/arc: generate jump tables in code section for nps400

@@ -1,3 +1,10 @@ +2015-09-08 Andrew Burgess <andrew.burg...@embecosm.com> + Joern Rennecke <joern.renne...@embecosm.com> + Noam Camus <noa...@mellanox.com> + + * config/arc/arc.opt (TARGET_CASE_VECTOR_PC_RELATIVE): Default on + for NPS400. + 2016-02-

[PATCH 01/10] gcc: Add support for mellanox nps400 arc variant

/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,8 @@ +2016-02-01 Andrew Burgess <andrew.burg...@embecosm.com> + + * config.gcc: Add support for arc*-mellanox-* nps400 targets. + * config/arc/t-nps400: New file. + 2016-02-02 Andrew Burgess <andrew.burg...@emb

[PATCH 04/10] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns

insertions(+), 48 deletions(-) diff --git a/gcc/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400 index 716e413..71463df 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,15 @@ +2016-02-01 Andrew Burgess <andrew.burg...@embecosm.com> + + * config/arc/arc.md (*loadqi_

[PATCH 00/10] ARC: Add support for NPS400 variant

that I could get an early review, especially on patch #1, the build infrastructure, then if I need to rework anything I can get started on it sooner. I've run regression tests against a standard arc-elf target, and the results look good. All feedback appreciated. Thanks, Andrew --- Andrew Burgess

Re: [PATCHv2 0/7] ARC: Add support for nps400 variant

* Claudiu Zissulescu [2016-04-29 09:03:53 +]: > I see the next tests failing: > > FAIL: gcc.target/arc/movb-1.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+, > *r[0-5]+, *19, *21, *8 > FAIL: gcc.target/arc/movb-2.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+,

Re: [PATCHv2 2/7] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns

* Joern Wolfgang Rennecke <g...@amylaar.uk> [2016-04-28 18:06:42 +0100]: > On 21/04/16 12:39, Andrew Burgess wrote: > > > > * config/arc/arc.md (*loadqi_update): Replace use of 'rI' > > constraint with separate 'r' and 'Cm2' constraints. > > >

Re: [PATCHv2 0/7] ARC: Add support for nps400 variant

* Claudiu Zissulescu [2016-04-29 09:03:53 +]: > I see the next tests failing: > > FAIL: gcc.target/arc/movb-1.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+, > *r[0-5]+, *19, *21, *8 > FAIL: gcc.target/arc/movb-2.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+,

Re: [PATCHv2 0/7] ARC: Add support for nps400 variant

* Claudiu Zissulescu [2016-05-02 09:02:16 +]: > Please also consider to address also the following warnings introduced: > > mainline/gcc/gcc/config/arc/arc.md:888: warning: source missing a mode? > mainline/gcc/gcc/config/arc/arc.md:906: warning: source

[PATCHv2 6/7] gcc/arc: Mask integer 'L' operands to 32-bit

When formatting 'L' operands (least significant word) only print 32-bits, don't sign extend to 64-bits. This commit could really be applied directly to the current GCC trunk, however, the only test I have for this issue right now relies on the nps400 bitops support. gcc/ChangeLog: *

[PATCHv2 0/7] ARC: Add support for nps400 variant

hub: https://github.com/EZchip/binutils However, all of the nps400 specific tests are compile only, so a binutils with full nps400 support should not be required in order to test these changes. Thanks, Andrew --- Andrew Burgess (7): gcc/arc: Add support for nps400 cpu type. gcc/arc: Replace

[PATCHv2 1/7] gcc/arc: Add support for nps400 cpu type.

The nps400 is an arc700 with a set of extension instructions produced by Mellanox (formally EZChip). This commit adds support for the nps400 architecture to the arc backend. After this commit it is possible to compile using -mcpu=nps400 in order to specialise for the nps400. Later commits add

[PATCHv2 2/7] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns

In the load*_update instructions the constraint 'rI' was being used, which would accept either a register or a signed 12 bit constant. The problem is that the 32-bit form of ld with update only takes a signed 9-bit immediate. As such, some ld instructions could be generated that would, when

[PATCHv2 5/7] gcc/arc: Add nps400 bitops support

Add support for nps400 bit operation instructions. There's a new flag -mbitops that turns this feature on. There are new instructions, some changes to existing instructions, a new register class to support the new instructions, and some new expand and peephole optimisations. gcc/ChangeLog:

[PATCHv2 4/7] gcc/arc: Add support for nps400 cmem xld/xst instructions

This commit adds support for NPS400 cmem memory sections. Data to be placed into cmem memory is placed into a section ".cmem", ".cmem_shared", or ".cmem_private". There are restrictions on how instructions can be used to operate on data held in cmem memory, this is reflected by the introduction

[PATCHv2 7/7] gcc/arc: Add an nps400 specific testcase

This test case triggered a bug caused by VOIDmode not being handled in proper_comparison_operator, this problem was fixed with a commit on 2016-01-27 by Claudiu Zissulescu, adding this test case for coverage. gcc/testsuite/ChangeLog: * gcc.target/arc/nps400-1.c: New file. ---

[PATCHv2 3/7] gcc/arc: convert some constraints to define_constraint

The define_memory_constraint allows for the address operand to be reloaded into a base register. However, for the constraints 'Us<' and 'Us>', which are used for matching 'push' and 'pop' instructions moving the address into a base register is not helpful. The constraints then should be

Re: [PATCH] [ARC] Various small miscellaneous fixes.

* Claudiu Zissulescu [2016-06-30 12:36:10 +0200]: > Small patches batch. > > Ok to apply? > Claudiu > > gcc/ > 2016-05-09 Claudiu Zissulescu > > * config/arc/arc.c (arc_process_double_reg_moves): Change. > *

Re: [PATCH] [ARC] Various small miscellaneous fixes.

* Claudiu Zissulescu [2016-07-08 08:18:00 +]: > > > + && (register_operand (operands[1], SFmode) > > > + || register_operand (operands[2], SFmode))" > > This condition is necessary for reload cases. > > > And, with this patch applied, I get a build

Re: [PATCH 2/2] gcc/genrecog: Don't warn for missing mode on special predicates

* Richard Sandiford <richard.sandif...@arm.com> [2016-07-04 09:47:20 +0100]: > Andrew Burgess <andrew.burg...@embecosm.com> writes: > > +/* Return true if OPERAND is a MATCH_OPERAND using a special predicate > > + function. */ > > + > > +static boo

Re: [PATCH 2/2] gcc/genrecog: Don't warn for missing mode on special predicates

* Richard Sandiford <rdsandif...@googlemail.com> [2016-06-15 19:07:56 +0100]: > Andrew Burgess <andrew.burg...@embecosm.com> writes: > > In md.texi it says: > > > > Predicates written with @code{define_special_predicate} do not get any > > automatic

Re: [PATCH] gcc/arc: Avoid add_s REG,REG,pcl on ARCv2 targets

* Claudiu Zissulescu [2016-06-30 07:36:32 +]: > I think the compactsi makes no sense for ARCv2 without the add_s > reg, reg,PCL instruction. Moreover, I have proposed a patch about > this issue months ago, See: >

[PATCH] gcc/arc: Avoid add_s REG,REG,pcl on ARCv2 targets

The ARCv2 targets don't support add_s REG,REG,pcl like earlier ARC targets did. This instruction format is used when generating case jump tables. This commit updates the code so that ARCv2 targets avoid the unsupported instruction. This does mean the code is slightly longer on ARCv2, so the

Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Jeff Law <l...@redhat.com> [2016-06-21 20:55:15 -0600]: > On 06/10/2016 10:56 AM, Andrew Burgess wrote: > > The global flag `user_defined_section_attribute' is set while parsing C > > code when the section attribute is encountered. The flag is set when > > anythin

Re: [PATCH 0/2] [ARC] Define __NPS400__ properly

* Claudiu Zissulescu <claudiu.zissule...@synopsys.com> [2017-01-30 10:35:08 +]: > Hi, > > > > > Andrew Burgess (2): > > ARC: Make arc_selected_cpu global > > ARC: Better creation of __NPS400__ define > > > > gcc/ChangeLog

Re: [PATCH] Use arclinux_nps linker emulation for nps400

* Graham Markall [2016-12-12 20:44:17 +]: > Hi Claudiu, > > On 12/12/16 19:18, Claudiu Zissulescu wrote: > > It looks sane to me, please apply (ask Andrew to do it for you) > > > > //Claudiu > > Many thanks for the quick review. I'll ask Andrew to do it once

[PATCH 1/2] ARC: Make arc_selected_cpu global

Currently we only make the base_architecture globally available, this means we can tell if we have selected arc700/archs/etc but it's not possible to tell if the user has selected a specific cpu variant, for example nps400. One problem this causes is, for example, in arc-c.def, if we want to add

[PATCH 2/2] ARC: Better creation of __NPS400__ define

The __NPS400__ define is currently created in CPP_SPEC unlike the other target defines, which are created in arc-c.def. Further, the current __NPS400__ define is (currently) only created when -mcpu=nps400 is passed, which is fine, except that if GCC is configured using --with-cpu=nps400 then the

[PATCH 0/2] [ARC] Define __NPS400__ properly

in at this stage in the release, but it would be great if I could.. Thanks, Andrew --- Andrew Burgess (2): ARC: Make arc_selected_cpu global ARC: Better creation of __NPS400__ define gcc/ChangeLog | 31 gcc/config/arc/arc-arch.h | 50

Re: [PATCH] [ARC] Clean up arc header file.

* Claudiu Zissulescu [2017-01-09 14:41:44 +0100]: > This patch revamps the arc's header file by means of using separate > headers for different tool targets. Each target header file holds the > specific compiler backend macros definitions. Thus, we have: > -

Re: [PATCH] [ARC] Clean up arc header file.

* Mike Stump <mikest...@comcast.net> [2017-01-17 10:49:30 -0800]: > On Jan 17, 2017, at 3:30 AM, Andrew Burgess <andrew.burg...@embecosm.com> > wrote: > > > >> This patch revamps the arc's header file by means of using separate > >> headers for diffe

Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

tamp, might be zero if none is available. */ extern unsigned local_tick; -/* True if the user has tagged the function with the 'section' - attribute. */ - -extern bool user_defined_section_attribute; - /* See toplev.c. */ extern int flag_rerun_cse_after_global_opts; -- 2.6.4 * A

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Jakub Jelinek <ja...@redhat.com> [2016-09-14 15:07:56 +0200]: > On Wed, Sep 14, 2016 at 02:00:48PM +0100, Andrew Burgess wrote: > > In an attempt to get this patch merged (as I still think that its > > correct) I've investigated, and documented a little more about h

Re: [PATCH 1/2] [ARC] [libgcc] Add support for QuarkSE processor.

* Claudiu Zissulescu [2016-07-08 13:41:22 +0200]: > libgcc/ > 2016-05-26 Claudiu Zissulescu > > * config/arc/dp-hack.h (ARC_OPTFPE): Define. > (__ARC_NORM__): Use instead ARC_OPTFPE. > * config/arc/fp-hack.h: Likewise.

Re: [PATCH] Disable compact casesi patterns for arcv2

* Claudiu Zissulescu [2016-09-29 10:41:02 +0200]: > Here it is. The previous version had more mods which should be in a > different patch. > > Please let me know if you still have issues with it, > Claudiu > > gcc/ > 2016-05-09 Claudiu Zissulescu

Re: [PATCH 2/2] [ARC] [libgcc] Fix defines

* Claudiu Zissulescu [2016-07-08 13:41:23 +0200]: > Don't use CPU macros, use CPU feature macros. > > libgcc/ > 2016-05-26 Claudiu Zissulescu > > * config/arc/lib1funcs.S (__mulsi3): Use feature defines instead > of

Re: [PATCH] [ARC] Disable compact casesi patterns for arcv2

* Claudiu Zissulescu [2016-09-30 15:52:03 +0200]: > Please find the updated patch, > Claudiu > > gcc/ > 2016-05-09 Claudiu Zissulescu > > * common/config/arc/arc-common.c (arc_option_optimization_table): > Remove compact

Re: [PATCH] [ARC] Add simple shift/rotate ops.

* Claudiu Zissulescu [2016-06-17 11:13:08 +0200]: > Basic ARC cpus are having only simple shift operations. Here they are. > > OK to apply? This looks good to me. Thanks, Andrew > > gcc/ > 2016-06-09 Claudiu Zissulescu > >

Re: [PATCH] [ARC] Fix emitting jump tables for ARCv2

* Claudiu Zissulescu [2016-04-26 13:28:58 +0200]: > The compact casesi option only make sens for ARCv1 cores. For ARCv2 cores we > use the regular expansion. > > OK to apply? Claudiu, Could you rebase this onto the current head please. I couldn't get this to

Re: [PATCH] [ARC] New CPU C-define handler.

* Claudiu Zissulescu [2016-05-19 13:57:44 +0200]: > This patch refactors how we handle the built-in preprocessor macros and > assertions for ARC. > > OK to apply? This looks like a good improvement to me. Thanks, Andrew > Claudiu > > gcc/ > 2016-05-02

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Jeff Law <l...@redhat.com> [2016-10-28 09:58:14 -0600]: > On 09/15/2016 08:24 AM, Andrew Burgess wrote: > > * Jakub Jelinek <ja...@redhat.com> [2016-09-14 15:07:56 +0200]: > > > > > On Wed, Sep 14, 2016 at 02:00:48PM +0100, Andrew Burgess wrote: > >

Re: [PATCH] [ARC] New option handling, refurbish multilib support.

* Claudiu Zissulescu [2016-11-10 12:02:34 +0100]: > Hi, > > Please find the revised patch which includes the refurbishing of > mmpy-option option, and a new comment on DEFAULT_arc_fpu_build > define. As for the last suggestion, my proposal is to have a latter >

[PATCH] arc: Avoid store/load pipeline hazard

The patch below was primarily written (over several patches) by Claudiu (CC'd) as part of an out-of-tree ARC GCC port. I've pulled the work together into a single patch, and added a test. Claudiu is happy for this to be posted upstream. --- ARC700 targets have a store/load pipeline hazard, if

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Christophe Lyon <christophe.l...@linaro.org> [2016-11-21 13:47:09 +0100]: > On 20 November 2016 at 18:27, Mike Stump <mikest...@comcast.net> wrote: > > On Nov 19, 2016, at 1:59 PM, Andrew Burgess <andrew.burg...@embecosm.com> > > wrote: > >>

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Bernd Schmidt <bschm...@redhat.com> [2016-11-03 13:01:32 +0100]: > On 09/14/2016 03:00 PM, Andrew Burgess wrote: > > In an attempt to get this patch merged (as I still think that its > > correct) I've investigated, and documented a little more about how I > > think

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Mike Stump <mikest...@comcast.net> [2016-11-16 12:59:53 -0800]: > On Nov 16, 2016, at 12:09 PM, Andrew Burgess <andrew.burg...@embecosm.com> > wrote: > > My only remaining concern is the new tests, I've tried to restrict > > them to targe

Re: [PATCH] [ARC] Add support for QuarkSE processor.

* Claudiu Zissulescu [2016-11-16 11:30:35 +0100]: > Updated QuarkSE patch. > > Ok to apply? Looks fine. Thanks, Andrew > Claudiu > > gcc/ > 2016-05-25 Claudiu Zissulescu > > * config/arc/arc-arches.def: Add FPX quarkse

Re: [PATCH 4/4] [ARC] Fix compilation issue in pr71872.

* Claudiu Zissulescu [2016-11-16 11:18:01 +0100]: > gcc/ > 2016-07-21 Claudiu Zissulescu > > * config/arc/arc.c (arc_ccfsm_post_advance): Handle return > instruction type. Looks fine. Thanks, Andrew > --- >

[PATCH] arc/nps400: New peephole2 pattern allow more cmem loads

In the case where we access a single bit from a value and use this in a EQ/NE comparison, GCC will convert this into a sign-extend and GE/LT comparison. Normally this would be fine, however, if the value is in CMEM memory, then we don't have a sign-extending load available (using the special

Re: [PATCH] arc/nps400: New peephole2 pattern allow more cmem loads

* Claudiu Zissulescu [2016-11-17 13:02:02 +]: > Hi Andrew, > > Approved, please apply, but ... > > > +(define_peephole2 > > + [(set (match_operand:SI 0 "register_operand" "") > > +(sign_extend:SI > > + (match_operand:QI 1

Re: [PATCH 2/2] [ARC] Update target specific tests.

* Claudiu Zissulescu [2016-05-30 14:32:38 +0200]: > Update the ARC specific tests. > > OK to apply? > Claudiu > > gcc/ > 2016-05-26 Claudiu Zissulescu > > * testsuite/gcc.target/arc/abitest.S: New file. > *

Re: [PATCH] arc/nps400: New peephole2 pattern allow more cmem loads

* Claudiu Zissulescu [2016-11-17 13:23:44 +]: > > > > Note on tests: It will be nice to add a test where the added > > > peephole kicks in. If you consider to add this test to the current > > > patch, please resubmit it. > > > > There were

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Christophe Lyon <christophe.l...@linaro.org> [2016-11-18 13:21:50 +0100]: > On 16 November 2016 at 23:12, Andrew Burgess > <andrew.burg...@embecosm.com> wrote: > > * Mike Stump <mikest...@comcast.net> [2016-11-16 12:59:53 -0800]: > > > >>

Re: [PATCH] [ARC] New option handling, refurbish multilib support.

* Claudiu Zissulescu [2016-10-31 16:46:17 +0100]: > Please find the updated patch. > > What is new: > - The .def files are having a comment block on how to add new lines. > - The arc_seen_option is not used. > - The arc_cpu* variables are not used. > > Please

Re: [PATCH] [ARC] Various small miscellaneous fixes.

* Claudiu Zissulescu [2016-11-01 16:28:34 +0100]: > This is an updated version of the patch that can be applied as is. > > Ok to apply? > Claudiu > > gcc/ > 2016-05-09 Claudiu Zissulescu > > * config/arc/arc.c

[COMMITTED] Add myself to MAINTAINERS file

I committed the patch below. Thanks, Andrew --- Index: ChangeLog === --- ChangeLog (revision 241618) +++ ChangeLog (revision 241619) @@ -1,3 +1,8 @@ +2016-10-27 Andrew Burgess <andrew.burg...@embecosm.

Re: [PATCH 2/2] [ARC] Fix mul32x16 patterns.

* Claudiu Zissulescu [2016-06-30 12:24:12 +0200]: > The mululw instructions are wrongly used in the patterns, fix them. > > Okt to apply? > Claudiu > > gcc/ > 2016-06-28 Claudiu Zissulescu > > * config/arc/arc.md (umul_600):

Re: [PATCH 1/2] [ARC] Update INSN_LENGTH_ALIGNMENT.

* Claudiu Zissulescu [2016-06-30 12:24:11 +0200]: > Update the INSN_LENGTH_ALIGNMENT macro to handle jump tables placed in > program memory. > > Ok to apply? > Claudiu This looks good to me. Thanks, Andrew > > > gcc/ > 2016-06-20 Claudiu Zissulescu

Re: [PATCH] [ARC] New option handling, refurbish multilib support.

* Claudiu Zissulescu [2016-10-10 15:26:47 +0200]: > Hi Andrew, > > This is updated patch of the original sent to mailing list some while ago. > > What is new: > - Do not use MULTILIB_REUSE as its semantic changed, and the old one was > causing issues

Re: [PATCH 2/2] [ARC] Remove old prof patterns.

* Claudiu Zissulescu [2016-12-05 12:59:13 +0100]: > Cleanup old patterns. > > gcc/ > 2016-10-10 Claudiu Zissulescu > > * config/arc/arc.md (call_prof): Remove. > (call_value_prof): Likewise. > (sibcall_prof):

Re: [PATCH 3/4] [ARC] Refurbish mul64 support.

* Claudiu Zissulescu [2016-11-16 11:18:00 +0100]: > gcc/ > 2016-07-04 Claudiu Zissulescu > > * config/arc/arc.md (mulsidi_600): Changed. > (umulsidi_600): Likewise. > (mul64): New pattern. > (mulu64): Likewise. >

Re: [PATCH 1/2] [ARC] Generating code for profiling.

* Claudiu Zissulescu [2016-12-05 12:59:12 +0100]: > Remove old gmonlib from libgcc and reimplemnt profiling using UCB > counters. > > gcc/ > 2016-07-28 Claudiu Zissulescu > > * config/arc/arc.h (LINK_SPEC): Tidy up. >

Re: [PATCH 2/4] [ARC] Cleanup implementation.

* Claudiu Zissulescu [2016-11-16 11:17:59 +0100]: > gcc/ > 2016-06-30 Claudiu Zissulescu There seem to be two sets of changes here: > > * config/arc/arc-protos.h (insn_is_tls_gd_dispatch): Remove. > * config/arc/arc.c

Re: [PATCH] [ARC] Fix compact casesi option.

* Claudiu Zissulescu [2016-11-29 13:43:21 +0100]: > Fixing casesi option for ARCv2 cpus. > > Ok to apply? > Claudiu Approved. Thanks, Andrew > > gcc/ > 2016-11-28 Claudiu Zissulescu > > * config/arc/arc.c

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Jeff Law <l...@redhat.com> [2016-11-28 15:08:46 -0700]: > On 11/24/2016 02:40 PM, Andrew Burgess wrote: > > * Christophe Lyon <christophe.l...@linaro.org> [2016-11-21 13:47:09 +0100]: > > > > > On 20 November 2016 at 18:27, Mike Stump <mikest...@comc

Re: [PATCH] arc: Avoid store/load pipeline hazard

* Claudiu Zissulescu [2016-11-28 09:29:22 +]: > Hi Andrew, > > Approved, but ... Thanks. Committed as r243007 with the changes you suggested. Thanks again, Andrew > > > +/* Return true if a load instruction (CONSUMER) uses the same address > > +

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Jeff Law <l...@redhat.com> [2016-11-29 10:35:50 -0700]: > On 11/29/2016 07:02 AM, Andrew Burgess wrote: > > * Jeff Law <l...@redhat.com> [2016-11-28 15:08:46 -0700]: > > > > > On 11/24/2016 02:40 PM, Andrew Burgess wrote: > > > > * Christophe Lyo

Re: [PATCH 1/5] [ARC] Save/restore blink when in ISR.

* Claudiu Zissulescu [2017-03-20 12:43:26 +0100]: > BLIBK register needs to be saved/restored in a interrupt. Fix this issue. > > gcc/ > 2016-09-21 Claudiu Zissulescu > > * config/arc/arc.c (arc_epilogue_uses): BLINK should be

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