)
+ {
+ if (gimple_assign_rhs1 (use_stmt) == exp)
+ expand_cond = true;
+ }
+}
return expand_cond;
}
Thanks,
Andrew Pinski
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 2ca2278..8ee1266 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -43,6 +43,7 @@
#include vec.h
On Mon, Jun 23, 2014 at 12:09 AM, Andrew Pinski pins...@gmail.com wrote:
On Mon, Jun 23, 2014 at 12:01 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
The patch enhances ifcvt to handle conditional compare instruction
(ccmp) to make it work with cmov. For ccmp, ALLOW_CC_MODE is set
On Mon, Jun 23, 2014 at 11:17 AM, Andi Kleen a...@firstfloor.org wrote:
Marc Glisse marc.gli...@inria.fr writes:
Hello,
this is a stage 1 patch, and I'll ping it then, but if you have
comments now...
FWIW i believe the transformation will break a large variety of micro
benchmarks.
On Mon, Jun 23, 2014 at 1:21 PM, Andi Kleen a...@firstfloor.org wrote:
On Mon, Jun 23, 2014 at 10:14:25PM +0200, Marc Glisse wrote:
On Mon, 23 Jun 2014, Andi Kleen wrote:
I would prefer to not do it.
For the sake of micro benchmarks?
Yes benchmarks are important.
But micro-benchmarks are
test to make
sure we don't ICE (which I think we do currently).
Thanks,
Andrew Pinski
2014-06-23 Andrew Pinski apin...@cavium.com
* gcc.c-torture/compile/20140723-1.c: New testcase.
Index: gcc.c-torture/compile/20140723-1.c
On Tue, Jun 3, 2014 at 5:07 PM, Jones, Joel
joel.jo...@caviumnetworks.com wrote:
There is duplicate code for determining whether a load or store
instruction needs acquire or release semantics. This patch removes the
duplicated code and uses a modifying operator to output a/l instead. Since
I committed this as obvious. The changelog says it all.
Thanks,
Andrew
2014-06-28 Andrew Pinski apin...@cavium.com
* lto.c (lto_read_decls): Fix comment in comment.
Index: lto.c
===
--- lto.c (revision 212118)
+++ lto.c
On Mon, Jul 14, 2014 at 1:40 PM, Dehao Chen de...@google.com wrote:
This patch replaces getline with fgets so that gcc builts fine in darwin.
Why not add getline to libiberty instead? This patch causes a huge stack usage.
Thanks,
Andrew Pinski
Testing on going, ok for google-4_9 if test
/torture instead?
I think changing the testcase in some cases is changing what is being
tested so a script doing it automatically is not a good thing. Each
testcase should be audited instead.
Thanks,
Andrew Pinski
Any other targets I should add to the list of compilers that are run before
deciding
On Wed, Jul 23, 2014 at 9:10 PM, Hongxu Jia hongxu@windriver.com wrote:
1. How to reproduce the issue:
1) manually modify gcc/Makefile.in to delay the generation of config.h:
...
diff --git gcc-4.9.0/gcc/Makefile.in gcc-4.9.0/gcc/Makefile.in
--- gcc-4.9.0/gcc/Makefile.in
+++
The problem here is that the pattern marks the second operand as a
rewrite constraint but this operand is never written to. It looks
like it was a copy and pasto.
Committed as obvious and should improve register allocation in some cases.
Thanks,
Andrew Pinski
ChangeLog:
* config/aarch64
of the as_a in one place.
Thanks,
Andrew Pinski
tree ssaname = NULL_TREE, lhs = gimple_assign_lhs (stmt);
if (TREE_CODE (lhs) == MEM_REF
from
https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=78aae552f15ad5f8f5290fb825f9ae33f4a7cad9
Only acting on one kind of gimple
Thanks,
Andrew Pinski
Thanks,
Richard.
Trev
gcc/ChangeLog:
2014-10-24 Trevor Saunders tsaund...@mozilla.com
* ipa-inline.c (edge_badness): Adjust.
(inline_small_functions): Likewise.
* predict.c (propagate_freq): Likewise.
(estimate_bb_frequencies
On Tue, Nov 11, 2014 at 1:23 AM, Marc Glisse marc.gli...@inria.fr wrote:
On Tue, 11 Nov 2014, Jakub Jelinek wrote:
On Tue, Nov 11, 2014 at 08:51:41AM +0100, Uros Bizjak wrote:
Hello!
do $subject, and cleanup for always 64 bit hwi.
bootstrapped + regtested x86_64-unknown-linux-gnu, ok?
!= 0). I just saw that recently when I was working on enhancing
PHI-opt.
Thanks,
Andrew Pinski
To achieve this the patch merges the mutually recursive functions
register_edge_assert_for_1() and register_edge_assert_for_2() into a
single recursive function, register_edge_assert_for_1
On Tue, Nov 11, 2014 at 4:54 AM, Richard Biener
richard.guent...@gmail.com wrote:
On Tue, Nov 11, 2014 at 1:08 PM, Andrew Pinski pins...@gmail.com wrote:
On Tue, Nov 11, 2014 at 1:23 AM, Marc Glisse marc.gli...@inria.fr wrote:
On Tue, 11 Nov 2014, Jakub Jelinek wrote:
On Tue, Nov 11, 2014
on aarch64-elf.
Thanks,
Andrew Pinski
ChangeLog:
Bug target/61997
* config.gcc (aarch64*-*-*): Set target_gtfiles to include
aarch64-builtins.c.
* config/aarch64/aarch64-builtins.c: Include gt-aarch64-builtins.h
at the end of the file.
Index: config.gcc
On Wed, Nov 12, 2014 at 2:54 AM, Jiong Wang jiong.w...@arm.com wrote:
On 12/11/14 10:01, Yangfei (Felix) wrote:
+ if (GET_MODE (operands[0]) != DImode)
+ FAIL;
shouldn't SImode be considered for -mabi=ilp32 ?
I don't think it is needed for -mabi=ilp32 since word_mode is still
On Wed, Nov 12, 2014 at 9:25 PM, Teresa Johnson tejohn...@google.com wrote:
Added testcase. Here is the new patch:
2014-11-12tejohn...@google.com
gcc:
PR tree-optimization/63841
* tree.c (initializer_zerop): A constructor with no elements
does not zero
On Wed, Nov 12, 2014 at 9:38 PM, Teresa Johnson tejohn...@google.com wrote:
On Wed, Nov 12, 2014 at 9:30 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Nov 12, 2014 at 9:25 PM, Teresa Johnson tejohn...@google.com wrote:
Added testcase. Here is the new patch:
2014-11-12tejohn
On Tue, Nov 11, 2014 at 3:55 AM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
Hi all,
This is the aarch64 implementation of the macro fusion hook, used to fuse
mov+movk instructions together.
A new field is declared in the tuning struct and as we add more fuseable ops
in the future we will
On Thu, Nov 13, 2014 at 9:42 AM, Sandra Loosemore
san...@codesourcery.com wrote:
On 11/13/2014 10:27 AM, Richard Earnshaw wrote:
On 13/11/14 17:05, Ramana Radhakrishnan wrote:
On Thu, Nov 13, 2014 at 4:55 PM, Sandra Loosemore
san...@codesourcery.com wrote:
This patch to the AArch64 back
On Thu, Nov 13, 2014 at 7:19 AM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
On 13/11/14 07:24, Andrew Pinski wrote:
On Tue, Nov 11, 2014 at 3:55 AM, Kyrill Tkachov kyrylo.tkac...@arm.com
wrote:
Hi all,
This is the aarch64 implementation of the macro fusion hook, used to fuse
mov+movk
On ThunderX, I found that aligning functions/loops/jumps to an 8 byte
boundary have a slightly better performance because the hardware issue
and dispatch matches what GCC's schedule has created.
I set generic, cortex-a53 and cortex-a57 also to be 8 byte aligned
also. Someone might want to change
In ThunderX, any 1 cycle arthemantic instruction that produces the flags
register, will be fused with a branch. This patch depends on
https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01508.html.
Note I know bit 1 is going is already going to be used and that is why I
proposed this being bit 2.
ThunderX pipeline description
+;; Copyright (C) 2014 Free Software Foundation, Inc.
+;;
+;; Written by Andrew Pinski apin...@cavium.com
+
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License
set the alignment
of functions, loops and jumps.
Thanks,
Andrew Pinski
Andrew Pinski (3):
[AARCH64] Add macro fusion support for cmp/b.X for ThunderX
[AARCH64] Add scheduler for ThunderX
[AARCH64] Add aligning of functions/loops/jumps
gcc/config/aarch64/aarch64-cores.def |2 +-
gcc
know they are declared and don't have a value of
zero so they will fit in the medium code model. This happens with
vtables and we lose some performance because of this.
Thanks,
Andrew Pinski
Thanks,
Tejas.
2014-11-14 Tejas Belagod tejas.bela...@arm.com
gcc/
* config/aarch64
On Fri, Nov 14, 2014 at 1:08 AM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
Hi Andrew,
On 14/11/14 00:56, Andrew Pinski wrote:
In ThunderX, any 1 cycle arthemantic instruction that produces the flags
register, will be fused with a branch. This patch depends on
https://gcc.gnu.org/ml/gcc
On Fri, Nov 14, 2014 at 2:35 AM, James Greenhalgh
james.greenha...@arm.com wrote:
Hi,
We currently do not set any interesting default values for jump and function
alignment in AArch64. I've made the formula for these values derive from
the issue rate of the processor as so:
jumps: 4 *
On Fri, Nov 14, 2014 at 12:50 AM, Tejas Belagod tejas.bela...@arm.com wrote:
On 14/11/14 08:19, Andrew Pinski wrote:
On Fri, Nov 14, 2014 at 12:12 AM, Tejas Belagod tejas.bela...@arm.com
wrote:
Hi,
Following the discussion here
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02237.html
.html
for the approval.
Thanks,
Andrew Pinski
On Fri, Nov 14, 2014 at 6:23 AM, u...@gcc.gnu.org wrote:
Author: uros
Date: Fri Nov 14 14:23:51 2014
New Revision: 217562
URL: https://gcc.gnu.org/viewcvs?rev=217562root=gccview=rev
Log:
* sanitizer_common/Makefile.am (AM_CXXFLAGS
On Fri, Nov 14, 2014 at 11:35 AM, Andrew Pinski pins...@gmail.com wrote:
On Fri, Nov 14, 2014 at 11:29 AM, Konstantin Serebryany
konstantin.s.serebry...@gmail.com wrote:
+gcc-patches
On Fri, Nov 14, 2014 at 11:26 AM, Konstantin Serebryany
konstantin.s.serebry...@gmail.com wrote:
I am
I thought I would mention the addition of the ThunderX AARCH64
processor support to the changes web page.
OK? Tested by looking at the web page with Chrome.
Thanks,
Andrew
? gcc-4.9/.changes.html.swp
? gcc-5/.changes.html.swp
Index: gcc-5/changes.html
all pseudos
assigned to it.
Can you revert your patch until you can figure out how to get LRA (and
reload) to play nicely with what you want to do?
Thanks,
Andrew Pinski
On Sat, Nov 15, 2014 at 6:08 AM, Jiong Wang
wong.kwongyuan.to...@gmail.com wrote:
2014-11-15 0:15 GMT+00:00 Andrew Pinski pins...@gmail.com:
On Tue, Sep 30, 2014 at 8:00 AM, Jiong Wang jiong.w...@arm.com wrote:
On 27/09/14 22:20, Kugan wrote:
On 23/09/14 01:58, Jiong Wang wrote
On Sat, Nov 15, 2014 at 7:21 AM, Andrew Pinski pins...@gmail.com wrote:
On Sat, Nov 15, 2014 at 6:08 AM, Jiong Wang
wong.kwongyuan.to...@gmail.com wrote:
2014-11-15 0:15 GMT+00:00 Andrew Pinski pins...@gmail.com:
On Tue, Sep 30, 2014 at 8:00 AM, Jiong Wang jiong.w...@arm.com wrote:
On 27/09
Add a few testcases which I had floating around in a private tree.
Most of these testcases failed in our private tree at one point due to
local changes. Since it is always good to have more testcases, I
decided to commit them.
I tested all of them on x86_64 with no failures.
Thanks,
Andrew
that it is rematerizing the new value of
sp where the old value of sp is needed after an alloca.
Thanks,
Andrew Pinski
So I've committed the rematerialization patch to the trunk as rev. 217458.
As I wrote its initial version of rematerialziation. Other
people and me proposed several ideas how
On Mon, Nov 17, 2014 at 12:04 PM, Sebastian Pop seb...@gmail.com wrote:
Andrew Pinski wrote:
diff --git a/gcc/config/aarch64/thunderx.md b/gcc/config/aarch64/thunderx.md
new file mode 100644
index 000..30e4395
--- /dev/null
+++ b/gcc/config/aarch64/thunderx.md
@@ -0,0 +1,260
On Mon, Nov 17, 2014 at 12:36 PM, Jeff Law l...@redhat.com wrote:
On 11/17/14 02:26, Jiong Wang wrote:
as Pinski reported at
https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01967.html
the previosu LR free patch on AArch64 cause one gcc_assert in
lra-elimination.c
one of the problem is
On Mon, Nov 17, 2014 at 4:15 PM, Vladimir Makarov vmaka...@redhat.com wrote:
The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63906
LRA rematerialization checks SP offsets at origin and rematerialization
places when trying to rematerialize an insn. But the offsets are
xgene1)
These all should have xgene1 in their names because they are not
generic names and if we decide on a generic scheduler, we might use
more generic names.
Thanks,
Andrew Pinski
+
+(define_reservation decode1op
+( decode_out_0 )
+|( decode_out_1 )
+|( decode_out_2
and tested for
aarch64-elf with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
ipa/63981
* ipa-polymorphic-call.c (possible_placement_new):
Use POINTER_SIZE instead of GET_MODE_BITSIZE (Pmode).
(ipa_polymorphic_call_context::restrict_to_inner_class): Likewise.
(extr_type_from_vtbl_ptr_store
On Wed, Nov 19, 2014 at 5:11 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 4:54 PM, Andrew Pinski pins...@gmail.com wrote:
Hi,
For ILP32 on AARCH64, we have ptr_mode != Pmode (we have ptr_mode
being SImode while Pmode is DImode and POINTER_SIZE is 32). This
breaks ipa
On Wed, Nov 19, 2014 at 5:35 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:23 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:11 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 4:54 PM, Andrew Pinski pins...@gmail.com wrote:
Hi
On Wed, Nov 19, 2014 at 5:37 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:36 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:35 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:23 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Nov 19
On Wed, Nov 19, 2014 at 5:53 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:39 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:37 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Nov 19, 2014 at 5:36 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Nov 19
: gcc.target/mips/movdf-2.c -O1 scan-assembler mthc1
FAIL: gcc.target/mips/movdf-2.c -O1 scan-assembler mtc1
...
FAIL: gcc.target/mips/movdf-3.c -O1 scan-assembler-times mtc1 2
...
Thanks,
Andrew Pinski
Matthew
as obvious after a test of aarch64-elf.
Thanks,
Andrew Pinski
ChangeLog:
* gcc.target/aarch64/test_frame_1.c: Expect only two loads of x30 (in
the epilogue).
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_2.c: Expect only one pair load of x30
and x19 (in the epilogue
Hi,
This is just a rebase of
https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01615.html as requested
by https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01736.html. Nothing
has changed in it.
OK? Built and tested on aarch64-elf with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
* config
Hi,
As discussed at
https://gcc.gnu.org/ml/gcc-patches/2014-10/msg00997.html, this is the
one line patch which improves shrink wrapping for lo_sum.
OK? Bootstrapped and tested on x86_64 and built and tested for
aarch64-elf with no regressions. It fixes shrink_wrap_symbol_ref_1.c
which was
an aarch64 cross compile on an
older system where objcopy did not understand aarch64.
OK? Bootstrapped and tested on x86_64 with no regressions. Also
tested with a combined build for a cross compiler to
aarch64-linux-gnu.
Thanks,
Andrew Pinski
* Makefile.def (flags_to_pass): Pass
Hi,
On some simulators (Octeon simple-exec) argc can be greater than 2.
This causes initlist-lifetime1.C and initlist-lifetime2.C to fail.
To fix this, I use a volatile variable.
Committed as obvious after testing on x86_64.
Thanks,
Andrew Pinski
* g++.dg/cpp0x/initlist-lifetime1.C
Hi,
While looking at what patches I had in the internal tree here at
Cavium, I noticed two more testcases which I did upstream already.
One testcase for PR 53135 (reduced from dhcp-server) and another one
for an ICE which showed up while improving PHI-OPT (reduced from
gnupg-2.0.18).
Committed
for the -O2), it really should
go into gcc.c-torture/compile instead of remove the two dg-*
directives so it can be tested on more than AARCH64 and on more
optimization levels.
Thanks,
Andrew Pinski
and the scalar version, I am proposing this patch
to make them consistent.
OK? Build and tested on aarch64-elf with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
* config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather
than CF10 so 2 is appended on the code.
* config
libobjc.so. See
libobjc.def. I would rather use -std=gnu90 to compile these source
files as you are changing the exported symbols.
This also fixes bug 63863.
Thanks,
Andrew Pinski
2014-11-25 Uros Bizjak ubiz...@gmail.com
* sendmsg.c (get_imp): Declare as static inline
aarch64_float_const_representable_p in aarch64.c.
Thanks,
Andrew Pinski
ChangeLog:
* gcc.c-torture/execute/20141125-1.c: New testcase.
Index: testsuite/gcc.c-torture/execute/20141125-1.c
===
--- testsuite/gcc.c-torture/execute/20141125-1.c(revision 0
type_in_anonymous_namespace_p (const_tree);
+extern bool expressions_equal_p (const_tree e1, const_tree e2);
extern bool block_may_fallthru (const_tree);
extern void using_eh_for_cleanups (void);
extern bool using_eh_for_cleanups_p (void);
Regards,
Zoran
From: Andrew Pinski [pins...@gmail.com]
Sent
bootstrapped and tested this on both aarch64-linux-gnu and
x86_64-linux-gnu with no regression on either.
Thanks,
Andrew Pinski
ChangeLog:
* lra.c (lra_substitute_pseudo): Use gen_lowpart_if_possible
instead of gen_rtx_SUBREG/gen_lowpart_SUBREG.
testsuite/ChangeLog
On Wed, Nov 26, 2014 at 2:00 PM, Andrew Pinski pins...@gmail.com wrote:
Hi,
The problem here is lra_substitute_pseudo calls gen_rtx_SUBREG with
a VOIDmode (const_int) argument but really it should not be calling
gen_rtx_SUBREG directly instead it should be using
gen_lowpart_if_possible
it is an RTX_OBJ rather than
RTX_COMM_ARITH or RTX_BIN_ARITH?
I am testing the patch for that to fix the above issue. It shows up
with the testcase Jiong added but only with -mabi=ilp32 enabled.
Thanks,
Andrew Pinski
Sorry for that. Can you (re) send your current patch for this for review?
Jeff
On Tue, Oct 7, 2014 at 11:43 PM, Thomas Preud'homme
thomas.preudho...@arm.com wrote:
From: Jakub Jelinek [mailto:ja...@redhat.com]
Sent: Wednesday, October 08, 2014 2:39 PM
Doesn't it turn 16-bit {L,R}ROTATE_EXPR used alone into
__builtin_bswap16?
For those the question is if the canonical
On Thu, Oct 9, 2014 at 12:05 AM, Michael Collison
michael.colli...@linaro.org wrote:
The CLZ_DEFINED_VALUE_AT_ZERO macro is harded to return 32. For the vector
intrinsic vclz this is incorrect and should return the value eight. The
CTZ_DEFINED_VALUE_AT_ZERO has the same issue.
Do you have a
describing what the function does.
Thanks,
Andrew Pinski
Thanks,
Kyrill
2014-10-10 Kyrylo Tkachovkyrylo.tkac...@arm.com
Ramana Radhakrishnanramana.radhakrish...@arm.com
* config/aarch64/aarch64.h (FINAL_PRESCAN_INSN): Define.
(ADJUST_INSN_LENGTH): Define.
* config
On Sat, Oct 11, 2014 at 9:42 AM, Kwok Cheung Yeung k...@codesourcery.com
wrote:
__gthread_active_p() in libgcc checks for thread support by looking for the
presence of a symbol from libpthread. With glibc, it looks for
__pthread_key_create. However, it determines that glibc is being used by
On Fri, Aug 8, 2014 at 8:51 PM, Andrew Pinski apin...@cavium.com wrote:
OK? When the second patch is approved?
Ping?
Thanks,
Andrew Pinski
ChangeLog:
Revert:
2011-08-19 H.J. Lu hongjiu...@intel.com
PR middle-end/49721
* explow.c
On Fri, Aug 8, 2014 at 8:51 PM, Andrew Pinski apin...@cavium.com wrote:
This patch fixes the original problem that HJL was having with x32 in
PR 47727, it is more constraint than HJL's patch only care about what
is happening inside a CONST; if we allow it for other cases,
the RTL
On Wed, Oct 15, 2014 at 10:29 AM, Jeff Law l...@redhat.com wrote:
On 10/13/14 16:35, Andrew Pinski wrote:
On Fri, Aug 8, 2014 at 8:51 PM, Andrew Pinski apin...@cavium.com wrote:
OK? When the second patch is approved?
Ping?
Thanks,
Andrew Pinski
ChangeLog:
Revert
;
};
ix86_set_move_mem_attrs_1 (rtx x, rtx dstref)
{
((x)-volatil) = ((dstref)-volatil);
((x)-in_struct) = ((dstref)-in_struct);
((x)-frame_related) = ((dstref)-frame_related);
((x)-unchanging) = ((dstref)-unchanging);
}
--- CUT ---
Thanks,
Andrew Pinski
Regards,
Zoran Jovanovic
++) {
z[i] = x[i] + scalar*y[i];
}
}
This looks like a scheduling issue rather than anything else. The
scheduler for a57 is not complete and does not model some things like
the fusion of the compares and branch which is most likely what you
are seeing.
Thanks,
Andrew Pinski
$ diff -u
On Wed, Oct 15, 2014 at 3:08 AM, Marek Polacek pola...@redhat.com wrote:
On Tue, Oct 14, 2014 at 09:23:29AM +0200, Marek Polacek wrote:
The consensus seems to be to go forward with this change. I will
commit the patch in 24 hours unless I hear objections.
I made the change. Please report
On Thu, Oct 16, 2014 at 3:35 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, Oct 15, 2014 at 3:08 AM, Marek Polacek pola...@redhat.com wrote:
On Tue, Oct 14, 2014 at 09:23:29AM +0200, Marek Polacek wrote:
The consensus seems to be to go forward with this change. I will
commit the patch
On Mon, Oct 20, 2014 at 10:46 AM, Sriraman Tallam tmsri...@google.com wrote:
On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David Li davi...@google.com
wrote:
Why removing the tree_code check?
The actual problem happens because STRING_CSTs (end up in .lrodata)
are not set a far address as they
-tables.h.
OK? Built and tested for aarch64-elf.
Thanks,
Andrew Pinski
PS The corresponding binutils patch is located at
https://sourceware.org/ml/binutils/2014-10/msg00170.html .
ChangeLog:
* doc/invoke.texi (AARCH64/mtune): Document thunderx as an available
option also.
* config/aarch64/aarch64
On Tue, Apr 1, 2014 at 3:24 PM, Richard Henderson r...@redhat.com wrote:
Comments? If approved, should this go in for 4.9, or wait for stage1?
Certainly it's self-contained...
On Cavium's thunder processor the cache line size is going to be
bigger than 64 bytes, what is your solution to
-gnu. OK to install?
AARCH64 ran into something similar and we did a similar patch though
rejecting only mems which are invalid:
http://gcc.gnu.org/ml/gcc-patches/2012-12/msg00765.html
(http://gcc.gnu.org/ml/gcc-patches/2013-01/msg01128.html)
Thanks,
Andrew Pinski
Thanks,
Richard
gcc
-lang.h:lang_type instead).
That was not talking about. I was talking about DECL_LANG_FLAG_*
which is already there for your usage.
You should be able to use DECL_LANG_FLAG_2 as it is unused for both C
and C++ for PARM_DECLs. This should also reduce the size of the patch
too.
Thanks,
Andrew Pinski
On Sun, Apr 27, 2014 at 1:25 PM, Prathamesh Kulkarni
bilbotheelffri...@gmail.com wrote:
On Mon, Apr 28, 2014 at 1:31 AM, Andrew Pinski pins...@gmail.com wrote:
On Sun, Apr 27, 2014 at 12:50 PM, Prathamesh Kulkarni
bilbotheelffri...@gmail.com wrote:
On Sun, Apr 27, 2014 at 11:22 PM, pins
has the master version of
longlong.h. But it looks like it does not have the code below at all.
Thanks,
Andrew Pinski
My change is to check __mips16 with defined (__mips16) instead of
just __mips16 so that we don't get a warning when compiling with
-Wundef (like glibc is now doing).
Ok
for the overflow.
Thanks,
Andrew Pinski
We keep the standard pattern name around for the benefit of
auto-vectorization.
Tested on aarch64-none-elf with no issues.
This will also be a bug on 4.9 (ugh), OK for trunk and gcc-4_9-branch?
Thanks,
James
---
2014-05-02 James Greenhalgh
that the option only applies to C/C++ code in the
documentation.
Thanks,
Andrew Pinski
Regards,
Andrei Herman
Mentor Graphics Corporation
Israel branch
-Original Message-
From: Mike Stump [mailto:mikest...@comcast.net]
Sent: Wednesday, May 07, 2014 7:00 PM
To: Herman, Andrei
Cc: gcc
at runtime.
(Not necessarily supported by all subtargets.)
I also think s is incorrect for aarch64. There is no simulator in gdb.
Thanks,
Andrew Pinski
R.
uint64_t *d)
{
union a e;
e.b = *d;
*r = e.c[1];
}
Thanks,
Andrew Pinski
On Sat, May 10, 2014 at 3:53 PM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
in my recent phiopt patch enhancing value_replacement to optimize
x!=0?x+y:y, I forgot to check that there is no other PHI (not sure how I
managed to miss that since I copy-pasted the line just below the test).
can
then be included. This will reduce the overall messy #if's all of the
code and help to add new targets.
Thanks,
Andrew Pinski
Expected ChangeLog entries:
=== gcc/testsuite/ChangeLog
2014-05-XX Kostya Serebryany k...@google.com
* c-c++-common/tsan/mutexset1.c
extra.
Thanks,
Andrew Pinski
patches.
Thanks,
Andrew Pinski
--kcc
On Wed, May 14, 2014 at 2:31 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, May 13, 2014 at 2:02 AM, Konstantin Serebryany
konstantin.s.serebry...@gmail.com wrote:
New patch attached.
It is based on r208674 which enables LeakSanitizer
(https
trying to say if we don't load from
x[3] then we can't do it. But with the example above we can.
Thanks,
Andrew Pinski
Thanks,
Andrew
Richard.
Richard.
Thanks,
Andrew
Thanks and sorry again for the delay.
Otherwise the patch looks good to me.
Richard.
Best regards,
Thomas
.
(TARGET_SHIFT_TRUNCATION_MASK) : Define.
No you are not defining TARGET_SHIFT_TRUNCATION_MASK, remove it from
the changelog.
Thanks,
Andrew Pinski
at
the end of the file.
Thanks,
Andrew Pinski
I don't own them but I doubt any of them is copyrightable. Perhaps they are
available in the old Apple branches that the FSF has control of.
Regards,
Pedro.
On Wed, May 21, 2014 at 7:58 PM, Andrew Pinski pins...@gmail.com wrote:
On Wed, May 21, 2014 at 7:50 PM, Pedro Giffuni giffu...@tutopia.com wrote:
Hello;
FWIW, I have been looking at some changes from Apple's GCC and these two
small changes should be interesting to have in the official gcc
On Thu, Feb 27, 2014 at 7:57 AM, Yufeng Zhang yufeng.zh...@arm.com wrote:
On 02/26/14 02:25, Andrew Pinski wrote:
Hi,
This is the final patch which adds support for the dynamic linker and
multi-lib directories for ILP32. I did not change multi-arch support as
I did not know what
if there is no
declaration as libiberty support is already there. That should be a
simple fix.
Thanks,
Andrew Pinski
libgfortran/configure defines HAVE_STRNLEN on targets supporting it.
The same revision also breaks the test g++.dg/tls/diag-1.C
/opt/gcc/work/gcc/testsuite/g++.dg/tls/diag-1.C
issue (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61315).
Since my PR has been closed twice by Andrew Pinski (“it’s clang’s fault, bouh
ouh”), I’d ask the maintainers to step in. Can we please provide a GCC that
works for the default darwin setup? Or at least drop darwin as secondary
. This was caused by using x instead of w in the
assembly template.
I committed the patch for both of these issues after a build and test
on aarch64-linux-gnu with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
* config/aarch64/aarch64.md (stack_protect_set_mode):
Use w for the register
taste.
Thanks,
Andrew Pinski
Thanks,
James
---
2014-03-27 James Greenhalgh james.greenha...@arm.com
Philipp Tomsich philipp.toms...@theobroma-systems.com
* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
operators.
for rtx_costs was getting more complex
so I factored out the code for IF_THEN_ELSE
OK? Built and tested on aarch64-elf with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
(aarch64_rtx_costs): Use aarch64_if_then_else_costs.
testsuite
and incorrect unless you know the non
constant part of the addition is a pointer (which is not the case
here).
Thanks,
Andrew Pinski
What happens if you just return NULL instead of the assertion (good
idea
adding it!)?
Of course then you need to:
1) check the return values
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