Re: [PATCH] rs6000, Add new overloaded vector shift builtin int128, varients

Peter: On 7/23/24 2:26 PM, Peter Bergner wrote: On 7/19/24 3:04 PM, Carl Love wrote: diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 5af9bf920a2..2a18ee44526 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -878,9 +878,9

Re: [PATCH] rs6000, Add new overloaded vector shift builtin int128, varients

Segher: Thanks for the review, a few questions... On 7/24/24 10:03 AM, Segher Boessenkool wrote: Hi! So much manual stuff needed, sigh. On Fri, Jul 19, 2024 at 01:04:12PM -0700, Carl Love wrote: gcc/ChangeLog:     * config/rs6000/altivec.md (vsdb_): Change     define_insn iterator to

Re: [PATCH 1/2] rs6000, Remove __builtin_vec_set_v1ti,, __builtin_vec_set_v2df, __builtin_vec_set_v2di

Kewen: On 7/25/24 1:22 AM, Kewen.Lin wrote: - rs6000, Remove __builtin_vec_set_v1ti, __builtin_vec_set_v2df, __builtin_vec_set_v2di Remove the built-ins, use the default gimple gener

Re: [PATCH 1/2] rs6000, Remove __builtin_vec_set_v1ti,, __builtin_vec_set_v2df, __builtin_vec_set_v2di

Kewen: On 7/25/24 1:22 AM, Kewen.Lin wrote: on 2024/7/24 01:52, Carl Love wrote: GCC maintainers: This patch was previously posted.  Per the feedback, it is now the first of two patches to remove the set built-ins. This patch removes the __builtin_vec_set_v1ti, __builtin_vec_set_v2df and

Re: [PATCH 0/2] rs6000, remove vec and vsx set builtins

Kewen: On 7/25/24 1:21 AM, Kewen.Lin wrote: The patch, first patch in this series, to remove the __builtin_vec_set_v1ti, __builtin_vec_set_v2df, __builtin_vec_set_v2di was previously posted.  The feedback on the patch was that we could also remove set bif attribute.  Removal of the set bif at

Re: [PATCH 2/2] rs6000, remove built-ins __builtin_vsx_set_1ti, __builtin_vsx_set_2df, __builtin_vsx_set_2di

Kewen: On 7/25/24 1:24 AM, Kewen.Lin wrote: optimization the number of assembly generated for the two methods are similar.  With -O3 optimization, the assembly generated for the two approaches is identical for the 2DF and 2DI types.  The assembly for the C-code version of the 1Ti requres one

Re: [PATCH] rs6000, Add new overloaded vector shift builtin int128, varients

Kewen: On 7/25/24 1:21 AM, Kewen.Lin wrote: Hi Carl, Some minor comments are inlined on top of Segher's and Peter's comments. on 2024/7/20 04:04, Carl Love wrote: GCC developers: The following patch adds the int128 varients to the existing overloaded built-ins vec_sld, vec_sldb

Re: [PATCH] rs6000, Add new overloaded vector shift builtin int128, varients

Peter, Segher: On 7/23/24 2:26 PM, Peter Bergner wrote: On 7/19/24 3:04 PM, Carl Love wrote: diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 5af9bf920a2..2a18ee44526 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -878,9 +878,9

Re: [PATCH] rs6000, Add new overloaded vector shift builtin int128, varients

Segher: On 7/24/24 11:47 AM, Segher Boessenkool wrote: Hi! On Wed, Jul 24, 2024 at 11:38:11AM -0700, Carl Love wrote: On 7/24/24 10:03 AM, Segher Boessenkool wrote: So much manual stuff needed, sigh. On Fri, Jul 19, 2024 at 01:04:12PM -0700, Carl Love wrote: gcc/ChangeLog:     * config

[PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

GCC developers: Version 2, updated rs6000-overload.def to remove adding additonal internal names and to change XXSLDWI_Q to XXSLDWI_1TI per comments from Kewen.  Move new documentation statement for the PIVPR built-ins per comments from Kewen.  Updated dg-do-run directive and added comment ab

[PATCH] rs6000, document built-ins vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros

GCC maintainers: Per a report from a user, the existing vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros built-ins are not documented in the GCC documentation file. The following patch adds missing documentation for the vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros built-ins. Plea

[PATCH] rs6000, add comment to VEC_IC definition

GCC maintainers: This patch adds a comment to the VEC_IC definitions to clarify the V1TI "TARGET_POWER10" mode per the request by Segher in the feedback to patch "https://gcc.gnu.org/pipermail/gcc-patches/2024-July/658156.html";. https://gcc.gnu.org/pipermail/gcc-patches/2024-July/658156.html

Re: [PATCH] rs6000, add comment to VEC_IC definition

Kewen: On 7/29/24 3:21 AM, Kewen.Lin wrote: index 0d3e0a24e11..75d95ccfb47 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -26,7 +26,8 @@  ;; Vector int modes  (define_mode_iterator VEC_I [V16QI V8HI V4SI V2DI]) -;; Vector int modes for comparison, shift and rota

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

Peter, Kewen: Per Peter's request, I did the following testing on ltcd97-lp7 which is a Power 10 running in BE mode. On 7/29/24 8:47 AM, Peter Bergner wrote: Maybe the following will work? +/* { dg-do run { target power10_hw } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { d

Re: [PATCH] rs6000, document built-ins vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros

Kewen: On 7/31/24 2:12 AM, Kewen.Lin wrote: Hi Carl, on 2024/7/27 06:56, Carl Love wrote: GCC maintainers: Per a report from a user, the existing vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros built-ins are not documented in the GCC documentation file. The following patch adds

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

Kewen: On 7/29/24 3:21 AM, Kewen.Lin wrote: +@smallexample +@exdent vector signed __int128 vec_sld (vector signed __int128, +vector signed __int128, const unsigned int); +@exdent vector unsigned __int128 vec_sld (vector unsigned __int128, +vector unsigned __int128, const unsigned int); +@exden

[PATCH ver 3] rs6000, Add new overloaded vector shift builtin int128, variants

GCC developers: Version 3, updated the testcase dg-do link to dg-do compile.  Moved the new documentation again.  Retested on Power 10 LE and BE to verify the dg arguments disable the test on Power10BE but enable the test for Power10LE.  Reran the full regression testsuite.   There were no new

Re: [PATCH ver 3] rs6000, Add new overloaded vector shift builtin int128, variants

Kewen: On 8/4/24 11:13 PM, Kewen.Lin wrote: Hi Carl, on 2024/8/2 03:35, Carl Love wrote: GCC developers: Version 3, updated the testcase dg-do link to dg-do compile.  Moved the new documentation again.  Retested on Power 10 LE and BE to verify the dg arguments disable the test on Power10BE

Re: [PATCH] rs6000, document built-ins vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros

vec_test_lsbb_all_zeros both specify vector unsigned char, only. On Mon, Aug 5, 2024 at 1:15 AM Kewen.Lin wrote: on 2024/8/3 05:48, Peter Bergner wrote: > On 7/31/24 10:21 PM, Kewen.Lin wrote: >> on 2024/8/1 01:52, Carl Love wrote: >>> Yes, I noticed that the built-ins were def

[PATCH 0/4] rs6000, remove redundant built-ins and add more test cases

GCC maintainers: The following series of patches for PowerPC removes some built-ins that are covered by existing overloaded built-ins.  Additionally, there are patches to add missing testcases and documentation. The patch series has been tested on Power 10 LE and BE with no regressions. Pl

[PATCH 1/4] rs6000, add testcases to the overloaded vec_perm built-in

GCC maintainers: The following patch adds missing test cases for the overloaded vec_perm built-in.  It also fixes and issue with printing the 128-bit values in the DEBUG section that was noticed when adding the additional test cases. The patch has been tested on Power 10 LE and BE with no r

[PATCH 2/4] rs6000, remove built-ins __builtin_vsx_vperm_8hi and, __builtin_vsx_vperm_8hi_uns

GCC maintainers: The following patch removes two redundant built-ins __builtin_vsx_vperm_8hi and __builtin_vsx_vperm_8hi_uns.  The built-ins are covered by the overloaded vec_perm built-in. The patch has been tested on Power 10 LE and BE with no regressions. Please let me know if it is acc

[PATCH 3/4] rs6000, Remove redundant built-in __builtin_vsx_xvcvuxwdp

GCC maintainers: The patch removed the built-in __builtin_vsx_xvcvuxwdp as it is covered by the overloaded vec_doubleo built-in. The patch has been tested on Power 10 LE and BE with no regressions. Please let me know if it is acceptable for mainline.  Thanks.   Carl ---

[PATCH 4/4] rs6000, Add tests and documentation for vector, conversions between integer and float

 GCC maintainers: The following patch fixes errors in the definition of the __builtin_vsx_uns_floate_v2di, __builtin_vsx_uns_floato_v2di and __builtin_vsx_uns_float2_v2di built-ins.  The arguments should be unsigned but are listed as signed. Additionally, there are a number of test cases

Re: [PATCH] rs6000, document built-ins vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros

story of altivec.h to support both unsigned/sign char for vec_test_lsbb_all_ones, vec_test_lsbb_all_zeros And this might make life a little easier for users. On Tue, Aug 6, 2024 at 10:12 AM Carl Love wrote: Steve: Agreed the documentation only specifies unsigned char argument for

[PATCH 0/13] rs6000, built-in cleanup patch series

GCC maintainers: The following patch series removes duplicate built-ins. There are patches to extend an existing overloaded built-in to cover additional input types. The final patch removes built-ins to set and initialize vectors. The code generated by these built-ins with the default optimi

[PATCH 1/13] rs6000, Remove __builtin_vsx_cmple* builtins

rs6000, Remove __builtin_vsx_cmple* builtins The built-ins __builtin_vsx_cmple_u16qi, __builtin_vsx_cmple_u2di, __builtin_vsx_cmple_u4si and __builtin_vsx_cmple_u8hi should take unsigned arguments and return an unsigned result. The current definitions take signed arguments and return signed res

[PATCH 2/13] rs6000, Remove __builtin_vsx_xvcvspsxws built-in

rs6000, Remove __builtin_vsx_xvcvspsxws built-in The built-in __builtin_vsx_xvcvspsxws is a duplicate of the vec_signed built-in that is documented in the PVIPR. The __builtin_vsx_xvcvspsxws built-in is not documented and there are no test cases for it. This patch removes the redundant built-in.

[PATCH 6/13] rs6000, add overloaded vec_sel with int128 arguments

rs6000, add overloaded vec_sel with int128 arguments Extend the vec_sel built-in to take three signed/unsigned int128 arguments and return a signed/unsigned int128 result. Extending the vec_sel built-in makes the existing buit-ins __builtin_vsx_xxsel_1ti and __builtin_vsx_xxsel_1ti_uns obsolete.

[PATCH 3/13] rs6000, fix error in unsigned vector float to unsigned int built-in definitions

rs6000, fix error in unsigned vector float to unsigned int built-in definitions The built-ins __builtin_vsx_vunsigned_v2df and__builtin_vsx_vunsigned_v4sf are supposed to take a vector of floats and return a vector of unsigned long long ints. The definitions are using the signed version of the i

[PATCH 9/13] rs6000, remove __builtin_vsx_xvnegdp and __builtin_vsx_xvnegsp built-ins

rs6000, remove __builtin_vsx_xvnegdp and __builtin_vsx_xvnegsp built-ins The undocumented __builtin_vsx_xvnegdp and __builtin_vsx_xvnegsp are redundant. The overloaded vec_neg built-in provides the same functionality. The two buit-ins are not documented nor are there any test cases for them. Re

[PATCH 10/13] rs6000, extend vec_xxpermdi built-in for __int128 args

rs6000, extend vec_xxpermdi built-in for __int128 args Add a new overloaded instance for vec_xxpermdi __int128 vec_xxpermdi (__int128, __int128, const int); Update the documentation to include a reference to the new built-in instance. gcc/ChangeLog: * config/rs6000/rs6000-builtins.de

[PATCH 4/13] rs6000, extend the current vec_{un,}signed{e,o} built-ins

rs6000, extend the current vec_{un,}signed{e,o} built-ins The built-ins __builtin_vsx_xvcvspsxds and __builtin_vsx_xvcvspuxds convert a vector of floats to signed/unsigned long long ints. Extend the existing vec_{un,}signed{e,o} built-ins to handle the argument vector of floats to return the even

[PATCH 5/13] rs6000, remove duplicated built-ins of vecmergl and vec_mergeh

rs6000, remove duplicated built-ins of vecmergl and vec_mergeh The following undocumented built-ins are same as existing documented overloaded builtins. const vf __builtin_vsx_xxmrghw (vf, vf); same as vf __builtin_vec_mergeh (vf, vf); (overloaded vec_mergeh) const vsi __builtin_vsx_xx

[PATCH 11/13] rs6000, remove __builtin_vsx_xvcmpeqsp_p built-in

rs6000, remove __builtin_vsx_xvcmpeqsp_p built-in The built-in __builtin_vsx_xvcmpeqsp_p is a duplicate of the overloaded __builtin_altivec_vcmpeqfp_p built-in. The built-in is undocumented and there are no test cases for it. The patch removes built-in __builtin_vsx_xvcmpeqsp_p. gcc/ChangeLog:

[PATCH 7/13] rs6000, remove the vec_xxsel built-ins, they are duplicates

rs6000, remove the vec_xxsel built-ins, they are duplicates The following undocumented built-ins are covered by the existing overloaded vec_sel built-in definitions. const vsc __builtin_vsx_xxsel_16qi (vsc, vsc, vsc); same as vsc __builtin_vec_sel (vsc, vsc, vuc); (overloaded vec_sel) const

[PATCH 8/13] rs6000, remove __builtin_vsx_vperm_* built-ins

rs6000, remove __builtin_vsx_vperm_* built-ins The undocumented built-ins: __builtin_vsx_vperm_16qi_uns, __builtin_vsx_vperm_1ti, __builtin_vsx_vperm_1ti_uns, __builtin_vsx_vperm_2df, __builtin_vsx_vperm_2di, __builtin_vsx_vperm_2di_uns, __builtin_vsx_vperm_4sf, __builtin_vsx_vperm

[PATCH 12/13] rs6000, remove __builtin_vsx_xvcmpeqsp built-in

rs6000, remove __builtin_vsx_xvcmpeqsp built-in The built-in __builtin_vsx_xvcmpeqsp is a duplicate of the overloaded vec_cmpeq built-in. The built-in is undocumented. The built-in and the test cases are removed. gcc/ChangeLog: * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcmpeqs

[PATCH 13/13] rs6000, remove vector set and vector init built-ins.

rs6000, remove vector set and vector init built-ins. The vector init built-ins: __builtin_vec_init_v16qi, __builtin_vec_init_v8hi, __builtin_vec_init_v4si, __builtin_vec_init_v4sf, __builtin_vec_init_v2di, __builtin_vec_init_v2df, __builtin_vec_set_v1ti perform the same operation as init

[PING} Re: [PATCH 0/13] rs6000, built-in cleanup patch series

Ping, just wondering if anyone has had a chance to look at the patch series. Thanks. Carl On 4/19/24 14:04, Carl Love wrote: > GCC maintainers: > > The following patch series removes duplicate built-ins. There are patches to > extend an existin

[PATCH] PPC64 builtin vec_rlnm() argument order is wrong

file. If someone can verify the issue and the fix, it would be appreciated. Please update the bugzilla with any feedback on the issue. Thanks. Carl Love - vec_rlnm fix to make builtin work according to ABI --- gcc/config/rs6000

[PATCH,rs6000] Fix documentation for __builtin_crypto_vpmsum* builtin functions.

. Carl Love --- PPC64, fix documentation for __builtin_crypto_vpmsum* builtin functions. PR target/91276 - Doc typos in __builtin_crypto_vpmsum* gcc/ChangeLog: 2020-02-24 Carl Love PR target/91276 * doc

[PATCH,rs6000] Fix -mlong-double documentation

GCC maintianers: The following patch improves the description of the ppc64 -mlong-double option. I compiled it and tested it by hand with the command: gcc --target-help Please let me know if the patch is OK for mainline. Thanks. Carl Love

[PATCH,rs6000] Add builtins for accessing the FPSCR

ed on  powerpc64le-unknown-linux-gnu (Power 8 LE)      powerpc64le-unknown-linux-gnu (Power 9 LE) With no regressions. Please let me know if the patch looks OK for trunk.  Carl Love - gcc/ChangeLog: 2018-08-16 Carl

Re: [PATCH,rs6000] Add builtins for accessing the FPSCR

this change to the doc/extend.texi file. Carl Love --- gcc/ChangeLog: 2018-08-17 Carl Love * config/rs6000/rs6000-builtin.def: Add definitions for __builtin_mffsl, __builtin_mtfsb0, __buil

Re: [PATCH v4, rs6000] gcc mainline, add builtin support for vec_float, vec_float2, vec_floate, vec_floate, builtins

(Power 8 LE) only. Please let me know if there are any additional issues that need fixing. Thanks. Carl Love gcc/ChangeLog: 2017-06-16 Carl Love * config/rs6000/rs6000-c.c (altivec_overloaded_builtins[]): Add

[PATCH, rs6000] Fix vec_mulo and vec_mule instruction generation

-linux-gnu (Power 8 LE) Is the patch OK for gcc mainline? Carl Love - >From 3127a3f9c8480fde428c4a13bc37d6eaefd0edfe Mon Sep 17 00:00:00 2001 From: Carl Love Date: Fri, 16 Jun 2017 16:10:56 -0500 Subject: [PATCH] vec_mule, vec_mulo

[PATCH rs6000] Fix for commit 249311

ing things. Carl Love gcc/ChangeLog: 2017-06-16 Carl Love * config/rs6000/altivec.md (define_mode_attr VF_sxddp): Move to vsx.md. * config/rs6000/vsx.md (define_mode_attr VF_sxddp define_expa

[PATCH, rs6000] Add vec_reve support

GCC maintainers: This patch adds support for the various vec_reve builtins. The patch has been tested on powerpc64le-unknown-linux-gnu (Power 8 LE) and on powerpc64-unknown-linux-gnu (Power 8 BE) with no regressions. Is the patch OK for gcc mainline? Carl Love

Re: [PATCH v2, rs6000] Add vec_reve support

some additional changes to the test case builtins-3-vec_reve-runnable.c for debugging purposes. These changes make it easy to turn on/off debugging. Please let me know if the revised patch OK for gcc mainline? Carl Love ---

[PATCH, rs6000] Fix for vec_mulo and vec_mule test case

y for the omission in the previous patch. I have tested the following fix on powerpc64le-unknown-linux-gnu (Power 8 LE), powerpc64-unknown-linux-gnu(Power 8 BE), powerpc64-unknown-linux-gnu (Power 7). Is the fix OK for gcc mainline? Carl

[PATCH v3, rs6000] Add vec_reve support

), powerpc64-unknown-linux-gnu (Power 7). Please let me know if you see anything else that needs fixing. Thanks. Carl Love gcc/ChangeLog: 2017-06-23 Carl Love * config/rs6000/rs6000-c.c: Add support for

[PATCH, rs6000] Signed builtin support

? Carl Love -- gcc/ChangeLog: 2017-06-28 Carl Love * config/rs6000/rs6000-c.c: Add support for built-in functions vector signed int vec_signed (vector float); vector signed long long vec_signed (vector

[PATCH, rs6000] builtins-3-vec_reve-runnable fix minimum platform

). Bill Schmidt said that the minimum platform that the builtins need to be supported on is Power 7. The following patch sets the minimum platform as Power 7. Please let me know if the following patch is acceptable. Thanks. Carl Love

[PATCH, rs6000] Add additional support for vec_subc, vec_sube, vec_subec builtins.

). Please let me know if the following patch is acceptable. Thanks. Carl Love - gcc/ChangeLog: 2017-06-29 Carl Love * config/rs6000/rs6000-c.c: Add support for built-in functions. vector signed int

[PATCH, rs6000] Add __builtin_altivec_vsumsws

regressions. Please let me know if the following patch is acceptable. Thanks. Carl Love -- gcc/ChangeLog: 2017-11-08 Carl Love * config/rs6000/rs6000-c.c (ALTIVEC_BUILTIN_VEC_SUMS): Add

[PATCH, rs6000 V4] Fixes for commit 254464

acceptable. Thanks. Carl Love - gcc/ChangeLog: 2017-11-09 Carl Love * config/rs6000/rs6000.c (swap_endian_selector_for_mode): Remove le_ and be_ prefixes to swap* variables. Remove if (VECTOR_ELT_ORDER_BIG

[PATCH, rs6000 V2] Add Power 9 support for vec_first builtins

- gcc/ChangeLog: 2017-11-07 Carl Love * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add support for builtins: unsigned int vec_first_{,miss}_match_{,or_eos}index ( vector {un,}signed {char,int,short}, vector {un,}signed {char,int,short}) arguments

[PATCH, rs6000] Add missing builtin functionality and tests

) powerpc64le-unknown-linux-gnu (Power 9 LE) without regressions. Please let me know if the following patch is acceptable. Thanks. Carl Love - gcc/ChangeLog: 2017-12-07 Carl Love * config

[PATCH, rs6000] Add additional builtin tests

(Power 9 LE) without regressions. Please let me know if the following patch is acceptable. Thanks. Carl Love --- gcc/testsuite/ChangeLog: 2017-12-07 Carl Love * gcc.target/powerpc

[PATCH, rs6000] Add vec_mergee, vec_mergeo, vec_float2 builtin support

-unknown-linux-gnu (Power 8 BE) powerpc64le-unknown-linux-gnu (Power 9 LE) without regressions. Please let me know if the following patch is acceptable. Thanks. Carl Love gcc/ChangeLog

Re: [PATCH , rs6000] Add missing builtin test cases, fix arguments to match specifications.

ux-gnu (Power 8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.      Carl Love --- gcc/testsuite/ChangeLog: 2018-05-29 Carl Love * gcc.target/powerpc/altivec-1

Re: [PATCH , rs6000] Add builtin tests for vec_madds, vec_extract_fp32_from_shortl and vec_extract_fp32_from_shorth, vec_xst_be

8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.  Carl Love -- gcc/testsuite/ChangeLog: 2018-05-29  Carl Love   * gcc.target/powerpc/altivec-35.c (foo): Add bu

[PATCH,rs6000] Fix vec_permxor builtin support, fix test cases for vec_permxor and vec_insert4b

builtin. The patch was retested on: powerpc64le-unknown-linux-gnu (Power 8 LE)    powerpc64le-unknown-linux-gnu (Power 9 LE) powerpc64-unknown-linux-gnu (Power 8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.  Carl Love

Re: [PATCH,rs6000] Fix vec_permxor builtin support, fix test cases for vec_permxor and vec_insert4b

vector signed char, vector signed char, vector signed char); vector unsigned char vec_permxor (vector unsigned char, vector unsigned char, vector unsigned char); If so, we only want the changes to vec_insert4b in builtins-7-p9-runnable.c. I will re-spin the patch. Thanks.

[PATCH, rs6000] Add BE support for first_match_index, first_match_or_eos_index, first_mismatch_index, first_mismatch_or_eos_index

a Power 8 BE system and then the generated binary file was examined via objdump to see that the desired instruction was generated. Please let me know if the patch looks OK for GCC mainline.  Carl Love

Re: [PATCH,rs6000] Fix vec_permxor builtin support, fix test cases for vec_permxor and vec_insert4b

tch leaving just the changes to file gcc/testsuite/gcc.target/powerpc/builtins-7-p9-runnable.c. The patch was retested on: powerpc64le-unknown-linux-gnu (Power 8 LE)    powerpc64le-unknown-linux-gnu (Power 9 LE) powerpc64-unknown-linux-gnu (Power 8

[PATCH, rs6000] Split up builtins-3.c tests

e know if the patch looks OK for GCC mainline.  Carl Love ----- gcc/testsuite/ChangeLog: 2018-06-05 Carl Love * gcc.target/powerpc/builtins-3.c: Move tests requiring -mvsx to builtins-4.c. * gcc.target/

Re: [PATCH, rs6000] Add BE support for first_match_index, first_match_or_eos_index, first_mismatch_index, first_mismatch_or_eos_index

shrsi3 change. I will commit with this change. FYI, Bill would like to patch backported to GCC 8. Is that OK? Carl Love

Re: [PATCH, rs6000] Add BE support for first_match_index, first_match_or_eos_index, first_mismatch_index, first_mismatch_or_eos_index

; > > > Looks great, please apply to trunk.  Thanks! > > > > Yes, the builtin works with lshrsi3 change.  I will commit with > > this > > change. > > It occurs in four places, please fix all then. Yup, I already got all four of them. :-) Carl Love

[PATCH, rs6000] Add missing test cases, fix arguments to match specifications.

-unknown-linux-gnu (Power 8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.  Carl Love - gcc/testsuite/ChangeLog: 2018-06-06 Carl Love * gcc.target/powerpc

[PATCH, rs6000] Add BE support to builtin vec_extract_fp32_from_shorth, vec_extract_fp32_from_shortl

back porting to GCC 8 as well.  Carl Love - gcc/ChangeLog: 2018-05-31 Carl Love * gcc/config/rs6000/vsx.md (vextract_fp_from_shorth vextract_fp_from_shortl): Add BE support. gcc

[PATCH, rs6000] Cleanup vsx-vector-6 test files.

was retested on: powerpc64le-unknown-linux-gnu (Power 8 LE)    powerpc64le-unknown-linux-gnu (Power 9 LE) powerpc64-unknown-linux-gnu (Power 8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.  Carl Love

Re: [PATCH, rs6000] Add missing test cases, fix arguments to match specifications.

ly need to add the support to GCC to extract the double element. Based on a quick look at the code, that is not trivial. So, I have dropped the changes to file p9-extract-1.c from the patch. The updated patch is given below. Please let me know if this revised patch is OK for mainline.

[PATCH] Fix altivec-7 issues on Power 6

. Please let me know if the patch looks OK for GCC mainline.   Carl Love ----- gcc/testsuite/ChangeLog: 2018-06-08 Carl Love * gcc.target/powerpc/altivec-7.c (main): Remove tests vec_unpackh(vecubi[

Re: [PATCH] Fix altivec-7 issues on Power 6

GCC maintainers: Aargh!! I attached an old copy of the patch to the original message. Guess it is time to do some house cleaning. Carl Love --- gcc/testsuite/ChangeLog: 2018-06-08 Carl Love * gcc.target/powerpc/altivec-7.c (main

[PATCH, rs6000] Fix AIX expected builtin instruction counts

OK for GCC mainline.   Carl Love -- gcc/testsuite/ChangeLog: 2018-06-12 Carl Love * gcc.target/powerpc/altivec-7.c: Add qualifiers for counts on AIX versus Linux. * gcc.target

Re: [PATCH, rs6000] Fix AIX expected builtin instruction counts

)     AIX 7200-00-01-1543 (Power 8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.   Carl Love gcc/testsuite/ChangeLog: 2018-06-18 Carl Love * gcc.target/powerpc

Re: [PATCH, rs6000] Fix AIX expected builtin instruction counts

Segher: I believe I have addressed all of your concerns with the patch. I have retested it and it looks good. Please let me know if the patch looks OK for GCC mainline.   Carl Love >F

[PATCH, rs6000] Change word selector to prefered location for vec_insert builtin

(offset 0 bytes) instead of word 1. The values are the same so there is no functional change. But it was decided that using word 0 was preferred choice. Carl Love - gcc/ChangeLog: 2018-06-19 Carl Love * config/rs6000

[PATCH, rs6000] Add vec_extract builtin tests, fix arguments on existing tests

regressions. Please let me know if the patch looks OK for GCC mainline.   Carl Love gcc/testsuite/ChangeLog: 2018-06-21 Carl Love * gcc.target/powerpc/p9-extract-1.c: Make second argument of

[PATCH, rs6000] Fix AIX test case failures

for GCC mainline.   Carl Love -- gcc/testsuite/ChangeLog: 2018-06-22 Carl Love * gcc.target/powerpc/divkc3-2.c: Make check Linux and AIX specific. * gcc.target/powerpc/divkc3-3.c: Make

Re: [PATCH, rs6000] Fix AIX test case failures

On Mon, 2018-06-25 at 04:44 -0500, Segher Boessenkool wrote: > Hi Carl, > > On Fri, Jun 22, 2018 at 02:55:44PM -0700, Carl Love wrote: > > --- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c > > +++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c > > @@ -13,4 +13,5 @@

[PATCH, rs6000] Add missing builtin test cases

.   Please let me know if the following patch is acceptable.  Thanks.   Carl Love - gcc/testsuite/ChangeLog: 2018-06-27 Carl Love * gcc.target/p9-extract-1.c: Add test case. * gcc.target/builtins-3-p9

[PATCH,rs6000] Fix implementation of vec_unpackh, vec_unpackl builtins

patch also needs to be backported to GCC 8.  Carl Love -- gcc/ChangeLog: 2018-06-29 Carl Love * config/rs6000/altivec.md: Add define_expand altivec_unpackh_v4sf, and define_expand

Re: [PATCH,rs6000] Fix implementation of vec_unpackh, vec_unpackl builtins

#x27;s all I see; will leave to Segher to approve, of course.  Ah, yes. Fixed. Carl Love

[PATCH, rs6000] Bug fixes for the Power 9 stxvl and lxvl instructions.

. Carl Love --- gcc/ChangeLog: 2018-01-16 Carl Love * config/rs6000/vsx.md (define_expand xl_len_r, define_expand stxvl, define_expand *stxvl): Add match_dup argument. gcc/testsuite

[PATCH, rs6000] Add 128-bit support for vec_xl(), vec_xl_be(), vec_xst(), vec_xst_be() builtins.

know if you want to include it in stage 4 or wait for the next release. Thanks. Carl Love gcc/ChangeLog: 2018-01-18 Carl Love * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI

Re: [PATCH, rs6000] Add 128-bit support for vec_xl(), vec_xl_be(), vec_xst(), vec_xst_be() builtins.

On Fri, 2018-01-19 at 10:13 -0600, Segher Boessenkool wrote: > On Thu, Jan 18, 2018 at 04:51:47PM -0600, Segher Boessenkool wrote: > > > +(define_insn "vsx_ld_elemrev_v1ti" > > > +  [(set (match_operand:V1TI 0 "vsx_register_operand" "=wa") > > > +(vec_select:V1TI > > > +   (match_operand:V1

Re: [PATCH, rs6000] Add 128-bit support for vec_xl(), vec_xl_be(), vec_xst(), vec_xst_be() builtins.

On Fri, 2018-01-19 at 10:13 -0600, Segher Boessenkool wrote: > On Thu, Jan 18, 2018 at 04:51:47PM -0600, Segher Boessenkool wrote: > > > +(define_insn "vsx_ld_elemrev_v1ti" > > > +  [(set (match_operand:V1TI 0 "vsx_register_operand" "=wa") > > > +(vec_select:V1TI > > > +   (match_operand:V1

Re: [PATCH, rs6000] Add 128-bit support for vec_xl(), vec_xl_be(), vec_xst(), vec_xst_be() builtins.

will get committed. Carl Love gcc/ChangeLog: 2018-01-22 Carl Love * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI, LVX_V1TI): Add macro expansion

[PATCH, rs6000] Fix typo in documentation file.

testing done. Please let me know if the patch is acceptable to apply to mainline. Carl Love ___ Index: gcc/doc/extend.texi === --- gcc/doc/extend.texi

[PATCH, rs6000] Add builtin support for vec_insert4b, vec_extract4b

me know if you want to include it in stage 4 or wait for the next release.  Thanks.    Carl Love -- gcc/ChangeLog: 2018-01-31 Carl Love * config/rs6000/altivec.h: Change vec_vextract4b to vec

[PATCH rs6000] Fix for builtins-4-runnable.c testcase FAIL on power7/BE 32-bit

e and restricted to run only when int128 type is supported. The patch passes the regression testing on Power 8 BE enabled for 64- bit and 32-bit modes. Additionally, the patch passes regression testing on Power 8 LE. Let me know if the patch looks OK or not.  Carl Love

Re: [PATCH rs6000] Fix for builtins-4-runnable.c testcase FAIL on power7/BE 32-bit

e builtins-4-runnable.c was run similarly to verify it passed on both machines. Carl Love --- gcc/testsuite/ChangeLog: 2018-02-09 Carl Love <c...@us.ibm.com>

Re: [PATCH rs6000] Fix for builtins-4-runnable.c testcase FAIL on power7/BE 32-bit

On Mon, 2018-02-12 at 09:17 -0600, Segher Boessenkool wrote: > Hi Carl, > > On Fri, Feb 09, 2018 at 02:09:06PM -0800, Carl Love wrote: > > As pointed out, the dg arguments in new test file was missing the > > {target 128}.  I updated the arguments to be  > > > >

[PATCH rs6000] Fix for builtins-4-int128-runnable.c

="--target_board=unix'{-mcpu=power7}' powerpc.exp=builtins-4-int128-runnable.c"  to verify the test passes cleanly with the change in the dg directives. Please let me know if the patch is OK for trunk. Thanks.

[PATCH, rs6000] Add builtin support for vec_insert4b, vec_extract4b

he patch looks OK or not. Thanks. The patch should also be ported to GCC 7 so we are in compliance with the ABI. Carl Love --- gcc/ChangeLog: 2018-02-13 Carl Love * config/rs6000/a

[PATCH, rs6000] Remove non-ABI builtin support for vec_insert4b, vec_extract4b

been tested on:   powerpc64le-unknown-linux-gnu (Power 8 LE)   powerpc64le-unknown-linux-gnu (Power 9 LE) with no regressions. Let me know if the patch looks OK or not. Thanks. The patch should also be ported to GCC 7 so we are in compliance with the ABI.    Carl Love

[Patch, rs6000] Require Power 8 for vec_float2 builtin

ption to verify the issue is fixed. The testing was don on powerpc64le-unknown-linux-gnu (Power 8 LE) Please let me know if the patch looks OK or not. Thanks. Carl Love - gcc/ChangeLog: 2018-

<    1   2   3   4   5   >