Hi:
This patch is about to enable GCC support for SERIALIZE which would
be in GLC. There's only 1 instruction: SERIALIZE, more details please
refer to
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
I know it's
On Wed, Apr 1, 2020 at 3:32 PM Hongtao Liu wrote:
>
> Hi:
> This patch is about to enable GCC support for TSXLDTRK which would
> be in GLC. There's only 2 instructions: XRESLDTRK, XSUSLDTRK, more
> details please
> refer to
>
Hi:
This patch is about to enable GCC support for TSXLDTRK which would
be in GLC. There's only 2 instructions: XRESLDTRK, XSUSLDTRK, more
details please
refer to
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
I
Documents operand modifiers which are available in asm stmt but
missing in document.
| Modifier | Description | Available in asm stmt | Existed in documentation |
| --- | --- | --- | - |
| L,W,B,Q,S,T | print the opcode suffix for specified size of
operand. | Available | Not |
| C |
On Mon, May 4, 2020 at 12:58 AM Uros Bizjak wrote:
>
> The part above is OK, but you are missing support for
> __attribute__((__target__("..."))). Please see how for example -msgx
> is handled in isa2_opts in i386-options.c and in
> gcc.target/i386/funcspec-56.h test source.
>
> Please repost the
On Mon, May 4, 2020 at 1:17 AM Uros Bizjak wrote:
>
> On Wed, Apr 1, 2020 at 9:23 AM Hongtao Liu wrote:
> >
> > Hi:
> > This patch is about to enable GCC support for SERIALIZE which would
> > be in GLC. There's only 1 instruction: SERIALIZE, more details please
> > refer to
> >
Hi:
Test is ok for funcspec-5.c, funcspec-6.c.
gcc/testuite/ChangeLog
* gcc.target/i386/funcspec-56.inc: Add enqcmd, avx512bf16,
avx512vp2intersect.
gcc/testsuite/gcc.target/i386/funcspec-56.inc | 6 ++
1 file changed, 6 insertions(+)
diff --git
On Wed, May 20, 2020 at 11:43 PM Uros Bizjak wrote:
>
> On Wed, May 20, 2020 at 10:35 AM Hongtao Liu wrote:
> >
> > Hi:
> > Bootstrap is ok, regression test on i386/x86-64 backend is ok.
> >
> > gcc/ChangeLog:
> > PR target/92658
> > * config/i386/sse.md
> > (trunc2,
Hi:
This patch fix non-conforming expander for
floatv2div2sf2,floatunsv2div2sf2,fix_truncv2sfv2di,fixuns_truncv2sfv2di,
refer to PR95211, PR95256.
bootstrap ok, regression test on i386/x86-64 backend is ok.
gcc/ChangeLog:
PR target/95211 PR target/95256
* config/i386/sse.md
On Thu, May 21, 2020 at 7:18 PM Uros Bizjak wrote:
>
> On Thu, May 21, 2020 at 7:35 AM Hongtao Liu wrote:
> >
> > On Wed, May 20, 2020 at 11:43 PM Uros Bizjak wrote:
> > >
> > > On Wed, May 20, 2020 at 10:35 AM Hongtao Liu wrote:
> > > >
> > > > Hi:
> > > > Bootstrap is ok, regression test
On Fri, May 22, 2020 at 2:41 PM Uros Bizjak wrote:
>
> On Fri, May 22, 2020 at 6:55 AM Hongtao Liu wrote:
> >
> > On Thu, May 21, 2020 at 7:18 PM Uros Bizjak wrote:
> > >
> > > On Thu, May 21, 2020 at 7:35 AM Hongtao Liu wrote:
> > > >
> > > > On Wed, May 20, 2020 at 11:43 PM Uros Bizjak
On Sat, May 23, 2020 at 6:11 PM Uros Bizjak wrote:
>
> On Sat, May 23, 2020 at 9:25 AM Hongtao Liu wrote:
> >
> > Hi:
> > This patch fix non-conforming expander for
> > floatv2div2sf2,floatunsv2div2sf2,fix_truncv2sfv2di,fixuns_truncv2sfv2di,
> > refer to PR95211, PR95256.
> > bootstrap ok,
Bootstrap is ok, regression test on i386/x86-64 backend is ok.
gcc/ChangeLog
PR target/95125
* config/i386/sse.md (sf2dfmode_lower): New mode attribute.
(trunc2) New expander.
(extend2): Ditto.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr95125-avx.c: New
Hi:
Add define_peephole2 to eliminate potential redundant conversion
from mask to vector.
Bootstrap is ok, regression test is ok for i386/x86-64 backend.
Ok for trunk?
gcc/ChangeLog:
PR target/96891
* config/i386/sse.md (VI_128_256): New mode iterator.
On Mon, Aug 31, 2020 at 2:19 PM Hongtao Liu wrote:
>
> Hi:
> This patch is to adjust testcases which failed the regression test
> when gcc is built with -march=skylake-avx512.
> Also add runtime check for AVX512 tests.
>
> gcc/testsuite/ChangeLog:
> PR target/96246
> PR
ping ^2
On Wed, Aug 19, 2020 at 7:37 PM Hongtao Liu wrote:
>
> ping^1
>
> On Tue, Aug 11, 2020 at 5:43 PM Hongtao Liu wrote:
> >
> > Hi:
> > The issue is described in the bugzilla.
> > Bootstrap is ok, regression test for i386/x86-64 backend is ok.
> > Ok for trunk?
> >
> > ChangeLog
> >
Hi:
This patch is to adjust testcases which failed the regression test
when gcc is built with -march=skylake-avx512.
Also add runtime check for AVX512 tests.
gcc/testsuite/ChangeLog:
PR target/96246
PR target/96855
PR target/96856
PR target/96857
*
On Tue, Sep 1, 2020 at 6:11 PM Jakub Jelinek wrote:
>
> On Tue, Sep 01, 2020 at 05:55:18PM +0800, Hongtao Liu wrote:
> > I tried define_split, but there's too many of them(considering usage
> > of define_subst for mask).
> > Also for new added instructions which support embedded broadcast,
> >
On Thu, Aug 27, 2020 at 8:24 PM Jakub Jelinek wrote:
>
> On Thu, Jul 09, 2020 at 04:33:46PM +0800, Hongtao Liu via Gcc-patches wrote:
> > +static void
> > +replace_constant_pool_with_broadcast (rtx_insn* insn)
> > +{
> > + subrtx_ptr_iterator::array_type array;
&g
Hi:
We have "*load_tp_" in i386.md for load of thread pointer in
i386.md, so this patch merely adds the expander for
__builtin_thread_pointer.
Bootstrap is ok, regression test is ok for i386/x86-64 backend.
Ok for trunk?
gcc/ChangeLog:
PR target/96955
* config/i386/i386.md
On Mon, Aug 31, 2020 at 8:35 PM H.J. Lu via Gcc-patches
wrote:
>
> On Mon, Aug 31, 2020 at 12:25 AM Richard Biener wrote:
> >
> > On Sat, 29 Aug 2020, sunil.k.pandey wrote:
> >
> > > On Linux/x86_64,
> > >
> > > dccbf1e2a6e544f71b4a5795f0c79015db019fc3 is the first bad commit
> > > commit
Hi:
If -mavx implies -mxsave, then -mno-xsave should imply -mno-avx.
Current status is -mno-avx implies -mno-xsave which should be wrong.
Bootstrap is ok, Regression test is ok for i386/x86 backend.
Ok for trunk?
gcc/ChangeLog
* common/config/i386/i386-common.c
Hi:
Rtx cost of sse_to_integer would be used by pass_stv as a
measurement for the scalar-to-vector transformation. As
https://gcc.gnu.org/pipermail/gcc-patches/2019-August/528839.html
indicates, movement between sse regs and gprs should be much expensive
than movement inside gprs(which is 2 as
Hi:
This patch would avoid spill gprs to mask registers for non-AVX512
micro-architecture and fix regression in PR96744.
Bootstrap is ok, regression test for i386/x86-64 backend is ok.
No big performance impact on SPEC2017.
gcc/ChangeLog:
PR taregt/96744
*
On Mon, Sep 14, 2020 at 3:51 PM Richard Biener via Gcc-patches
wrote:
>
> On Fri, Sep 11, 2020 at 11:19 PM Nathan Sidwell wrote:
> >
> > I noticed a compiler warning about out-of-bound access. Fixed thusly.
> >
> > gcc/
> > * config/i386/sse.md (mov): Fix operand indices.
> >
On Wed, Sep 2, 2020 at 5:58 PM Jakub Jelinek wrote:
>
> On Wed, Sep 02, 2020 at 09:57:08AM +0800, Hongtao Liu via Gcc-patches wrote:
> > +
> > + first = XVECEXP (constant, 0, 0);
> > + /* There could be some rtx like
> > + (mem/u/c:
Hi:
Add define_peephole2 to perform optimization like bellow:
+/* Optimize for TARGET_AVX512F
+ vpsubusw op1, op2, dst1;
+ vxorps xmm, xmm, dst2; > vpcmpleuw op1, op2, dst3
+ vpcmpeqw dst1, dst2, dst3 */
and
+/* Optimize for target above TARGET_SSE4_1
+ vpsubusw op1, op2, dst1;
On Wed, Sep 9, 2020 at 2:35 PM Jakub Jelinek wrote:
>
> On Wed, Sep 09, 2020 at 10:30:46AM +0800, Hongtao Liu wrote:
> > From 400418fadce46e7db7bd37be45ef5ff5beb08d19 Mon Sep 17 00:00:00 2001
> > From: liuhongt
> > Date: Tue, 8 Sep 2020 15:44:58 +0800
> > Subject: [PATCH] Implement
On Tue, Sep 8, 2020 at 4:52 PM Jakub Jelinek wrote:
>
> On Tue, Sep 08, 2020 at 04:14:52PM +0800, Hongtao Liu wrote:
> > Hi:
> > We have "*load_tp_" in i386.md for load of thread pointer in
> > i386.md, so this patch merely adds the expander for
> > __builtin_thread_pointer.
> >
> > Bootstrap
On Thu, Oct 15, 2020 at 1:37 AM Segher Boessenkool
wrote:
>
> Hi!
>
> On Wed, Oct 14, 2020 at 01:43:45PM +0800, Hongtao Liu wrote:
> > On Wed, Oct 14, 2020 at 4:01 AM Segher Boessenkool
> > wrote:
> > > On Tue, Oct 13, 2020 at 04:40:53PM +0800, Hongtao Liu wrote:
> > > > For rtx like
> > > >
On Thu, Oct 15, 2020 at 4:14 PM Hongtao Liu wrote:
>
> On Thu, Oct 15, 2020 at 1:37 AM Segher Boessenkool
> wrote:
> >
> > Hi!
> >
> > On Wed, Oct 14, 2020 at 01:43:45PM +0800, Hongtao Liu wrote:
> > > On Wed, Oct 14, 2020 at 4:01 AM Segher Boessenkool
> > > wrote:
> > > > On Tue, Oct 13, 2020
On Wed, Oct 14, 2020 at 4:01 AM Segher Boessenkool
wrote:
>
> Hi!
>
> On Tue, Oct 13, 2020 at 04:40:53PM +0800, Hongtao Liu wrote:
> > For rtx like
> > (vec_select:V2SI (subreg:V4SI (inner:V2SI) 0)
> >(parallel [(const_int 0) (const_int 1)]))
> > it could be simplified as
Add new predicate bcst_mem_operand and corresponding constraint "Br"
to merge "$(pattern)_bcst{_1,_2,_3}" into "$(pattern)", also delete
those separate "*_bcst{_1,_2,_3}" patterns.
gcc/ChangeLog:
PR target/87767
* config/i386/constraints.md ("Br"): New special memory
Hi:
This is done in 2 steps:
1. Extend special memory constraint to handle non MEM_P cases, i.e.
(vec_duplicate:V4SF (mem:SF (addr)))
2. Refactor implementation of *_bcst{_1,_2,_3} patterns. Add new
predicate bcst_mem_operand and corresponding constraint "Br" to merge
Hi:
For rtx like
(vec_select:V2SI (subreg:V4SI (inner:V2SI) 0)
(parallel [(const_int 0) (const_int 1)]))
it could be simplified as inner.
Bootstrap is ok, regression test on i386 backend is ok.
gcc/ChangeLog
PR rtl-optimization/97249
* simplify-rtx.c
On Thu, Oct 15, 2020 at 8:38 PM Richard Sandiford
wrote:
>
> Hongtao Liu via Gcc-patches writes:
> > + /* Simplify vec_select of a subreg of X to just a vec_select of X
> > + when X has same component mode as vec_select. */
> > + int l2;
> >
Hi:
It's implemented as below:
V setg (V v, int idx, T val)
{
V idxv = (V){idx, idx, idx, idx, idx, idx, idx, idx};
V valv = (V){val, val, val, val, val, val, val, val};
V mask = ((V){0, 1, 2, 3, 4, 5, 6, 7} == idxv);
v = (v & ~mask) | (valv & mask);
return v;
}
Bootstrap is fine,
On Mon, Oct 19, 2020 at 5:07 PM Richard Biener
wrote:
>
> On Mon, Oct 19, 2020 at 10:21 AM Hongtao Liu wrote:
> >
> > Hi:
> > It's implemented as below:
> > V setg (V v, int idx, T val)
> >
> > {
> > V idxv = (V){idx, idx, idx, idx, idx, idx, idx, idx};
> > V valv = (V){val, val, val, val,
On Wed, Oct 14, 2020 at 5:21 PM Uros Bizjak wrote:
>
> On Wed, Oct 14, 2020 at 11:04 AM Hongyu Wang wrote:
> >
> >
> >
> > Uros Bizjak 于2020年10月14日周三 下午4:42写道：
> >>
> >> On Wed, Oct 14, 2020 at 10:34 AM Hongyu Wang
> >> wrote:
> >> >
> >> > >
> >> > > Please also add -muintr to
On Mon, Oct 19, 2020 at 5:55 PM Richard Biener
wrote:
>
> On Mon, Oct 19, 2020 at 11:37 AM Hongtao Liu wrote:
> >
> > On Mon, Oct 19, 2020 at 5:07 PM Richard Biener
> > wrote:
> > >
> > > On Mon, Oct 19, 2020 at 10:21 AM Hongtao Liu wrote:
> > > >
> > > > Hi:
> > > > It's implemented as
On Mon, Oct 19, 2020 at 11:31 PM Richard Sandiford
wrote:
>
> Hongtao Liu writes:
> > On Thu, Oct 15, 2020 at 8:38 PM Richard Sandiford
> > wrote:
> >>
> >> Hongtao Liu via Gcc-patches writes:
> >> > + /* Simplify vec_s
On Mon, Oct 19, 2020 at 11:38 PM Vladimir Makarov wrote:
>
>
> On 2020-10-11 8:58 p.m., Hongtao Liu wrote:
> > Hi:
> >This is done in 2 steps:
> >1. Extend special memory constraint to handle non MEM_P cases, i.e.
> > (vec_duplicate:V4SF (mem:SF (addr)))
> >2. Refactor implementation
Hi:
Rewriting testcase with cpp source file, then compare operator could
be used directly for vector, this would avoid impact of vectorizer.
gcc/testsuite/ChangeLog:
PR target/96667
* gcc.target/i386/avx512bw-pr96246-1.c: Moved to...
*
On Fri, Aug 14, 2020 at 5:57 PM Uros Bizjak wrote:
>
> On Fri, Aug 14, 2020 at 8:03 AM Hongtao Liu wrote:
> >
> > Hi:
> > For struct initialization, when it fits in a TImode, gcc will use
> > pinsr insn which causes poor codegen described in PR93897 and PR96562.
>
> You should probably remove
On Wed, Aug 19, 2020 at 10:17 AM Hongtao Liu wrote:
>
> On Mon, Aug 17, 2020 at 5:34 PM Uros Bizjak wrote:
> >
> > On Fri, Aug 14, 2020 at 10:24 AM Hongtao Liu wrote:
> > >
> > > Enable direct move between masks and gprs in pass_reload with
> > > consideration of cost model.
> > >
> > >
On Mon, Aug 17, 2020 at 5:34 PM Uros Bizjak wrote:
>
> On Fri, Aug 14, 2020 at 10:24 AM Hongtao Liu wrote:
> >
> > Enable direct move between masks and gprs in pass_reload with
> > consideration of cost model.
> >
> > Changelog
> > gcc/
> > * config/i386/i386.c
On Mon, Aug 17, 2020 at 5:20 PM Uros Bizjak wrote:
>
> On Fri, Aug 14, 2020 at 10:22 AM Hongtao Liu wrote:
> >
> > Hi:
> > First, since avx512 masks involve both vector isa and general part,
> > so i add both maintainers to the maillist.
> >
> > I'm doing this in 4 steps:
> > 1 - Add cost
On Mon, Aug 17, 2020 at 6:08 PM Uros Bizjak wrote:
>
> On Fri, Aug 14, 2020 at 10:26 AM Hongtao Liu wrote:
> >
> > Enable operator or/xor/and/andn/not for mask register, kxnor is not
> > enabled since there's no corresponding instruction for general
> > registers.
> >
> > gcc/
> > PR
On Thu, Aug 27, 2020 at 8:24 PM Jakub Jelinek wrote:
>
> On Thu, Jul 09, 2020 at 04:33:46PM +0800, Hongtao Liu via Gcc-patches wrote:
> > +static void
> > +replace_constant_pool_with_broadcast (rtx_insn* insn)
> > +{
> > + subrtx_ptr_iterator::array_type array;
&g
ping ^ 4, it's a very simple fix for ICE.
On Mon, Aug 10, 2020 at 6:00 PM Hongtao Liu wrote:
>
> Ping^3
>
> On Tue, Aug 4, 2020 at 4:21 PM Hongtao Liu wrote:
> >
> > ping ^2
> >
> > On Mon, Jul 27, 2020 at 5:31 PM Hongtao Liu wrote:
> > >
> > > ping
> > >
> > > On Wed, Jul 22, 2020 at 3:57 PM
ping^1
On Tue, Aug 11, 2020 at 5:43 PM Hongtao Liu wrote:
>
> Hi:
> The issue is described in the bugzilla.
> Bootstrap is ok, regression test for i386/x86-64 backend is ok.
> Ok for trunk?
>
> ChangeLog
> gcc/
> PR target/96551
> * config/i386/sse.md
On Fri, Aug 21, 2020 at 11:50 PM Uros Bizjak wrote:
>
> On Fri, Aug 21, 2020 at 5:41 PM Hongtao Liu wrote:
> >
> > On Fri, Aug 21, 2020 at 9:15 PM Uros Bizjak wrote:
> > >
> > > > > > gcc/
> > > > > > PR target/88808
> > > > > > * config/i386/i386.c
On Sat, Aug 22, 2020 at 12:36 AM H.J. Lu wrote:
>
> On Fri, Aug 21, 2020 at 9:29 AM Hongtao Liu wrote:
> >
> > On Fri, Aug 21, 2020 at 11:50 PM Uros Bizjak wrote:
> > >
> > > On Fri, Aug 21, 2020 at 5:41 PM Hongtao Liu wrote:
> > > >
> > > > On Fri, Aug 21, 2020 at 9:15 PM Uros Bizjak wrote:
On Sat, Aug 22, 2020 at 1:08 AM H.J. Lu wrote:
>
> On Fri, Aug 21, 2020 at 10:02 AM H.J. Lu wrote:
> >
> > On Fri, Aug 21, 2020 at 9:46 AM Hongtao Liu wrote:
> > >
> > > On Sat, Aug 22, 2020 at 12:36 AM H.J. Lu wrote:
> > > >
> > > > On Fri, Aug 21, 2020 at 9:29 AM Hongtao Liu wrote:
> > > >
On Fri, Aug 21, 2020 at 5:44 PM Richard Sandiford
wrote:
>
> Hongtao Liu via Gcc-patches writes:
> > ping ^ 4, it's a very simple fix for ICE.
>
> OK, thanks. (Reviewing on the basis that I agree it's a simple rtx
> correctness fix.)
>
Thanks for the review.
> Richa
On Fri, Aug 21, 2020 at 9:15 PM Uros Bizjak wrote:
>
> > > > gcc/
> > > > PR target/88808
> > > > * config/i386/i386.c (ix86_preferred_reload_class): Allow
> > > > QImode data go into mask registers.
> > > > * config/i386/i386.md: (*movhi_internal): Adjust
On Thu, Aug 20, 2020 at 3:24 PM Hongtao Liu wrote:
>
> On Wed, Aug 19, 2020 at 3:05 PM Uros Bizjak wrote:
> >
> > On Wed, Aug 19, 2020 at 4:25 AM Hongtao Liu wrote:
> > >
> > > On Mon, Aug 17, 2020 at 6:08 PM Uros Bizjak wrote:
> > > >
> > > > On Fri, Aug 14, 2020 at 10:26 AM Hongtao Liu
On Thu, Aug 20, 2020 at 3:40 PM Uros Bizjak wrote:
>
> On Thu, Aug 20, 2020 at 9:31 AM Hongtao Liu wrote:
> >
> > On Thu, Aug 20, 2020 at 3:24 PM Hongtao Liu wrote:
> > >
> > > On Wed, Aug 19, 2020 at 3:05 PM Uros Bizjak wrote:
> > > >
> > > > On Wed, Aug 19, 2020 at 4:25 AM Hongtao Liu
On Wed, Aug 19, 2020 at 2:31 PM Uros Bizjak wrote:
>
> On Wed, Aug 19, 2020 at 4:17 AM Hongtao Liu wrote:
>
> OK, modulo:
>
> +/* { dg-final { scan-assembler-not "%xmm" } } */
>
> It is not clear to me what the testcase is testing here. The scan
> string is probably too broad and can generate
On Wed, Aug 19, 2020 at 3:05 PM Uros Bizjak wrote:
>
> On Wed, Aug 19, 2020 at 4:25 AM Hongtao Liu wrote:
> >
> > On Mon, Aug 17, 2020 at 6:08 PM Uros Bizjak wrote:
> > >
> > > On Fri, Aug 14, 2020 at 10:26 AM Hongtao Liu wrote:
> > > >
> > > > Enable operator or/xor/and/andn/not for mask
Hi:
This patch is to fix a typo in my last patch [1].
[1] https://gcc.gnu.org/pipermail/gcc-patches/2020-August/551982.html
Bootstrap is ok, gcc regression test hosted on CLX for i386/x86-64
backend is ok.
Ok for trunk?
gcc/ChangeLog:
PR target/96755
* config/i386/sse.md:
Hi:
Since This testcase is used to check generation of AVX512 vector
comparison, scan-assembler for vmov instruction could be deleted, also
-mprefer-vector-width=512 is added to avoid impact of different
default arch/tune of GCC.
Sorry for the inaccuracy of the testcase.
ChangeLog
On Thu, Sep 17, 2020 at 12:10 PM Jeff Law wrote:
>
>
> On 9/15/20 9:20 PM, Hongtao Liu via Gcc-patches wrote:
> > Hi:
> > Rtx cost of sse_to_integer would be used by pass_stv as a
> > measurement for the scalar-to-vector transformation. As
> > https://gcc.g
On Wed, May 27, 2020 at 8:01 PM Uros Bizjak wrote:
>
> On Wed, May 27, 2020 at 8:02 AM Hongtao Liu wrote:
> >
> > On Mon, May 25, 2020 at 8:41 PM Uros Bizjak wrote:
> > >
> > > On Mon, May 25, 2020 at 2:21 PM Hongtao Liu wrote:
> > > >
> > > > According to Intel SDM, VPMOVQB xmm1/m16
On Mon, May 25, 2020 at 1:55 AM Uros Bizjak wrote:
>
> On Sun, May 24, 2020 at 9:26 AM Hongtao Liu wrote:
> >
> > On Sat, May 23, 2020 at 6:11 PM Uros Bizjak wrote:
> > >
> > > On Sat, May 23, 2020 at 9:25 AM Hongtao Liu wrote:
> > > >
> > > > Hi:
> > > > This patch fix non-conforming
On Mon, May 25, 2020 at 1:55 AM Uros Bizjak wrote:
>
> On Sun, May 24, 2020 at 9:26 AM Hongtao Liu wrote:
> >
> > On Sat, May 23, 2020 at 6:11 PM Uros Bizjak wrote:
> > >
> > > On Sat, May 23, 2020 at 9:25 AM Hongtao Liu wrote:
> > > >
> > > > Hi:
> > > > This patch fix non-conforming
On Mon, May 25, 2020 at 7:36 PM Richard Biener wrote:
>
> On Mon, 25 May 2020, Uros Bizjak wrote:
>
> > On Mon, May 25, 2020 at 8:27 AM Richard Biener wrote:
> > >
> > > On May 25, 2020 8:12:12 AM GMT+02:00, Uros Bizjak
> > > wrote:
> > > >On Mon, May 25, 2020 at 7:53 AM Hongtao Liu wrote:
>
According to Intel SDM, VPMOVQB xmm1/m16 {k1}{z}, xmm2 has 16-bit
memory_operand instead of 128-bit one which exists in current
implementation. Also for other vpmov instructions which have
memory_operand narrower than 128bits.
Bootstrap is ok, regression test for i386/x86-64 backend is ok.
On Mon, May 25, 2020 at 8:00 PM Uros Bizjak wrote:
>
> On Mon, May 25, 2020 at 1:56 PM Hongtao Liu wrote:
> >
> > On Mon, May 25, 2020 at 7:36 PM Richard Biener wrote:
> > >
> > > On Mon, 25 May 2020, Uros Bizjak wrote:
> > >
> > > > On Mon, May 25, 2020 at 8:27 AM Richard Biener
> > > >
Great, thanks!
On Tue, May 26, 2020 at 2:08 PM Martin Liška wrote:
>
> On 5/26/20 7:22 AM, Hongtao Liu via Gcc wrote:
> > i commit a separate patch alone only for ChangeLog files, should i revert
> > it?
>
> Hello.
>
> I've just done it.
>
> Martin
--
BR,
Hongtao
On Tue, May 26, 2020 at 6:49 AM Jakub Jelinek via Gcc-patches
wrote:
>
> Hi!
>
> I've turned the strict mode of Martin Liška's hook changes,
> which means that from now on no commits to the trunk or release branches
> should be changing any ChangeLog files together with the other files,
>
On Thu, May 28, 2020 at 11:37 PM H.J. Lu wrote:
>
> On Thu, May 28, 2020 at 8:00 AM Richard Sandiford
> wrote:
> >
> > "Yangfei (Felix)" writes:
> > > Thanks for reviewing this.
> > > Attached please find the v5 patch.
> > > Note: we also need to modify local variable "mode" once we catch one
On Mon, May 25, 2020 at 8:41 PM Uros Bizjak wrote:
>
> On Mon, May 25, 2020 at 2:21 PM Hongtao Liu wrote:
> >
> > According to Intel SDM, VPMOVQB xmm1/m16 {k1}{z}, xmm2 has 16-bit
> > memory_operand instead of 128-bit one which exists in current
> > implementation. Also for other vpmov
Hi:
Bootstrap is ok, regression test on i386/x86-64 backend is ok.
gcc/ChangeLog:
PR target/92658
* config/i386/sse.md
(trunc2, truncv32hiv32qi2,
trunc2): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr92658-avx512f.c: New test.
*
Thanks!
On Wed, Sep 16, 2020 at 8:57 PM Uros Bizjak wrote:
>
> > gcc/ChangeLog
> >
> > * common/config/i386/i386-common.c
> > (OPTION_MASK_ISA_AVX_UNSET): Remove OPTION_MASK_ISA_XSAVE_UNSET.
> > (OPTION_MASK_ISA_XSAVE_UNSET): Add OPTION_MASK_ISA_AVX_UNSET.
> >
> >
Thanks.
On Wed, Sep 16, 2020 at 8:54 PM Uros Bizjak wrote:
>
> > gcc/ChangeLog
> >
> > PR target/96861
> > * config/i386/x86-tune-costs.h (skylake_cost): increase rtx
> > cost of sse_to_integer from 2 to 6.
> >
> > gcc/testsuite
> >
> > *
On Thu, Oct 22, 2020 at 12:36 AM Segher Boessenkool
wrote:
>
> On Wed, Oct 21, 2020 at 04:43:29PM +0100, Richard Sandiford wrote:
> > Hongtao Liu writes:
> > > + poly_uint64 nunits
> > > + = GET_MODE_NUNITS (GET_MODE (SUBREG_REG (trueop0)));
> > > + rtx par = trueop1;
>
On Wed, Oct 21, 2020 at 11:04 PM Vladimir Makarov wrote:
>
>
> On 2020-10-20 10:11 p.m., Hongtao Liu wrote:
> >
> > Changed, and it passed the i386/x86-64 regression test.
> >
> > Update patch.
> >
> Thank you, Hongtao. This patch is ok for the trunk.
>
>
Thanks for the review, committed.
--
On Tue, Oct 27, 2020 at 7:13 PM Richard Sandiford
wrote:
>
> Hongtao Liu via Gcc-patches writes:
> > Hi:
> > For inline asm, there could be an operand like (not (mem:)), it's
> > not a valid operand for normal memory constraint.
> > Bootstrap is ok, regres
Hi:
Sorry for Incomplete test for my last patch at
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/555948.html.
This patch should fix invalid address introduced by special memory constraint.
Bootstrap is ok, regression test is ok for make check
Hi:
For inline asm, there could be an operand like (not (mem:)), it's
not a valid operand for normal memory constraint.
Bootstrap is ok, regression test is ok for make check
RUNTESTFLAGS="--target_board='unix{-m32,}'"
gcc/ChangeLog
PR target/97540
* ira.c: (ira_setup_alts):
ping^1
On Tue, Oct 20, 2020 at 3:36 PM Richard Biener
wrote:
>
> On Tue, Oct 20, 2020 at 4:35 AM Hongtao Liu wrote:
> >
> > On Mon, Oct 19, 2020 at 5:55 PM Richard Biener
> > wrote:
> > >
> > > On Mon, Oct 19, 2020 at 11:37 AM Hongtao Liu wrote:
> > > >
> > > > On Mon, Oct 19, 2020 at 5:07 PM
ping!
On Fri, Jul 10, 2020 at 5:24 PM Hongtao Liu wrote:
>
> + maintainer.
> cc H.J
>
> On Thu, Jul 9, 2020 at 4:33 PM Hongtao Liu wrote:
> >
> > Hi:
> > For a constant vector having one duplicated value, there's no need
> > to put the whole vector in the constant pool, using embedded
Those two define_insns have same pattern, and
_load_mask would always be matched since it show up
earlier in the md file, and it may lose some opportunity in
pass_reload since _load_mask only have constraint "0C"
for operand2, and "v" constraint in _vblendm would never
be matched.
2020-07-21
Bootstrap is ok, regression test is ok for i386 backend.
gcc/
PR target/96262
* config/i386/i386-expand.c
(ix86_expand_vec_shift_qihi_constant): Refine.
gcc/testsuite/
* gcc.target/i386/pr96262-1.c: New test.
---
gcc/config/i386/i386-expand.c | 6
ping ^2
On Mon, Jul 27, 2020 at 5:31 PM Hongtao Liu wrote:
>
> ping
>
> On Wed, Jul 22, 2020 at 3:57 PM Hongtao Liu wrote:
> >
> > Bootstrap is ok, regression test is ok for i386 backend.
> >
> > gcc/
> > PR target/96262
> > * config/i386/i386-expand.c
> >
Update patch.
There are a lot of avx512 define_insns which lack corresponding memory
broadcast version, i only add *avx512f_mul3_bcst and
*avx512dq_mul3_bcst in this patch.
On Fri, Jul 24, 2020 at 10:37 AM Hongtao Liu wrote:
>
> On Thu, Jul 23, 2020 at 9:53 PM Hongtao Liu wrote:
> >
> > On
ping^2
On Mon, Jul 27, 2020 at 5:31 PM Hongtao Liu wrote:
>
> ping
>
> On Mon, Jul 20, 2020 at 4:40 PM Hongtao Liu wrote:
> >
> > Correct PR number in ChangeLog
> > it's pr96243.
> >
> > On Mon, Jul 20, 2020 at 1:46 PM Hongtao Liu wrote:
> > >
> > > Hi:
> > > For rtx like (eq:HI (V8SI 90)
ping ^2
On Mon, Jul 27, 2020 at 5:31 PM Hongtao Liu wrote:
>
> ping
>
> On Wed, Jul 22, 2020 at 12:59 PM Hongtao Liu wrote:
> >
> > Those two define_insns have same pattern, and
> > _load_mask would always be matched since it show up
> > earlier in the md file, and it may lose some
On Tue, Aug 4, 2020 at 6:28 PM Kirill Yukhin wrote:
>
> On 04 авг 13:26, Kirill Yukhin wrote:
> > Could you please clarify, how your patch relared to [1]?
> > I see from the bug that it describes perf issue w.r.t. scalar
> > operations.
>
Sorry for Typo, it's pr96243.
Ping^3
On Tue, Aug 4, 2020 at 4:21 PM Hongtao Liu wrote:
>
> ping ^2
>
> On Mon, Jul 27, 2020 at 5:31 PM Hongtao Liu wrote:
> >
> > ping
> >
> > On Wed, Jul 22, 2020 at 3:57 PM Hongtao Liu wrote:
> > >
> > > Bootstrap is ok, regression test is ok for i386 backend.
> > >
> > > gcc/
> > >
Ping^3
On Tue, Aug 4, 2020 at 4:21 PM Hongtao Liu wrote:
>
> ping ^2
>
> On Mon, Jul 27, 2020 at 5:31 PM Hongtao Liu wrote:
> >
> > ping
> >
> > On Wed, Jul 22, 2020 at 12:59 PM Hongtao Liu wrote:
> > >
> > > Those two define_insns have same pattern, and
> > > _load_mask would always be
On Fri, Aug 7, 2020 at 11:02 PM Kirill Yukhin wrote:
>
> Hello,
>
> On 05 авг 09:29, Hongtao Liu wrote:
> > On Tue, Aug 4, 2020 at 6:28 PM Kirill Yukhin
> > wrote:
> > >
> > > On 04 авг 13:26, Kirill Yukhin wrote:
> > > > Could you please clarify, how your patch relared to [1]?
> > > > I see
On Tue, Aug 11, 2020 at 5:56 PM Uros Bizjak wrote:
>
> On Tue, Aug 11, 2020 at 11:36 AM Hongtao Liu wrote:
> >
> > On Tue, Aug 11, 2020 at 4:38 PM Uros Bizjak wrote:
> > >
> > > On Tue, Aug 11, 2020 at 5:30 AM Hongtao Liu wrote:
> > > >
> > > > Hi:
> > > > The issue is described in the
Hi:
For struct initialization, when it fits in a TImode, gcc will use
pinsr insn which causes poor codegen described in PR93897 and PR96562.
Bootstrap is ok, regression test is ok for i386/x86-64 backend.
Ok for trunk?
ChangeLog
gcc/
PR target/96562
PR target/93897
Hi:
The issue is described in the bugzilla.
Bootstrap is ok, regression test for i386/x86-64 backend is ok.
Ok for trunk?
ChangeLog
gcc/
PR target/96350
* config/i386/i386.c (ix86_legitimate_constant_p): Return
false for ENDBR immediate.
On Tue, Aug 11, 2020 at 4:38 PM Uros Bizjak wrote:
>
> On Tue, Aug 11, 2020 at 5:30 AM Hongtao Liu wrote:
> >
> > Hi:
> > The issue is described in the bugzilla.
> > Bootstrap is ok, regression test for i386/x86-64 backend is ok.
> > Ok for trunk?
> >
> > ChangeLog
> > gcc/
> > PR
Hi:
The issue is described in the bugzilla.
Bootstrap is ok, regression test for i386/x86-64 backend is ok.
Ok for trunk?
ChangeLog
gcc/
PR target/96551
* config/i386/sse.md (vec_unpacku_float_hi_v16si): For vector
compare to integer mask, don't use gen_rtx_LT , use
Hi:
For a constant vector having one duplicated value, there's no need
to put the whole vector in the constant pool, using embedded broadcast
instead.
Bootstrap test is Ok, regression test for i386/x86-64 backend is ok.
gcc/ChangeLog:
PR target/87767
*
+ maintainer.
cc H.J
On Thu, Jul 9, 2020 at 4:33 PM Hongtao Liu wrote:
>
> Hi:
> For a constant vector having one duplicated value, there's no need
> to put the whole vector in the constant pool, using embedded broadcast
> instead.
>
> Bootstrap test is Ok, regression test for i386/x86-64
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