Hi,
Please consider this as a reminder to review the ldp and stp peephole
implementation for AArch64 target.
The patch was originally posted at:-
http://gcc.gnu.org/ml/gcc-patches/2013-03/msg01051.html
Please review the same and let me know if its okay.
Build and tested on aarch64-thunder-elf
Hi,
>> You are better off CCing the maintainers for such reviews. Let me do
>> that for you. I cannot approve or reject this patch but I have a few
>> comments as below.
Thanks for the quick review and comments.
Please find attached the modified patch as per review comments.
Please review the sa
Hi,
Please find attached the patch that performs optimization on unsigned values.
Original fold-const part implemented in match.pd.
Please review the patch and let us know if it's OK?
Regression Tested on X86_64 with no regressions.
Thanks,
Naveen
ChangeLog:
* match.pd (cmp (convert (bit_not
Hi,
>> I'm also failing to see why you can't enhance the existing
Please find attached the patch that enhances the existing pattern.
Please review the patch and let me know if any further modifications
are required.
Thanks,
Naveendiff --git a/gcc/match.pd b/gcc/match.pd
index 6c8ebd5..bd47a91 10
Hi,
Please find attached the patch that enhances the existing pattern.
Please review the patch at the following link and let me know
if there should be any modifications in it:-
https://gcc.gnu.org/ml/gcc-patches/2016-02/msg01035.html
Thanks,
Naveen
Hi,
Please find attached the patch which performs following patterns folding
in match.pd:-
a ==/!= a p+ b to b ==/!= 0.
a << N ==/!= 0 to a&(-1>>N) ==/!= 0.
a * N ==/!= 0 where N is a power of 2 to a & (-1<
* testsuite/gcc.dg/tree-ssa/compare-shiftmult-1.c: New testcase.
* testsu
Hi,
>> For signed types with TYPE_OVERFLOW_UNDEFINED
>> you can simply cancel the operation (even for non-power-of-two multipliers).
Thanks for the review and comments.
Please find attached the modified patch as per your comments.
Please review the same and let me know if any further modificati
Hi,
>> handle exact_div differently, like fold-const.c does.
>> Then expressing ~1 with the result expression is really excessive - you
>> should simply build this with @1 - 1 if @1 is a power of two.
Thanks for the review and comments.
Please find attached the modified patch as per your comment
>> so using wi::mask is prefered here.
Thanks for your review and comments.
Please find attached the modified patch as per your comments.
Please let me know if this version is okay?
Thanks,
Naveen
2015-07-22 Naveen H.S
gcc/testsuite/ChangeLog:
PR middle-end/25529
* gcc.dg
>> Your previous patch correctly restricted this to unsigned types.
Thanks for your review and comments.
Please find attached the modified patch as per your comments.
Please let me know if this version is okay?
Thanks,
Naveen
2015-07-22 Naveen H.S
gcc/testsuite/ChangeLog:
PR middl
Hi,
Please find attached the patch that fixes an ICE for prefetch.
The predicate is too lose for the constraints. Hence, the patch tightens
up the predicate to be exactly as constraint allows, avoids a “reload”
and allows better code generation.
Submitted on behalf of Andrew Pinski.
Thanks,
N
Hi Marcus,
Thanks for the review and comments.
>> OK and can you back port to 5 ?
Please find attached the backported patch on gcc-5-branch.
Regression tested on AArch64 without any issues.
2015-09-28 Andrew Pinski
ChangeLog
* config/aarch64/aarch64.md (prefetch):
Chan
Hi,
Please find attached the patch that moves some more patterns from
fold-const using simplify and match.
Please review the patch and let me know if any modifications are required.
Tested the patch on X86 without any regressions.
Thanks,
Naveen
ChangeLog
2015-10-07 Naveen H.S
* f
Hi Richard,
Thanks for your review and useful comments.
I will move the future optimization patterns with all the conditions
present in fold-const or builtins file as per your suggestions.
Please find attached the patch as per your comments.
Please review the patch and let me know if any further
Hi Richard,
Thanks for the comments. Sorry, I was confused with handling the const and
variable
together part. Have modified them.
Also, considered that both (X & Y) can be const or variable in those cases
for which match patterns have been added.
Please let me know whether its correct or only "
Hi.
>> please adjust also according to these comments.
Adjusted the patch as per your comments.
Please find attached the patch as per your comments.
Please review the patch and let me know if any further modifications
are required.
Thanks,
Naveendiff --git a/gcc/fold-const.c b/gcc/fold-const.c
Hi,
Thanks for all the suggestions.
Please find attached the modified patch as per your suggestions.
I had missed a mail as pointed by Marc Glisse. Now I have implemented
everything suggested.
Please review the patch and let me know if any further modifications are
required.
I have some queries
Hi,
Thanks very much for your detailed explanation regarding the queries.
>> you are missing the convert? on the lshift now, without it the
>> tree_nop_conversion_p check always evaluates to true.
Done.
>> fold-const.c which handles TRUTH_NOT_EXPR but logical_inverted_value
>> does not handle it
Hi,
Please find attached the modified patch of duplicate patterns which were
posted in the earlier part.
Please review them and let me know if any further modifications are required.
Thanks,
Naveendiff --git a/gcc/fold-const.c b/gcc/fold-const.c
index de45a2c..b36e2f5 100644
--- a/gcc/fold-const
Hi,
>> That's not what Richard meant. We already have:
Done. As per the comments.
Please find attached the modified patch as per your comments.
Please review them and let me know if any further modifications are required.
Thanks,
Naveendiff --git a/gcc/fold-const.c b/gcc/fold-const.c
index de4
Hi,
>> +/* Fold X + (X / CST) * -CST to X % CST. */
>> This one is still wrong
Removed.
>> I don't understand the point of the FLOAT_TYPE_P check.
The check was there in fold-const. So, just had the same check.
>> Will we also simplify (A & B) - (A & ~B) into B - (A ^ B) ?
Done.
>> or maybe in
Hi,
>> use if (wi::bit_and (@2, @1) == 0)
Done.
>> and instead of the 2nd group
>> place a :c on the minus of the one not matching INTEGER_CSTs.
Done.
Just curious to know whether ":c" act as commutative operation in the input as
well as output in this case?
Regression tested without any extra f
Hi,
>> So I suggest to modify your patch to do
Done.
Please find attached the modified patch.
Regression tested successfully on X86_64.
Thanks,
Naveendiff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 1e7fbb4..23c6fa9 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -9692,28 +9692,6
Hi,
Please find attached the patch that moves some multiply optimizations
from fold-const using simplify and match.
Please review the patch and let me know if any modifications are required.
Tested the patch on X86.
Observing following failures:-
>> FAIL: gcc.dg/fold-plusmult.c scan-tree-dump-
Hi,
Thanks for the review and suggestions.
>> Please do not drop A - B -> A + (-B) from fold-const as match.pd
>> doesn't implement all of fold-const.c negate_expr_p support.
Done.
>> which is more expensive. This means that we miss a
>> (bit_and (bit_not @0) INTEGER_CST@1)
Should we have thi
Hi,
Please find attached the patch that moves some division optimizations
from fold-const using match and simplify.
Please review the patch and let me know if any modifications are required.
Regression tested the patch on X86 without any issues.
Thanks,
Naveen
ChangeLog
2015-11-04 Naveen H.S
Hi,
Thanks for the review and comments.
>> I thought we were mostly using the 'convert?'
>> and tree_nop_conversion_p on integers
Done. Cleared all instances of convert which are not required.
However, I am still confused about the use of "convert" in match
and simplify.
>> So all patterns loo
Hi,
Please find attached the modified patch as per review comments.
>> use :s on both inner rdiv in both patterns. With that the two patterns are
>> ok.
Done.
>> Omit the parens around REAL_CST@0
Done.
Regression tested on X86_64.
Thanks,
Naveendiff --git a/gcc/fold-const.c b/gcc/fold-const.
Hi,
>> it probably works for all integer divisions (floor_div, etc)
>> since it is exact and thus does not depend on the rounding.
Please find attached the modified patch as per comments.
Thanks,
Naveendiff --git a/gcc/fold-const.c b/gcc/fold-const.c
index ee9b349..88dbbdd 100644
--- a/gcc/fold-
Hi,
Please find attached the patch that moves some more division optimizations
from fold-const using match and simplify.
Please review the patch and let me know if any modifications are required.
Hopefully got the converts right this time :-)
Regression tested the patch on X86 without any
Hi,
Updating my email address in the MAINTAINERS file.
Thanks,
Naveen
Index: ChangeLog
===
--- ChangeLog (revision 263324)
+++ ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2018-08-06 Naveen H.S
+
+ * MAINTAINERS: Update my email addr
Hi James,
Thanks for your review and useful comments.
>> If you could try to keep one reply chain for each patch series
Will keep that in mind for sure :-)
>> Very minor, but what is wrong with:
>> int matches[16][2] = {0};
Done.
>> nummatches is unused.
Removed.
>> This search algorithm is to
Hi James,
>> Could you make the testcase a bit more comprehensive?
Modified the testcase considering all the possible cases.
Split up the test based on different scenarios.
Please review the patch and let us know if its okay?
Thanks,
Naveendiff --git a/gcc/config/aarch64/aarch64.c b/gcc/config
Hi Wilco,
>> That looks good to me now.
Thanks for the review and your okay for the patch.
Please consider this as a personal reminder to review the patch
at following link and let me know if its okay to commit?
https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00839.html
Thanks,
Naveen
Hi Wilco,
>> That looks good to me now.
Thanks for the review and your okay for the patch.
Please consider this as a personal reminder to review the patch
at following link and let me know if its okay to commit?
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01333.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01334.html
Thanks,
Naveen
Hi Joesph,
Thanks for your review and valuable comments on this issue.
Please find attached the patch that merges x86-intrinsics for AArch64 and PPC
architectures.
>> it would seem to me to be a bad idea to duplicate the
>> implementation for more and more architectures.
Merged the implementati
Hi James,
Thanks for the approval.
>> From an AArch64 perspective, this is OK - but please wait for an ARM
>> approval before you commit it.
Can anyone from ARM comment on the patch so that it can be committed
upstream if no issues.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00504.html
Than
Hi Ramana,
Thanks for the review and approval.
>> Please update the ARM backend with the new attribute too
>> (define_insn "crypto_vmullp64"
Its already been updated in the patch posted at:-
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00504.html
>> Ok with that change and checking that you ca
Hi Jeff,
Thanks for the review and your approval for final patch.
Sorry, It was a long weekend and hence could not revert to your
comments earlier.
>> You need a ChangeLog entry, but I think that's it. Can you
>> please repost with a ChangeLog entry for final approval?
Please find the final pat
Hi,
The code (m1 > m2) * d code should be optimized as m1> m2 ? d : 0.
The patch optimizes it inside tree-vrp.c when simplifying with the range
inside simplify_stmt_using_ranges. If a multiply is found and either side
has a range [0,1], then transform it.
Ex:- d * c where d has a range of [0,1]
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01334.html
Thanks,
Naveen
Hi,
Thanks for the review and comments on the patch.
>> The proposed patch handled both the same. This means the pattern
>> shouldn't use range-info but instead match a more complex
The patch handles as per the discussion by matching the pattern
in match.pd.
Bootstrapped and Regression tested
Hi,
This patch adds Cavium octeon3 support in mips.
Please review the patch and let us know if there should be any
modifications.
Submitting the patch on behalf of Andrew Pinski.
Thanks,
2014-10-07 Andrew Pinski
* config/mips/mips-cpus.def (octeon3): New cpu.
* config/mips/mip
Hi,
>> Patches adding new -march= values need to update invoke.texi.
Thanks for reviewing the patch and suggestion.
Please find attached the modified patch which updates octeon3
in invoke.texi
Please review the patch and let us know if there should be any
further modifications.
Thanks,
2014-10-
Hi,
Please find attached the patch "PR23664.patch" that converts the pattern:-
(a & C1) + (b & C2) into (a & C1) | (b & C2) iff (C1 & C2) == 0.
Please review and let me know if its okay.
Regression tested on AARH64 and x86_64.
Thanks,
Naveen
gcc/testsuite/ChangeLog:
2015-07-07 Naveen H.S
Hi,
Please find attached the patch "PR25529.patch" that converts the pattern:-
(unsigned * 2)/2 is into unsigned &0x7FFF
Please review and let me know if its okay.
Regression tested on AARH64 and x86_64.
Thanks,
Naveen
gcc/testsuite/ChangeLog:
2015-07-07 Naveen H.S
PR middle-e
Hi,
Please find attached the patch PR25530.patch that converts the pattern:-
(unsigned / 2) * 2 is into (unsigned & ~1).
Please review and let me know if its okay.
Regression tested on AARH64 and x86_64.
Thanks,
Naveen
gcc/testsuite/ChangeLog:
2015-07-07 Naveen H.S
PR middle-end/2
Hi,
Please find attached the patch that handles the operations on
SYMBOL_SMALL_TPREL appropriately.
It fixes gcc.dg/tls/opt-11.c regression on ilp32.
Please review the patch and let us know if its okay?
Regression tested on aarch64-elf.
Thanks,
Naveen
2015-02-02 Andrew Pinski
Hi Marcus,
Thanks for the review.
>> OK, but fix the trailing white space in the patch
Done. Committed with the modification.
>> Can you prepare a backport into 4.9
ILP32 support is not completely added in 4.9 and hence the patch
is not needed.
Thanks,
Naveen
Hi Marcus,
>> The handling of SYMBOL_SMALL_TPREL is present in 4.9 and very clearly
>> has exactly the same issue.
Please find attached the patch ported for gcc-4.9.
Please review the patch and let us know if its okay?
Regression tested on aarch64-elf.
Thanks,
Naveen
2015-02-20 Andrew Pinski
Hi,
Thanks for the review and your comments.
>> Is it intentional that you have not updated driver-native.c to
>> detect an Octeon 3 CPU?
We have not yet looked into that part yet and will be looking at it later.
>> Could you confirm what testing the patch has had?
Run the regression in build
Hi Catherine,
>> Would you please add some testcases and resubmit your patch?
Thanks for the review and suggestions.
Added the testcase "gcc.target/mips/octeon3-pipe-1.c"
Please review the modified patch and let us know if its good.
Thanks,
Naveen
2014-10-31 Andrew Pinski
* config/
Hi Ramana,
>> PR71112 is still open - should this be backported to GCC-6 ?
Ported the patch to gcc-6-branch and committed as:-
https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=250014
Bootstrapped and Regression Tested gcc-6-branch for AArch64
on aarch64-thunder-linux.
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01334.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00178.html
Thanks,
Naveen
Hi,
>> I think we can split this whenever we like, and
>> that there isn't any benefit in keeping the pair together?
Thanks for the review and your views.
The patch is modified as per your suggestion.
Please review the patch and let me know if its okay?
Bootstrapped and Regression done on AArc
Hi,
>> I haven't been clear in what I was asking for
Sorry. We understood right with the first comment but the second
part confused us a bit :).
>> Could you switch this back to an insn_and_split as it was in the previous
>> patch, and just drop the && reload_completed ?
Done.
Bootstrapped and
Hi James,
Thanks for the review and comments on the patch.
>> What am I missing - you add a new function which is never called?
>> Should this have been in series with a scheduling model change?
Sorry. You are right. This patch is one in series for scheduling and
addition of attributes to improv
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00505.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00505.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01529.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01634.html
Thanks,
Naveen
Hi,
>> Doesn't this avoid calling the target hook in cases where it used to
>> call it before?
Yes. Thanks for pointing it out.
>> Consider a conditional jump inside a parallel that is not a single set.
Please find attached the modified patch that handles the case mentioned.
Please review the
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00222.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00222.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00222.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00222.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00226.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00505.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00504.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01260.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01333.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01334.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00839.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00222.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00226.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00504.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00505.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01260.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01334.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01333.html
Thanks,
Naveen
Hi,
Please find attached the patch that adds first set of X86 instrinsic
headers to AArch64 target.
The implementation is based on similar work targeted at PPC64LE.
https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00550.html
We are using the corresponding DejaGnu tests similar to Powerpc from
gcc/t
Hi James,
The scheduling patch for vulcan was posted at the following link:-
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg01205.html
We are working on the patch and addressed the comments for thunderx2t99.
>> I tried lowering the repeat expressions as so:
Done.
>>split off the AdvSIMD/FP model
Hi,
Please find attached the patch that adds AES and CMP_BRANCH
fusion for Thunderx2t99.
Bootstrapped and Regression tested on aarch64-thunderx2t99.
Please review the patch and let us know if its okay?
2017-1-25 Naveen H.S
gcc
* config/aarch64/aarch64.c (thunderx2t99_tunings):
Hi,
Please find attached the patch that moves the check for CC usage in
any_condjump_p from sched-deps to target macros.
Currently the check is used only by i386 and AArch64.
The general condition checks for the fusion candidates to use/modify CC1
register. However, the fusion of ALU and Branch i
Hi,
Thanks for the review and suggestions.
> I think the patch isn't quite complete yet. You will also need changes in
> generic code. Currently sched_macro_fuse_insns() does:
Modified the sched_macro_fuse_insns() as required.
> Basically the idea is to push the check for CC usage into target m
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00718.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00222.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00226.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00504.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00505.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg01368.html
Thanks,
Naveen
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg01369.html
Thanks,
Naveen
Hi Kyrill,
Thanks for the review and your comments.
>> It would be useful if you expanded a bit on the approach used to
>> generate the improved codegen
The patch creates a duplicate of most common element and tries to optimize
the insertion using dup for the element followed by insertions.
Cur
Hi Wilco,
Thanks for reviewing the patch.
>> The return false seems incorrect - it means a core can either have
>> FUSE_CMP_BRANCH or FUSE_ALU_BRANCH but not both.
Thanks for pointing out about the confusion.
Modified the code as required.
Bootstrapped and Regression tested on AArch64 and X86_6
Hi Wilco,
>> Same comment for this part, we want to return true if we match:
Thanks for pointing out about the confusion.
>> Note writing these complex conditions using positive logic makes them much
>> more readable - if you have to negate use !(X && Y && Z) rather than
>> !X || !Y || !Z.
Modi
Hi Wilco,
>> I suggest you check the logic and follow the existing patterns in
>> aarch_macro_fusion_pair_p.
Done.
Bootstrapped and Regression tested on AArch64 and X86_64.
Please review the patch and let us know if its okay?
Thanks,
Naveen
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/c
Hi Wilco,
>> You should only return true if there is a match, not if there is
>> not a match.
Done.
Bootstrapped and Regression tested on AArch64 and X86_64.
Please review the patch and let us know if its okay?
Thanks,
Naveen
diff --git a/gcc/config/aarch64/aarch64-fusion-pairs.d
Hi,
The instruction "vec_pack_trunc_" should be split after register
allocator for scheduling reasons. Currently the instruction is marked as type
multiple which means it will scheduled as single issued. However, nothing can
be scheduled with either xtn/xtn2 which is a problem in some cases.
The
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