[PATCH, testsuite] Skip tail call tests on Thumb-1 targets

Hi, The sibcall_epilogue expand in arm.md is only defined for TARGET_32BIT targets and thus is not defined for TARGET_THUMB1 targets. As a result, tail call plugin tests fail with "cannot tail-call: machine description does not have a sibcall_epilogue instruction pattern". This patch skip

[PATCH, arm-embedded] Map armv8-m.main+dsp multilib to armv8-m.main one

Hi, ARMv8-M Mainline with DSP extension currently uses ARMv4T multilib because no multilib is built for it and there is no directive telling GCC how to map it to the right multilib. Therefore, we have applied the below patch ARM/embedded-5-branch to add a directive to map it to ARMv8-M

Re: [PATCH, ARM] Do not set ARM_ARCH_ISA_THUMB for armv5

On Friday 27 May 2016 14:01:22 Kyrill Tkachov wrote: > On 27/05/16 13:51, Thomas Preudhomme wrote: > > On Tuesday 24 May 2016 18:00:27 Kyrill Tkachov wrote: > >> Hi Thomas, > > > > Hi Kyrill, > > > >>> +/* Nonzero if chip supp

Re: [PATCH, ARM] Do not set ARM_ARCH_ISA_THUMB for armv5

On Tuesday 24 May 2016 18:00:27 Kyrill Tkachov wrote: > Hi Thomas, Hi Kyrill, > > > > +/* Nonzero if chip supports Thumb. */ > > +extern int arm_arch_thumb; > > + > > Bit of bikeshedding really, but I think a better name would be > arm_arch_thumb1. > This is because we also have the macros

Re: [PATCH] Fixes to must-tail-call tests

Hi Rainer, On Wednesday 25 May 2016 11:31:12 Rainer Orth wrote: > David Malcolm writes: > > The following fixes the known failures of the must-tail-call tests. > > > > Tested with --target= > > * aarch64-unknown-linux-gnu > > * ia64-unknown-linux-gnu > > *

[PATCH, ARM] Remove unused TARGET_ARM_V*M macros

Hi, TARGET_ARM_V6M and TARGET_ARM_v7M defined in gcc/config/arm/arm.h appears to be unused. This patch removes them. ChangeLog entry is obvious: *** gcc/ChangeLog *** 2016-05-23 Thomas Preud'homme * config/arm/arm.h (TARGET_ARM_V6M): Remove.

Re: [PATCH, libstdc++/testsuite, ping] 29_atomics/atomic/65913.cc: require atomic-builtins rather than specific target

Ping? On Thursday 26 May 2016 14:00:55 Thomas Preudhomme wrote: > [Sorry for the large recipient list, I wasn't sure who of C++ and x86 > maintainers should approve this] > > Hi, > > 29_atomics/atomic/65913.cc test in libstdc++ is a runtime test that only > rely on atomi

Re: [PATCH, testsuite] Skip tail call tests on Thumb-1 targets

On Wednesday 25 May 2016 11:38:44 Mike Stump wrote: > On May 25, 2016, at 10:20 AM, Thomas Preudhomme <thomas.preudho...@foss.arm.com> wrote: > > 2016-05-24 Thomas Preud'homme <thomas.preudho...@arm.com> > > > >* gcc.dg/plugin/plugin.exp:

[PATCH, libstdc++/testsuite] 29_atomics/atomic/65913.cc: require atomic-builtins rather than specific target

[Sorry for the large recipient list, I wasn't sure who of C++ and x86 maintainers should approve this] Hi, 29_atomics/atomic/65913.cc test in libstdc++ is a runtime test that only rely on atomic and gnu++11 support. Therefore I propose to require atomic-builtins instead of an x86 (32 or 64

Re: [PATCH, testsuite/ARM] Enable atomic tests in gcc.dg for -march=armv8-a bare metal

On Wednesday 01 June 2016 16:33:30 Kyrill Tkachov wrote: > I see gcc-patches was not cc'ed on the original submission and I didn't CC > it myself in my reply, so here it is a resend with my reply... > > On 31/05/16 14:11, Thomas Preudhomme wrote: > > Hi, > &g

Re: [PATCH, libgcc/ARM 1a/6] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote: > Please fix up the macros, post back and redo the test. Otherwise this > is ok from a quick read. What about the updated patch in attachment? As for the original patch, I've checked that code generation does not change for a number

Re: [PATCH, libgcc/ARM 1a/6, ping] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

Ping? Best regards, Thomas On Friday 17 June 2016 18:21:44 Thomas Preudhomme wrote: > On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote: > > Please fix up the macros, post back and redo the test. Otherwise this > > is ok from a quick read. > > What ab

Re: [PATCH, libgcc/ARM 1/6] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

Hi Ramana, On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote: > > From here down to > > > -#if ((__ARM_ARCH__ > 5) && !defined(__ARM_ARCH_6M__)) \ > > -|| defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \ > > -|| defined(__ARM_ARCH_5TEJ__) > > -#define

Re: [PATCH, testsuite/ARM] Skip pr70496.c for cortex-m devices

On Wednesday 06 April 2016 12:09:25 Kyrill Tkachov wrote: > Hi Thomas, > > On 06/04/16 12:03, Thomas Preudhomme wrote: > > Hi, > > > > Testcase in gcc.target/arm/pr70496.c uses an .arm directive so assumes the > > target has an ARM execution state. This

[PATCH, testsuite/ARM] Skip pr70496.c for cortex-m devices

Hi, Testcase in gcc.target/arm/pr70496.c uses an .arm directive so assumes the target has an ARM execution state. This patch adds a dg-skip-if directive to skip that test on Cortex-M targets since they don't have such an execution state. ChangeLog entry is as follows: ***

Re: [PATCH, ARM] Fix gcc.c-torture/execute/loop-2b.c execution failure on cortex-m0

On Friday 15 January 2016 12:45:04 Ramana Radhakrishnan wrote: > On Wed, Dec 16, 2015 at 9:11 AM, Thomas Preud'homme > > wrote: > > During reorg pass, thumb1_reorg () is tasked with rewriting mov rd, rn to > > subs rd, rn, 0 to avoid a comparison against 0

Re: [PATCH, ARM] Fix gcc.c-torture/execute/loop-2b.c execution failure on cortex-m0

On Thursday 03 March 2016 09:44:31 Ramana Radhakrishnan wrote: > On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme > > <thomas.preudho...@foss.arm.com> wrote: > > On Friday 15 January 2016 12:45:04 Ramana Radhakrishnan wrote: > >> On Wed, Dec 16, 2015

Re: [PATCH, ARM] Fix gcc.c-torture/execute/loop-2b.c execution failure on cortex-m0

On Thursday 03 March 2016 15:32:27 Thomas Preudhomme wrote: > On Thursday 03 March 2016 09:44:31 Ramana Radhakrishnan wrote: > > On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme > > > > <thomas.preudho...@foss.arm.com> wrote: > > > On Friday 15 January 2016

Re: [PATCH, ARM] Fix gcc.c-torture/execute/loop-2b.c execution failure on cortex-m0

On Thursday 03 March 2016 18:10:38 Thomas Preudhomme wrote: > On Thursday 03 March 2016 15:32:27 Thomas Preudhomme wrote: > > On Thursday 03 March 2016 09:44:31 Ramana Radhakrishnan wrote: > > > On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme > > > > > > &l

[PATCH, libstdc++] Add missing atomic-builtins argument to experimental/memory_resource/1.cc

Hi Jonathan, The dg-require-atomic-builtins in experimental/memory_resource/1.cc does not currently work as intended because it is missing its argument. This patch fixes that. ChangeLog entry is as follows: *** libstdc++-v3/ChangeLog *** 2016-05-18 Thomas Preud'homme

Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks

;) (set_attr "predicable_short_it" "no") diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index 3b71c4a527064290066348cb234c6abb8c8e2e43..4ece5f013c92adee04157b5c909e1d47c894c994 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constr

Re: [PATCH, ARM 5/7, ping1] Add support for MOVT/MOVW to ARMv8-M Baseline

de{LDRD} and @code{STRD} instructions over @code{LDM} and @code{STM} instructions. +@item arm_thumb1_movt_ko +ARM target generates Thumb-1 code for @code{-mthumb} with no +@code{MOVT} instruction available. + @end table @subsubsection AArch64-specific attributes diff --git a/gcc/testsuite/gcc.t

Re: [PATCH, libgcc/ARM 1/6, ping1] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

On Thursday 19 May 2016 17:42:26 Kyrill Tkachov wrote: > Hi Thomas, > > I'm not very familiar with the libgcc machinery, but I have a comment on an > arm.h hunk inline. > On 17/05/16 10:58, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > &

Re: [PATCH, ARM 7/7, ping1] Enable atomics for ARMv8-M Mainline

On Thursday 19 May 2016 17:18:29 Kyrill Tkachov wrote: > Hi Thomas, > > On 17/05/16 11:15, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-12-17 Thomas Preud'homme <thomas.preudho...@arm.com> > > > >

Re: [PATCH, ARM, ping1] Do not set ARM_ARCH_ISA_THUMB for armv5

Ping? Best regards, Thomas On Tuesday 10 May 2016 14:26:04 Thomas Preudhomme wrote: > Hi, > > ARM_ARCH_ISA_THUMB is currently set to 1 when compiling for armv5 despite > armv5 not supporting Thumb instructions (armv5t does): > > arm-none-eabi-gcc -dM -march=armv5 -E -

Re: [PATCH, libgcc/ARM 1/6, ping1] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

Ping? *** gcc/ChangeLog *** 2015-11-13 Thomas Preud'homme * config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to decide whether to prevent some libgcc routines being included for some multilibs rather than __ARM_ARCH_6M__ and

Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks

Ping? *** gcc/ChangeLog *** 2015-11-09 Thomas Preud'homme * config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability with TARGET_HAVE_MOVT. (TARGET_HAVE_MOVT): Define. * config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW

Re: [PATCH, ARM 3/7, ping1] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M

Ping? *** gcc/ChangeLog *** 2015-11-06 Thomas Preud'homme * config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index

Re: [PATCH, ARM 5/7, ping1] Add support for MOVT/MOVW to ARMv8-M Baseline

Ping? *** gcc/ChangeLog *** 2015-11-13 Thomas Preud'homme * config/arm/arm.h (TARGET_HAVE_MOVT): Include ARMv8-M as having MOVT. * config/arm/arm.c (arm_arch_name): (const_ok_for_op): Check MOVT/MOVW availability with TARGET_HAVE_MOVT.

Re: [PATCH, ARM 2/7, ping1] Add support for ARMv8-M

Ping? *** gcc/ChangeLog *** 2015-11-23 Thomas Preud'homme * config/arm/arm-arches.def (armv8-m.base): Define new architecture. (armv8-m.main): Likewise. (armv8-m.main+dsp): Likewise * config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE):

Re: [PATCH, ARM 6/7, ping1] Add support for CB(N)Z and (U|S)DIV to ARMv8-M Baseline

Ping? *** gcc/ChangeLog *** 2015-11-13 Thomas Preud'homme * config/arm/arm.c (arm_print_operand_punct_valid_p): Make %? valid for Thumb-1. * config/arm/arm.h (TARGET_HAVE_CBZ): Define. (TARGET_IDIV): Set for all Thumb targets

Re: [PATCH, ARM 7/7, ping1] Enable atomics for ARMv8-M Mainline

Ping? *** gcc/ChangeLog *** 2015-12-17 Thomas Preud'homme * config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for ARMv8-M Mainline. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index

Re: [PATCH, ARM 3/7, ping1] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M

On Wednesday 18 May 2016 11:30:43 Kyrill Tkachov wrote: > Hi Thomas, > > On 17/05/16 11:10, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-11-06 Thomas Preud'homme <thomas.preudho...@arm.com> > > > >

Re: [arm-embedded][PATCH, GCC/ARM, 2/3] Error out for incompatible ARM multilibs

On Friday 29 April 2016 16:07:23 Kyrill Tkachov wrote: > > Ok for trunk. > Thanks, > Kyrill Committed with the following obvious fix: > > >>> diff --git a/gcc/config.gcc b/gcc/config.gcc > >>> index 59aee2c..be3c720 100644 > >>> --- a/gcc/config.gcc > >>> +++ b/gcc/config.gcc > >>> @@

[PATCH, ARM] Do not set ARM_ARCH_ISA_THUMB for armv5

Hi, ARM_ARCH_ISA_THUMB is currently set to 1 when compiling for armv5 despite armv5 not supporting Thumb instructions (armv5t does): arm-none-eabi-gcc -dM -march=armv5 -E - < /dev/null | grep ISA_THUMB #define __ARM_ARCH_ISA_THUMB 1 The reason is TARGET_ARM_ARCH_ISA_THUMB being set to 1 if

Re: [arm-embedded][PATCH, GCC/ARM, 2/3] Error out for incompatible ARM multilibs

Ping? Best regards, Thomas On Thursday 17 December 2015 17:32:48 Thomas Preud'homme wrote: > Hi, > > We decided to apply the following patch to the ARM embedded 5 branch. > > Best regards, > > Thomas > > > -Original Message- > > From: gcc-patches-ow...@gcc.gnu.org

Re: [PATCH, libgcc/ARM 1/6, ping1] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

On Thursday 19 May 2016 18:01:16 Kyrill Tkachov wrote: > On 19/05/16 17:55, Thomas Preudhomme wrote: > > On Thursday 19 May 2016 17:42:26 Kyrill Tkachov wrote: > >> Hi Thomas, > >> > >> I'm not very familiar with the libgcc machinery, but I have a comment on > &

Re: [PATCH, ARM] Do not set ARM_ARCH_ISA_THUMB for armv5

On Tuesday 24 May 2016 18:00:27 Kyrill Tkachov wrote: > Hi Thomas, > > On 10/05/16 14:26, Thomas Preudhomme wrote: > > Hi, > > > > ARM_ARCH_ISA_THUMB is currently set to 1 when compiling for armv5 despite > > armv5 not supporting Thumb instructions (armv5t does

Re: [PATCH, ARM 2/7, ping1] Add support for ARMv8-M

gt; * config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M. Best regards, Thomas > > On 17/05/16 11:08, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-11-23 Thomas Preud'homme <thomas.preudho...@arm.com&

Re: [PATCH, ARM 7/7] Enable atomics for ARMv8-M Mainline

Hi Kyrill, On Thursday 19 May 2016 17:18:29 Kyrill Tkachov wrote: > Hi Thomas, > > On 17/05/16 11:15, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-12-17 Thomas Preud'homme <thomas.preudho...@arm.com> > >

Re: [PATCH, ARM 7/7] Enable atomics for ARMv8-M Mainline

On Thursday 14 July 2016 17:23:46 Kyrill Tkachov wrote: > Hi Thomas, > > On 14/07/16 14:37, Thomas Preudhomme wrote: > > Hi Kyrill, > > > > On Thursday 19 May 2016 17:18:29 Kyrill Tkachov wrote: > >> Hi Thomas, > >> > >>

Re: [PATCH, GCC/LRA] Teach LRA to not use same register value for multiple output operands of an insn

On Thursday 14 July 2016 10:32:48 Thomas Preudhomme wrote: > On Friday 08 July 2016 09:05:55 Mike Stump wrote: > > On Jul 8, 2016, at 8:07 AM, Thomas Preudhomme > > <thomas.preudho...@foss.arm.com> wrote: > > > While investigating the root cause a testsuite regressio

[arm-embedded] Backport of resolution handling fix WRT incremental linking

The following backport has been made from gcc-6-branch to ARM/embedded-5- branch in order to fix an ICE in LTO observed when running g++.dg/lto/20081219 testcase: 2016-07-27 Thomas Preud'homme Backport from mainline 2015-11-29 Jan Hubicka

Fwd: [PATCH, ARM] Use a MULTILIB_REQUIRED approach for aprofile multilib

Forwarding to gcc-patches which I forgot past patch #1 --- Begin Message --- Hi, Currently, the Makefile fragment for ARM aprofile multilib is using a substractive approach. It specifies a set of options to be combined (eg. -march=armv7-a,armv7ve,armv8-a, with

Fwd: [PATCH, doc/ARM] Remove false affirmation that Thumb cannot use an FPU

Forwarding to gcc-patches which I forgot past patch #1 --- Begin Message --- GCC documentation for MULTILIB_EXCEPTIONS states that ARM processors cannot use hardware floating-point in Thumb execution state. This is incorrect since ARMv7E-M processors can do just that. This patch replace this

Fwd: [PATCH] genmultilib: improve error reporting for MULTILIB_REUSE

Forwarding to gcc-patches which I forgot past patch #1 --- Begin Message --- Hi, It was discovered while working on ARM's aprofile multilib Makefile fragment that some REUSE rules were mentioning on the RHS options not in MULTILIB_OPTIONS. This is not supposed to happen and leads to

[PATCH, ARM] Fix aprofile multilib mappings

Hi, Mappings (MULTILIB_MATCHES and MULTILIB_REUSE) in ARM aprofile multilib suffer from a number of issues: * missing mapping of -mcpu=cortex-a7 to -march=armv7-a * typo on vfpv3-d16-fp16 (MULTILIB_MATCHES uses vfpv3-fp16-d16 instead) * missing mapping for neon-fp16, fpv5-d16 and fp-armv8 to

Re: Fwd: [PATCH, doc/ARM] Remove false affirmation that Thumb cannot use an FPU

xample with preventing combination of -mfloat-abi=soft with any -mfpu option. Best regards, Thomas On 11/08/16 04:09, Sandra Loosemore wrote: On 08/10/2016 09:51 AM, Thomas Preudhomme wrote: diff --git a/gcc/doc/fragments.texi b/gcc/doc/fragments.texi index b6d8541c8ca820fa732363a05221e2cd4d

[PATCH, libstdc++] Fixed PR72840: dg-error syntax in 20_util/ratio/cons/cons_overflow_neg.cc as obvious

Libstdc++-v3's test 20_util/ratio/cons/cons_overflow_neg.cc is missing closing curly braces for 2 dg-error directives, making them be ignored by dejagnu. Fixed as obvious. ChangeLog entry is as follows: *** libstdc++-v3/ChangeLog *** 2016-08-15 Thomas Preud'homme

Re: [PATCH, ARM 6/7, ping1] Add support for CB(N)Z and (U|S)DIV to ARMv8-M Baseline

Hi Kyrill, On Friday 20 May 2016 14:22:48 Kyrill Tkachov wrote: > Hi Thomas, > > On 17/05/16 11:14, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-11-13 Thomas Preud'homme <thomas.preudho...@arm

[PATCH, GCC/ARM testsuite] Fix pr42574.c selector syntax error

This patch fixes a syntax error in the dg-do selector of pr42574.c: it is missing the target keyword, with the following boolean expression enclosed in curly braces. Test fails to be run without this patch and successfully pass with it. Patch is in attachment. ChangeLog entry is as follows:

Re: [PATCH, GCC/LRA] Teach LRA to not use same register value for multiple output operands of an insn

On Friday 08 July 2016 09:05:55 Mike Stump wrote: > On Jul 8, 2016, at 8:07 AM, Thomas Preudhomme <thomas.preudho...@foss.arm.com> wrote: > > While investigating the root cause a testsuite regression for the > > ARM/embedded-5-branch GCC in gcc.dg/vect/slp-perm-5.c, we f

Re: [PATCH, GCC/ARM testsuite] Fix pr42574.c selector syntax error

On Thursday 14 July 2016 10:14:52 Kyrill Tkachov wrote: > Hi Thomas, > > On 14/07/16 10:12, Thomas Preudhomme wrote: > > This patch fixes a syntax error in the dg-do selector of pr42574.c: it is > > missing the target keyword, with the following boolean expression enclose

[arm-embedded] [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks

We've decided to apply the following patch to ARM/embedded-6-branch. Best regards, Thomas -- Forwarded Message -- Subject: Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks Date: Thursday 07 July 2016, 09:59:53 From: Thomas Preudhomme

[arm-embedded] [PATCH, ARM 3/7, ping1] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M

: Kyrill Tkachov <kyrylo.tkac...@foss.arm.com> To: Thomas Preudhomme <thomas.preudho...@foss.arm.com> CC: ramana.radhakrish...@arm.com, richard.earns...@arm.com, gcc- patc...@gcc.gnu.org On 18/05/16 14:45, Thomas Preudhomme wrote: > On Wednesday 18 May 2016 11:30:43 Kyrill Tkachov wrot

[arm-embedded] [PATCH, ARM 2/7, ping1] Add support for ARMv8-M

We've decided to apply the following patch to ARM/embedded-6-branch. Best regards, Thomas -- Forwarded Message -- Subject: Re: [PATCH, ARM 2/7, ping1] Add support for ARMv8-M Date: Thursday 07 July 2016, 09:57:08 From: Thomas Preudhomme <thomas.preudho...@foss.arm.

[arm-embedded] [PATCH, libgcc/ARM 1/6] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

mana Radhakrishnan <ramana@googlemail.com> To: Thomas Preudhomme <thomas.preudho...@foss.arm.com> CC: gcc-patches <gcc-patches@gcc.gnu.org> On Mon, Jun 27, 2016 at 5:51 PM, Thomas Preudhomme <thomas.preudho...@foss.arm.com> wrote: > Hi Ramana, > > On Wednesday 01 Ju

[arm-embedded] [PATCH, libgcc/ARM 1a/6] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

mana Radhakrishnan <ramana@googlemail.com> To: Thomas Preudhomme <thomas.preudho...@foss.arm.com> CC: gcc-patches <gcc-patches@gcc.gnu.org> On Fri, Jun 17, 2016 at 6:21 PM, Thomas Preudhomme <thomas.preudho...@foss.arm.com> wrote: > On Wednesday 01 June 2016 10:0

Re: [PATCH, ARM 6/7, ping1] Add support for CB(N)Z and (U|S)DIV to ARMv8-M Baseline

On Tuesday 12 July 2016 15:57:41 Kyrill Tkachov wrote: > On 12/07/16 11:26, Thomas Preudhomme wrote: > > Hi Kyrill, > > Hi Thomas, > > > On Friday 20 May 2016 14:22:48 Kyrill Tkachov wrote: > >> Hi Thomas, > >> > >> On 17/05/16 11:14, Thomas

Re: [PATCH, ARM 5/7] Add support for MOVT/MOVW to ARMv8-M Baseline

On Wednesday 13 July 2016 17:14:52 Christophe Lyon wrote: > Hi Thomas, Hi Christophe, > > I'm seeing: > gcc.target/arm/pr42574.c: syntax error in target selector > "arm_thumb1_ok && { ! arm_thumb1_movt_ok }" for " dg-do 1 compile { > arm_thumb1_ok && { ! arm_thumb1_movt_ok } } " Oops. I

Re: [PATCH, libgcc/ARM 1b/7] Check CLZ availability with ISA support and architecture level macros

[Fixed subject to reflect patch] Ping? Best regards, Thomas On Monday 27 June 2016 17:51:34 Thomas Preudhomme wrote: > Hi Ramana, > > On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote: > > From here down to > > > > > -#if ((__ARM_ARCH__ &g

Re: [PATCH, ARM 5/7] Add support for MOVT/MOVW to ARMv8-M Baseline

May 2016 12:14:44 Kyrill Tkachov wrote: > Hi Thomas, > > On 19/05/16 17:11, Thomas Preudhomme wrote: > > On Wednesday 18 May 2016 12:30:41 Kyrill Tkachov wrote: > >> Hi Thomas, > >> > >> This looks mostly good with a few nits inline. > >

[PATCH, GCC/LRA] Teach LRA to not use same register value for multiple output operands of an insn

Hi, While investigating the root cause a testsuite regression for the ARM/embedded-5-branch GCC in gcc.dg/vect/slp-perm-5.c, we found that the bug seems to also affect trunk. The bug manifests itself as an ICE in cselib due to a parallel insn with two SET to the same register. When processing

Re: [PATCH, ARM 6/7, ping1] Add support for CB(N)Z and (U|S)DIV to ARMv8-M Baseline

On Friday 20 May 2016 14:22:48 Kyrill Tkachov wrote: > Hi Thomas, > > > Hmm, I'm not a fan of this change. arm_print_operand_punct_valid_p is an > implementation of a target hook that is used to validate user-provided > inline asm as well and is therefore the right place to reject such invalid

Re: [PATCH, ARM 2/7, ping1] Add support for ARMv8-M

On Wednesday 25 May 2016 14:32:54 Kyrill Tkachov wrote: > Hi Thomas, > > On 25/05/16 14:26, Thomas Preudhomme wrote: > > On Thursday 19 May 2016 17:59:26 Kyrill Tkachov wrote: > >> Hi Thomas, > > > > Hi Kyrill, > > > > Please find an update

Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks

On Friday 20 May 2016 13:41:30 Kyrill Tkachov wrote: > Hi Thomas, > > On 19/05/16 17:10, Thomas Preudhomme wrote: > > On Wednesday 18 May 2016 11:47:47 Kyrill Tkachov wrote: > >> Hi Thomas, > > > > Hi Kyrill, > > > > Please find below

Re: [PATCH, libstdc++/testsuite, ping2] 29_atomics/atomic/65913.cc: require atomic-builtins rather than specific target

On Wednesday 29 June 2016 21:58:40 Jonathan Wakely wrote: > On 29/06/16 13:49 -0700, Mike Stump wrote: > >Please include the libstdc++ list, they don't all read the other list. > > And the documentation clearly says (in two places) that all libstdc++ > patches must go to the libstdc++ list. Oops

Re: [PATCH, libgcc/ARM 1a/6, ping2] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

Ping? Best regards, Thomas On Monday 27 June 2016 16:52:50 Thomas Preudhomme wrote: > Ping? > > Best regards, > > Thomas > > On Friday 17 June 2016 18:21:44 Thomas Preudhomme wrote: > > On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote: > > >

Re: [PATCH, libstdc++/testsuite, ping2] 29_atomics/atomic/65913.cc: require atomic-builtins rather than specific target

Ping? Best regards, Thomas On Thursday 02 June 2016 14:34:03 Thomas Preudhomme wrote: > Ping? > > On Thursday 26 May 2016 14:00:55 Thomas Preudhomme wrote: > > [Sorry for the large recipient list, I wasn't sure who of C++ and x86 > > maintainers should appr

Re: Fwd: [PATCH, doc/ARM, ping] Remove false affirmation that Thumb cannot use an FPU

Ping? Best regards, Thomas On 11/08/16 11:31, Thomas Preudhomme wrote: Hi Sandra, Thanks for your feedback. Please find an updated version attached to this email. ChangeLog entry is unchanged: *** gcc/ChangeLog *** 2016-08-02 Thomas Preud'homme <thomas.preudho...@arm.com>

Re: [PATCH, wwwdocs/ARM] Mention new rmprofile value for --with-multilib-list

Looks good, thanks Gerald! Best regards, Thomas On 01/02/17 19:23, Gerald Pfeifer wrote: On Mon, 30 Jan 2017, Thomas Preudhomme wrote: ARM backend now support a new set of multilib libraries enabled with --with-multilib-list=rmprofile [1]. This patch documents it in the changes for GCC 7

Re: [PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

Hi JonY, On 19/01/17 01:37, JonY wrote: On 01/18/2017 09:48 AM, Thomas Preudhomme wrote: By default, wildcard support on Windows for programs compiled with mingw depends on how the mingw runtime was configured. This means if one wants to build GCC for Windows with a consistent behavior

[PATCH, wwwdocs/ARM] Mention new rmprofile value for --with-multilib-list

Hi, ARM backend now support a new set of multilib libraries enabled with --with-multilib-list=rmprofile [1]. This patch documents it in the changes for GCC 7. [1] https://gcc.gnu.org/viewcvs/gcc?view=revision=r242696 Is this ok for wwwdocs? Best regards, Thomas Index:

Re: [PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

Oh great thanks! Best regards, Thomas On 17/02/17 22:52, JonY wrote: On 02/17/2017 11:31 AM, Thomas Preudhomme wrote: Here you are: 2017-01-24 Thomas Preud'homme <thomas.preudho...@arm.com> * configure.ac (--enable-mingw-wildcard): Add new configurable f

Re: [PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

Hi Jonathan, Sorry for the delay answering. On 07/02/17 08:47, JonY wrote: On 01/26/2017 01:04 PM, Thomas Preudhomme wrote: Hi JonY, On 19/01/17 01:37, JonY wrote: On 01/18/2017 09:48 AM, Thomas Preudhomme wrote: By default, wildcard support on Windows for programs compiled with mingw

[PATCH, wwwdocs/ARM] Deprecate ARMv5 and ARMv5E support

Hi, ARMv5 and ARMv5E architectures have no known implementation. I therefore suggest that we deprecate these architectures. ARMv5T, ARMv5TE and ARMv5TEJ would remain supported though. Is this ok to commit? Best regards, Thomas cvs diff: Diffing . cvs diff: Diffing benchmarks cvs diff:

Re: [PATCH, wwwdocs/ARM] Deprecate ARMv5 and ARMv5E support

Thanks. Committed with the mentioned change. Patch in attachment for reference. Best regards, Thomas On 15/02/17 11:26, Richard Earnshaw (lists) wrote: On 15/02/17 11:23, Thomas Preudhomme wrote: Hi, ARMv5 and ARMv5E architectures have no known implementation. I therefore suggest that we

[PATCH, libstdc++-v3] Fix 69301.cc FAIL: require atomic builtins

Hi, 69301.cc C++ test uses atomic features but fail to require atomic builtins. This causes the test to fail on ARMv6-M instead of being skipped. Fixed as obvious. ChangeLog entry is as follows: *** libstdc++-v3/ChangeLog *** 2017-01-23 Thomas Preud'homme

Re: [PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

wrote: On 02/14/2017 09:32 AM, Thomas Preudhomme wrote: Looks good, be sure to emphasize this option affects mingw hosted GCC only, not the compiler output. I think that should be pretty clear in the latest version of the patch, doc/install.texi contains: "Note that this option only affec

[PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

By default, wildcard support on Windows for programs compiled with mingw depends on how the mingw runtime was configured. This means if one wants to build GCC for Windows with a consistent behavior with Wildcard (enabled or disabled) the mingw runtime must be built as well. This patch adds an

Re: [PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

Hi JonY, On 19/01/17 01:37, JonY wrote: On 01/18/2017 09:48 AM, Thomas Preudhomme wrote: By default, wildcard support on Windows for programs compiled with mingw depends on how the mingw runtime was configured. This means if one wants to build GCC for Windows with a consistent behavior

Re: Fwd: [PATCH] genmultilib: improve error reporting for MULTILIB_REUSE

On 18/08/16 17:39, Jeff Law wrote: On 08/10/2016 09:51 AM, Thomas Preudhomme wrote: *** gcc/ChangeLog *** 2016-08-01 Thomas Preud'homme <thomas.preudho...@arm.com> * doc/fragments.texi (MULTILIB_REUSE): Mention that only options in MULTILIB_OPTIONS should be used.

[PATCH, GCC/LTO] Fix PR69866: LTO with def for weak alias in regular object file

Hi, This patch fixes an assert failure when linking one LTOed object file having a weak alias with a regular object file containing a strong definition for that same symbol. The patch is twofold: + do not add an alias to a partition if it is external + do not declare (.globl) an alias if it is

Re: [PATCH, ARM, ping2] Fix aprofile multilib mappings

Hi, Ping? Best regards, Thomas On 17/08/16 10:55, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 10/08/16 14:28, Thomas Preudhomme wrote: Hi, Mappings (MULTILIB_MATCHES and MULTILIB_REUSE) in ARM aprofile multilib suffer from a number of issues: * missing mapping of -mcpu

Re: Fwd: [PATCH] genmultilib: improve error reporting for MULTILIB_REUSE

On 18/08/16 17:39, Jeff Law wrote: On 08/10/2016 09:51 AM, Thomas Preudhomme wrote: *** gcc/ChangeLog *** 2016-08-01 Thomas Preud'homme <thomas.preudho...@arm.com> * doc/fragments.texi (MULTILIB_REUSE): Mention that only options in MULTILIB_OPTIONS should be used.

Re: [PATCH, ARM] Fix aprofile multilib mappings

On 24/08/16 09:13, Ramana Radhakrishnan wrote: On 10/08/16 14:28, Thomas Preudhomme wrote: Hi, Mappings (MULTILIB_MATCHES and MULTILIB_REUSE) in ARM aprofile multilib suffer from a number of issues: * missing mapping of -mcpu=cortex-a7 to -march=armv7-a You mean -march=armv7ve... Yes

[arm-embedded] [PATCH, ARM 7/7] Enable atomics for ARMv8-M Mainline

Hi, We've decided to apply the following patch to ARM/embedded-6-branch. Best regards, Thomas Forwarded Message Subject: Re: [PATCH, ARM 7/7] Enable atomics for ARMv8-M Mainline Date: Thu, 14 Jul 2016 17:34:44 +0100 From: Thomas Preudhomme <thomas.preudho...@foss.arm.

Re: [PATCH, GCC/LRA] Teach LRA to not use same register value for multiple output operands of an insn

Hi Vladimir & release managers, The patch applies cleanly to gcc-6-branch. Ok to backport? Best regards, Thomas On 14/07/16 17:25, Vladimir Makarov wrote: On 07/08/2016 11:07 AM, Thomas Preudhomme wrote: Hi, While investigating the root cause a testsuite regression for the ARM/embedd

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On 26/09/16 11:53, Richard Biener wrote: On Mon, 26 Sep 2016, Thomas Preudhomme wrote: On 26/09/16 10:15, Richard Biener wrote: On Thu, 22 Sep 2016, Thomas Preudhomme wrote: Hi, This patch is part of a patch series to add support for ARMv8-M[1] to GCC. This specific patch moves memory

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On 26/09/16 18:22, Thomas Preudhomme wrote: I committed as is because emit-rtl.h uses enum memmodel so all files that includes it must be updated. This gets worse because tm.h uses emit-rtl.h so all target needs to be updated as well. The diff was becoming big so I decided to keep it separate

Re: Early jump threading

On 19/09/16 08:02, Christophe Lyon wrote: Index: testsuite/gcc.dg/tree-ssa/pr68198.c === --- testsuite/gcc.dg/tree-ssa/pr68198.c (revision 240109) +++ testsuite/gcc.dg/tree-ssa/pr68198.c (working copy) @@ -1,5 +1,5 @@ /* { dg-do

Re: [PATCH, GCC/LRA] Teach LRA to not use same register value for multiple output operands of an insn

on trunk for long enough ;-) Best regards. Thomas On 19/09/16 16:05, Vladimir N Makarov wrote: On 07/08/2016 11:07 AM, Thomas Preudhomme wrote: Hi, While investigating the root cause a testsuite regression for the ARM/embedded-5-branch GCC in gcc.dg/vect/slp-perm-5.c, we found that the bug seems

[PATCH, GCC] Deal with singular sentences in builtin-sprintf-warn-1.c regex

Hi, New builtin-sprintf-warn-1.c testcase contains a few regex of the form "\[0-9\]+ bytes" or ". bytes". This does not account for the case where the number of byte is 0 in which case byte would be in the singular form. This caused a FAIL on arm-none-eabi targets. This patch makes the s

Re: [PATCH, GCC] Deal with singular sentences in builtin-sprintf-warn-1.c regex

Sorry, forgot the patch. Please find it attached. Best regards, Thomas On 23/09/16 16:40, Thomas Preudhomme wrote: Hi, New builtin-sprintf-warn-1.c testcase contains a few regex of the form "\[0-9\]+ bytes" or ". bytes". This does not account for the case where the

[PATCH] Fix builtin-sprintf-warn-2.c xfail pattern

The new builtin-sprintf-warn-2.c xfail on line 83 and 84 for *-*-*-* which fails for arm-none-eabi for instance. The usual pattern for catchall xfail is *-*-*. This patch fixes the pattern as such. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2016-09-23 Thomas Preud'homme

Re: [PATCH, GCC] Deal with singular sentences in builtin-sprintf-warn-1.c regex

Hi Martin, On 23/09/16 17:17, Martin Sebor wrote: On 09/23/2016 09:42 AM, Thomas Preudhomme wrote: Sorry, forgot the patch. Please find it attached. Best regards, Thomas On 23/09/16 16:40, Thomas Preudhomme wrote: Hi, New builtin-sprintf-warn-1.c testcase contains a few regex of the form

Re: [PATCH, ARM/testsuite 6/7] Force soft float in ARMv6-M and ARMv8-M Baseline options

Sorry, noticed an error in the patch. It was not caught during testing because GCC was built with --with-mode=thumb. Correct patch attached. Best regards, Thomas On 22/09/16 14:49, Thomas Preudhomme wrote: Hi, ARMv6-M and ARMv8-M Baseline only support soft float ABI. Therefore

Re: [PATCH, ARM/testsuite 6/7] Force soft float in ARMv6-M and ARMv8-M Baseline options

On 22/09/16 16:47, Richard Earnshaw (lists) wrote: On 22/09/16 15:51, Thomas Preudhomme wrote: Sorry, noticed an error in the patch. It was not caught during testing because GCC was built with --with-mode=thumb. Correct patch attached. Best regards, Thomas On 22/09/16 14:49, Thomas

[PATCH, ARM 4/7] Adapt atomic compare and swap to ARMv8-M Baseline

Hi, This patch is part of a patch series to add support for atomic operations on ARMv8-M Baseline targets in GCC. This specific patch makes the necessary change for compare and swap to work for ARMv8-M Baseline, doubleword integers excepted. Namely, it adds Thumb-1 specific constraints to

[PATCH, ARM/testsuite 6/7] Force soft float in ARMv6-M and ARMv8-M Baseline options

Hi, ARMv6-M and ARMv8-M Baseline only support soft float ABI. Therefore, the arm_arch_v8m_base add option should pass -mfloat-abi=soft, much like -mthumb is passed for architectures that only support Thumb instruction set. This patch adds -mfloat-abi=soft to both arm_arch_v6m and

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