Sorry, forgot the patch. Please find it attached.
Best regards,
Thomas
On 23/09/16 16:40, Thomas Preudhomme wrote:
Hi,
New builtin-sprintf-warn-1.c testcase contains a few regex of the form "\[0-9\]+
bytes" or ". bytes". This does not account for the case where the nu
The new builtin-sprintf-warn-2.c xfail on line 83 and 84 for *-*-*-* which fails
for arm-none-eabi for instance. The usual pattern for catchall xfail is *-*-*.
This patch fixes the pattern as such.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2016-09-23 Thomas Preud'homme
Hi Martin,
On 23/09/16 17:17, Martin Sebor wrote:
On 09/23/2016 09:42 AM, Thomas Preudhomme wrote:
Sorry, forgot the patch. Please find it attached.
Best regards,
Thomas
On 23/09/16 16:40, Thomas Preudhomme wrote:
Hi,
New builtin-sprintf-warn-1.c testcase contains a few regex of the form
How about this reworked patch?
Best regards,
Thomas
On 23/09/16 17:17, Martin Sebor wrote:
On 09/23/2016 09:42 AM, Thomas Preudhomme wrote:
Sorry, forgot the patch. Please find it attached.
Best regards,
Thomas
On 23/09/16 16:40, Thomas Preudhomme wrote:
Hi,
New builtin-sprintf-warn-1.c
On 26/09/16 10:15, Richard Biener wrote:
On Thu, 22 Sep 2016, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for ARMv8-M[1] to GCC.
This specific patch moves memory model declarations in memmodel.h.
Currently, is_mm_* memory model related functions are
On 26/09/16 11:53, Richard Biener wrote:
On Mon, 26 Sep 2016, Thomas Preudhomme wrote:
On 26/09/16 10:15, Richard Biener wrote:
On Thu, 22 Sep 2016, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for ARMv8-M[1] to GCC.
This specific patch moves memory
On 26/09/16 18:22, Thomas Preudhomme wrote:
I committed as is because emit-rtl.h uses enum memmodel so all files that
includes it must be updated. This gets worse because tm.h uses emit-rtl.h so all
target needs to be updated as well. The diff was becoming big so I decided to
keep it separate
Ping?
Best regards,
Thomas
On 22/09/16 14:41, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch adapts atomic and exclusive
load and store patterns to the constraints of ARMv8-M
Ping?
Best regards,
Thomas
On 22/09/16 14:44, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch refactors the expander and
splitter for atomics to make the logic work with ARMv8-M
Ping?
Best regards,
Thomas
On 22/09/16 14:46, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch makes the necessary change
for compare and swap to work for ARMv8-M Baseline
Ping?
Best regards,
Thomas
On 22/09/16 14:47, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch adds support for remaining
atomic operations (exchange, addition, substraction, bitwise
On 22/09/16 17:15, Thomas Preudhomme wrote:
On 22/09/16 16:47, Richard Earnshaw (lists) wrote:
On 22/09/16 15:51, Thomas Preudhomme wrote:
Sorry, noticed an error in the patch. It was not caught during testing
because GCC was built with --with-mode=thumb. Correct patch attached.
Best regards
Ping?
Best regards,
Thomas
On 22/09/16 14:50, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch enables atomic and
synchronization support added in previous patches of the series and
I've applied the following commit as obvious to fix builtin-sprintf-warn-4.c
excess error failure on arm-none-eabi due to incorrect wildchar target triplet.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2016-10-11 Thomas Preud'homme
PR testsuite/PR77710
* g
On 10/10/16 13:35, Christophe Lyon wrote:
Hi Thomas,
Hi Christophe,
On 13 July 2016 at 17:34, Thomas Preudhomme
wrote:
On Wednesday 13 July 2016 17:14:52 Christophe Lyon wrote:
Hi Thomas,
Hi Christophe,
I'm seeing:
gcc.target/arm/pr42574.c: syntax error in target sel
Hi,
As reported by Christophe Lyon, gcc.target/arm/movdi_movw test fails on big
endian targets. This is because on big endian targets the low bits of a 64bit
value would be in the highest numbered register of a pair rather than the lowest
numbered register as on little endian targets. This pat
Sorry :-(
Here you are.
Cheers,
Thomas
On 12/10/16 16:25, Kyrill Tkachov wrote:
On 12/10/16 16:21, Thomas Preudhomme wrote:
Hi,
As reported by Christophe Lyon, gcc.target/arm/movdi_movw test fails on big
endian targets. This is because on big endian targets the low bits of a 64bit
value
On 12/10/16 17:01, Christophe Lyon wrote:
On 12 October 2016 at 17:50, Kyrill Tkachov wrote:
On 12/10/16 16:29, Thomas Preudhomme wrote:
Sorry :-(
Here you are.
Cheers,
Thomas
On 12/10/16 16:25, Kyrill Tkachov wrote:
On 12/10/16 16:21, Thomas Preudhomme wrote:
Hi,
As reported by
Hi,
This patch is a follow up of [1] which aims to have all memory model related
declarations in memmodel.h. To achieve that, this patch moves memory model
related declaration from coretypes.h into memmodel.h. Note that since memmodel.h
is now included from libgcc it needs to have a runtime li
On 12/10/16 21:00, Joseph Myers wrote:
On Wed, 12 Oct 2016, Thomas Preudhomme wrote:
This patch is a follow up of [1] which aims to have all memory model related
declarations in memmodel.h. To achieve that, this patch moves memory model
related declaration from coretypes.h into memmodel.h
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and allowing it to be built alongside multilib for A profile ARM
architectures. This specific patch adds the t-rmprofile multilib Makefile
fragment for the former objective. Multilib are bui
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and allowing it to be built alongside multilib for A profile ARM
architectures. This specific patch is concerned with the latter. The patch works
by moving the bits shared by both aprofile a
Ping?
Best regards,
Thomas
On 03/10/16 17:42, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:41, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch adapts
Ping?
Best regards,
Thomas
On 03/10/16 17:45, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:46, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch makes the
Ping?
Best regards,
Thomas
On 03/10/16 17:44, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:44, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch refactors
Ping?
Best regards,
Thomas
On 03/10/16 17:45, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:47, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch adds support
Ping?
Best regards,
Thomas
On 03/10/16 17:46, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:50, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic operations on
ARMv8-M Baseline targets in GCC. This specific patch enables
Ping?
Best regards,
Thomas
On 14/10/16 14:48, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:42, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:41, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic
Ping?
Best regards,
Thomas
On 14/10/16 14:50, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:44, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:44, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic
Ping?
Best regards,
Thomas
On 14/10/16 14:50, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:45, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:46, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic
Ping?
Best regards,
Thomas
On 14/10/16 14:51, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:45, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:47, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic
Ping?
Best regards,
Thomas
On 14/10/16 14:51, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:46, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14:50, Thomas Preudhomme wrote:
Hi,
This patch is part of a patch series to add support for atomic
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and allowing it to be built alongside multilib for A profile ARM
architectures. This specific patch is concerned with
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and allowing it to be built alongside multilib for A profile ARM
architectures. This specific patch adds the t
Hi Kyrill,
On 24/10/16 17:40, Kyrill Tkachov wrote:
Hi Thomas,
On 24/10/16 09:04, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 14/10/16 14:48, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:42, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22
Hi,
Currently when a user compiles for a thumb-only target (such as Cortex-M
processors) without specifying the -mthumb option GCC throws the error "target
CPU does not support ARM mode". This is suboptimal from a usability point of
view: the -mthumb could be deduced from the -march or -mcpu o
Hi,
This patch adds support for the Cortex-M33 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Mainline with DSP
extensions architecture and arm_v7m_tune tuning parameters for the time being.
It also updates documentation to mention this new pr
Hi,
This patch adds support for the Cortex-M23 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Baseline
architecture and arm_v6m_tune tuning parameters for the time being. It also
updates documentation to mention this new processor.
[1] http:
On 27/10/16 10:05, Kyrill Tkachov wrote:
Hi Thomas,
On 24/10/16 09:06, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 14/10/16 14:51, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:46, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14
On 27/10/16 09:50, Kyrill Tkachov wrote:
Hi Thomas,
On 24/10/16 09:05, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 14/10/16 14:51, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 03/10/16 17:45, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 22/09/16 14
On 22/09/16 17:41, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry I meant ARM/embedded-5-branch. This has just been applied on
ARM/embedded-6-branch as well 2 days ago (2016-10-25).
Best regards,
Thomas
On 22/09/16 17:41, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry I meant ARM/embedded-5-branch. This has just been applied on
ARM/embedded-6-branch as well 1 day ago (2016-10-26).
Best regards,
Thomas
On 22/09/16 17:41, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry I meant ARM/embedded-5-branch. This has just been applied on
ARM/embedded-6-branch as well 1 day ago (2016-10-26).
Best regards,
Thomas
On 22/09/16 17:42, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry I meant ARM/embedded-5-branch. This has just been applied on
ARM/embedded-6-branch as well 1 day ago (2016-10-26).
Best regards,
Thomas
On 22/09/16 17:42, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry I meant ARM/embedded-5-branch. This has just been applied on
ARM/embedded-6-branch as well today.
Best regards,
Thomas
On 22/09/16 17:42, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry, I meant ARM/embedded-5-branch.
Best regards,
Thomas
On 22/09/16 17:43, Thomas Preudhomme wrote:
Hi,
We've decided to apply the following patch to ARM/embedded-6-branch.
Sorry I meant ARM/embedded-5-branch. This has just been applied on
ARM/embedded-6-branch as well today.
Best regards,
Thomas
Hi Kyrill,
On 27/10/16 10:45, Kyrill Tkachov wrote:
Hi Thomas,
On 24/10/16 09:06, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and
On 22/09/16 16:47, Richard Earnshaw (lists) wrote:
On 22/09/16 15:51, Thomas Preudhomme wrote:
Sorry, noticed an error in the patch. It was not caught during testing
because GCC was built with --with-mode=thumb. Correct patch attached.
Best regards,
Thomas
On 22/09/16 14:49, Thomas
Ping?
Best regards,
Thomas
On 28/10/16 10:49, Thomas Preudhomme wrote:
On 22/09/16 16:47, Richard Earnshaw (lists) wrote:
On 22/09/16 15:51, Thomas Preudhomme wrote:
Sorry, noticed an error in the patch. It was not caught during testing
because GCC was built with --with-mode=thumb. Correct
Ping?
Best regards,
Thomas
On 27/10/16 15:26, Thomas Preudhomme wrote:
Hi Kyrill,
On 27/10/16 10:45, Kyrill Tkachov wrote:
Hi Thomas,
On 24/10/16 09:06, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset
Ping?
Best regards,
Thomas
On 24/10/16 09:07, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and allowing it to be built alongside
Ping?
Best regards,
Thomas
On 26/10/16 17:42, Thomas Preudhomme wrote:
Hi,
This patch adds support for the Cortex-M33 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Mainline with DSP
extensions architecture and arm_v7m_tune tuning parameters
Ping?
Best regards,
Thomas
On 26/10/16 17:42, Thomas Preudhomme wrote:
Hi,
This patch adds support for the Cortex-M23 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Baseline
architecture and arm_v6m_tune tuning parameters for the time being
Hi,
When saving registers, function thumb1_expand_prologue () aims at minimizing the
number of push instructions. One of the optimization it does is to push lr
alongside high register(s) (after having moved them to low register(s)) when
there is no low register to save. The way this is impleme
Hi,
When using a callee-saved register to save the frame pointer the Thumb-1
prologue fails to save the callee-saved register before that. For ARM and
Thumb-2 targets the frame pointer is handled as a special case but nothing is
done for Thumb-1 targets. This patch adds the same logic for Thum
On Wednesday 29 June 2016 21:58:40 Jonathan Wakely wrote:
> On 29/06/16 13:49 -0700, Mike Stump wrote:
> >Please include the libstdc++ list, they don't all read the other list.
>
> And the documentation clearly says (in two places) that all libstdc++
> patches must go to the libstdc++ list.
Oops
Ping?
Best regards,
Thomas
On Monday 27 June 2016 16:52:50 Thomas Preudhomme wrote:
> Ping?
>
> Best regards,
>
> Thomas
>
> On Friday 17 June 2016 18:21:44 Thomas Preudhomme wrote:
> > On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote:
> > >
[Fixed subject to reflect patch]
Ping?
Best regards,
Thomas
On Monday 27 June 2016 17:51:34 Thomas Preudhomme wrote:
> Hi Ramana,
>
> On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote:
> > From here down to
> >
> > > -#if ((__ARM_ARCH__ &g
On Friday 20 May 2016 14:22:48 Kyrill Tkachov wrote:
> Hi Thomas,
>
>
> Hmm, I'm not a fan of this change. arm_print_operand_punct_valid_p is an
> implementation of a target hook that is used to validate user-provided
> inline asm as well and is therefore the right place to reject such invalid
>
On Wednesday 25 May 2016 14:32:54 Kyrill Tkachov wrote:
> Hi Thomas,
>
> On 25/05/16 14:26, Thomas Preudhomme wrote:
> > On Thursday 19 May 2016 17:59:26 Kyrill Tkachov wrote:
> >> Hi Thomas,
> >
> > Hi Kyrill,
> >
> > Please find an updated p
On Friday 20 May 2016 13:41:30 Kyrill Tkachov wrote:
> Hi Thomas,
>
> On 19/05/16 17:10, Thomas Preudhomme wrote:
> > On Wednesday 18 May 2016 11:47:47 Kyrill Tkachov wrote:
> >> Hi Thomas,
> >
> > Hi Kyrill,
> >
> > Please find below
gt; >
> > (define_insn "*thumb1_movhi_insn"
> >
> > - [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
> > - (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
> > + [(set (match_operand:HI 0
Hi,
While investigating the root cause a testsuite regression for the
ARM/embedded-5-branch GCC in gcc.dg/vect/slp-perm-5.c, we found that the bug
seems to also affect trunk. The bug manifests itself as an ICE in cselib due to
a parallel insn with two SET to the same register. When processing t
m: Ramana Radhakrishnan
To: Thomas Preudhomme
CC: gcc-patches
On Fri, Jun 17, 2016 at 6:21 PM, Thomas Preudhomme
wrote:
> On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote:
>> Please fix up the macros, post back and redo the test. Otherwise this
>> is ok from a quick
m: Ramana Radhakrishnan
To: Thomas Preudhomme
CC: gcc-patches
On Mon, Jun 27, 2016 at 5:51 PM, Thomas Preudhomme
wrote:
> Hi Ramana,
>
> On Wednesday 01 June 2016 10:00:52 Ramana Radhakrishnan wrote:
>>
>> From here down to
>>
>> > -#if ((
We've decided to apply the following patch to ARM/embedded-6-branch.
Best regards,
Thomas
-- Forwarded Message --
Subject: Re: [PATCH, ARM 2/7, ping1] Add support for ARMv8-M
Date: Thursday 07 July 2016, 09:57:08
From: Thomas Preudhomme
To: Kyrill Tkachov
CC: Ri
We've decided to apply the following patch to ARM/embedded-6-branch.
Best regards,
Thomas
-- Forwarded Message --
Subject: Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and
desirability checks
Date: Thursday 07 July 2016, 09:59:53
From: Thomas Preudhomm
From: Kyrill Tkachov
To: Thomas Preudhomme
CC: ramana.radhakrish...@arm.com, richard.earns...@arm.com, gcc-
patc...@gcc.gnu.org
On 18/05/16 14:45, Thomas Preudhomme wrote:
> On Wednesday 18 May 2016 11:30:43 Kyrill Tkachov wrote:
>> Hi Thomas,
>>
>> On 17/05/16 11:10, Thomas
Hi Kyrill,
On Friday 20 May 2016 14:22:48 Kyrill Tkachov wrote:
> Hi Thomas,
>
> On 17/05/16 11:14, Thomas Preudhomme wrote:
> > Ping?
> >
> > *** gcc/ChangeLog ***
> >
> > 2015-11-13 Thomas Preud'homme
> >
> > *
On Tuesday 12 July 2016 15:57:41 Kyrill Tkachov wrote:
> On 12/07/16 11:26, Thomas Preudhomme wrote:
> > Hi Kyrill,
>
> Hi Thomas,
>
> > On Friday 20 May 2016 14:22:48 Kyrill Tkachov wrote:
> >> Hi Thomas,
> >>
> >> On 17/05/16 11:14, Thomas
On Wednesday 13 July 2016 17:14:52 Christophe Lyon wrote:
> Hi Thomas,
Hi Christophe,
>
> I'm seeing:
> gcc.target/arm/pr42574.c: syntax error in target selector
> "arm_thumb1_ok && { ! arm_thumb1_movt_ok }" for " dg-do 1 compile {
> arm_thumb1_ok && { ! arm_thumb1_movt_ok } } "
Oops. I remembe
This patch fixes a syntax error in the dg-do selector of pr42574.c: it is
missing the target keyword, with the following boolean expression enclosed in
curly braces. Test fails to be run without this patch and successfully pass
with it. Patch is in attachment.
ChangeLog entry is as follows:
*
On Thursday 14 July 2016 10:14:52 Kyrill Tkachov wrote:
> Hi Thomas,
>
> On 14/07/16 10:12, Thomas Preudhomme wrote:
> > This patch fixes a syntax error in the dg-do selector of pr42574.c: it is
> > missing the target keyword, with the following boolean expression enclose
On Friday 08 July 2016 09:05:55 Mike Stump wrote:
> On Jul 8, 2016, at 8:07 AM, Thomas Preudhomme
wrote:
> > While investigating the root cause a testsuite regression for the
> > ARM/embedded-5-branch GCC in gcc.dg/vect/slp-perm-5.c, we found that the
> > bug seems to also a
On Thursday 14 July 2016 10:32:48 Thomas Preudhomme wrote:
> On Friday 08 July 2016 09:05:55 Mike Stump wrote:
> > On Jul 8, 2016, at 8:07 AM, Thomas Preudhomme
>
> wrote:
> > > While investigating the root cause a testsuite regression for the
> > > ARM/embedde
Hi Kyrill,
On Thursday 19 May 2016 17:18:29 Kyrill Tkachov wrote:
> Hi Thomas,
>
> On 17/05/16 11:15, Thomas Preudhomme wrote:
> > Ping?
> >
> > *** gcc/ChangeLog ***
> >
> > 2015-12-17 Thomas Preud'homme
> >
> > *
On Thursday 14 July 2016 17:23:46 Kyrill Tkachov wrote:
> Hi Thomas,
>
> On 14/07/16 14:37, Thomas Preudhomme wrote:
> > Hi Kyrill,
> >
> > On Thursday 19 May 2016 17:18:29 Kyrill Tkachov wrote:
> >> Hi Thomas,
> >>
> >>
The following backport has been made from gcc-6-branch to ARM/embedded-5-
branch in order to fix an ICE in LTO observed when running g++.dg/lto/20081219
testcase:
2016-07-27 Thomas Preud'homme
Backport from mainline
2015-11-29 Jan Hubicka
* cgraph.c (cgraph_node::m
Hi Richard,
Ping?
Best regards,
Thomas
On 17/11/16 20:42, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 08/11/16 13:35, Thomas Preudhomme wrote:
Ping,
Best regards,
Thomas
On 02/11/16 10:04, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 28/10/16 10:49, Thomas
3-1.c: New test.
* gcc.target/arm/pr77933-2.c: Likewise.
Best regards,
Thomas
On 17/11/16 20:15, Thomas Preudhomme wrote:
Hi Kyrill,
I've committed the following updated patch where the test is restricted to Thumb
execution mode and skipping it if not possible since -mtpcs-leaf-frame is
gcc/testsuite/
* gcc.target/arm/empty_fiq_handler.c: Skip if -mthumb is passed in and
target is Thumb-only.
Best regards,
Thomas
On 16/11/16 09:39, Kyrill Tkachov wrote:
On 09/11/16 16:19, Thomas Preudhomme wrote:
Hi,
This patch fixes the following ICE when building when compili
On 30/11/16 10:04, Richard Earnshaw (lists) wrote:
On 30/11/16 09:50, Thomas Preudhomme wrote:
Hi,
Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies
cleanly (patches attached for reference).
2016-11-17 Thomas Preud'homme
Backport from mainline
2016-
/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
in save register mask if it is needed.
gcc/testsuite/
PR target/77904
* gcc.target/arm/pr77904.c: New test.
Best regards,
Thomas
On 22/11/16 10:45, Thomas Preudhomme wrote:
On 17/11/16 09:11, Kyrill Tkachov wrote:
On 17/11/16 08:56, Thomas
Sorry, the bug cannot be reproduced on gcc-5-branch so it's probably better to
only do a backport to gcc-6-branch.
Ok for a backport to gcc-6-branch?
Best regards,
Thomas
On 30/11/16 10:42, Thomas Preudhomme wrote:
Hi,
Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch ap
Hi,
With ARM Cortex-M23 and Cortex-M33 and the support for RM profile multilib added
recently, it's time to add the corresponding CPU to architecture mappings in
config/arm/t-rmprofile. Note that Cortex-M33 is mapped to ARMv8-M Mainline
because there is no transitive closure of mappings and th
ption.
(add_options_for_arm_arch_v8m_base): Likewise.
Best regards,
Thomas
--- Begin Message ---
On 22/09/16 16:47, Richard Earnshaw (lists) wrote:
On 22/09/16 15:51, Thomas Preudhomme wrote:
Sorry, noticed an error in the patch. It was not caught during testing
because GCC was built with --with-mode=
Hi,
We have decided to backport this patch to add multilib support for ARM
Cortex-M23 and Cortex-M33 to our embedded-6-branch.
*** gcc/ChangeLog ***
2016-11-30 Thomas Preud'homme
* config/arm/t-rmprofile: Add mappings for Cortex-M23 and Cortex-M33.
Best regards,
Thomas
--- Beg
Hi,
When considering a candidate for rematerialization, LRA verifies if the
candidate clobbers a live register before going forward with the
rematerialization (see code starting with comment "Check clobbers do not kill
something living."). To do this check, the set of live registers at any giv
Hi,
The logic to make -mthumb optional for Thumb-only targets was designed to only
apply when no mode is specified either at compile time or when the toolchain was
configured (using --with-mode). The dg-skip-if in the testcases optional_thumb-1
and optional_thumb-2 catch the former case but no
On 05/12/16 09:01, Christophe Lyon wrote:
On 2 December 2016 at 17:35, Thomas Preudhomme
wrote:
Hi,
The logic to make -mthumb optional for Thumb-only targets was designed to
only apply when no mode is specified either at compile time or when the
toolchain was configured (using --with-mode
ls in doing that.
Best regards,
Thomas
On 17/11/16 20:43, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 08/11/16 13:36, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 02/11/16 10:05, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 24/10/16 09:07, Thomas Preud
Ping?
Best regards,
Thomas
On 30/11/16 10:20, Thomas Preudhomme wrote:
Hi,
Is this ok to backport this fix together with its follow-up testcase fix to
gcc-5-branch and gcc-6-branch? Both patches apply cleanly (patches attached for
reference).
2016-11-30 Thomas Preud'homme
Bac
Ping?
Best regards,
Thomas
On 30/11/16 09:50, Thomas Preudhomme wrote:
Hi,
Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies cleanly
(patches attached for reference).
2016-11-17 Thomas Preud'homme
Backport from mainline
2016-11-17 Thomas Preud&
Ping?
Best regards,
Thomas
On 30/11/16 10:44, Thomas Preudhomme wrote:
Sorry, the bug cannot be reproduced on gcc-5-branch so it's probably better to
only do a backport to gcc-6-branch.
Ok for a backport to gcc-6-branch?
Best regards,
Thomas
On 30/11/16 10:42, Thomas Preudhomme wrote
On 06/12/16 11:37, Kyrill Tkachov wrote:
On 06/12/16 11:36, Thomas Preudhomme wrote:
Ping?
Best regards,
Ok if bootstrap and testing on those branches doesn't reveal any issues.
Both backport bootstrapped fine when configured with: --with-arch=armv7-a
--with-mode=arm -with-fpu
We decided to also apply this patch to fix a wrong code generation to the ARM
embedded 6 branch.
2016-12-07 Thomas Preud'homme
Backport from mainline
2016-12-07 Thomas Preud'homme
gcc/
PR rtl-optimization/78617
* lra-remat.c (do_remat): Initialize live_hard_regs from
On 08/12/16 08:46, Christophe Lyon wrote:
On 21 November 2016 at 12:03, Thomas Preudhomme
wrote:
On 17/11/16 20:04, Thomas Preudhomme wrote:
Hi Christophe,
On 17/11/16 13:36, Christophe Lyon wrote:
On 16 November 2016 at 10:39, Kyrill Tkachov
wrote:
On 09/11/16 16:19, Thomas
[Seeing as an RC for GCC 6.3 was suggested on IRC for mid next week]
Ping?
backport for 6 bootstraps on Thumb-1 and testsuite shows no regression for
either 5 or 6. Bootstrap for 5 is ongoing.
Best regards,
Thomas
On 06/12/16 11:37, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 09/12/16 14:30, Kyrill Tkachov wrote:
On 09/12/16 14:24, Thomas Preudhomme wrote:
[Seeing as an RC for GCC 6.3 was suggested on IRC for mid next week]
Ping?
backport for 6 bootstraps on Thumb-1 and testsuite shows no regression for
either 5 or 6. Bootstrap for 5 is ongoing.
Ok
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