Updated version #3.
> -Original Message-
> From: Sandra Loosemore [mailto:san...@codesourcery.com]
> Sent: Wednesday, September 27, 2017 5:41 AM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; Uros Bizjak
> <ubiz...@gmail.com>
> Cc: gcc-patches@gcc.gn
Updated version #4.
> -Original Message-
> From: Sandra Loosemore [mailto:san...@codesourcery.com]
> Sent: Wednesday, September 27, 2017 5:11 AM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
>
> -Original Message-
> From: Florian Weimer [mailto:fwei...@redhat.com]
> Sent: Wednesday, September 27, 2017 10:52 AM
> To: Sandra Loosemore <san...@codesourcery.com>; Tsimbalist, Igor V
> <igor.v.tsimbal...@intel.com>; Uros Bizjak <ubiz...@gmail.com&
Here is a new version of the patch.
Igor
> -Original Message-
> From: Sandra Loosemore [mailto:san...@codesourcery.com]
> Sent: Monday, September 25, 2017 5:43 AM
> To: Uros Bizjak <ubiz...@gmail.com>; Tsimbalist, Igor V
> <igor.v.tsimbal...@intel.com>
&g
Here is the updated version (version#3). All comments below are fixed.
Igor
> -Original Message-
> From: Tsimbalist, Igor V
> Sent: Monday, September 25, 2017 11:57 PM
> To: Sandra Loosemore <san...@codesourcery.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches@gcc
> -Original Message-
> From: Sandra Loosemore [mailto:san...@codesourcery.com]
> Sent: Monday, September 25, 2017 5:07 AM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> Cc: Jeff Law <l...@red
Uros, could you please review this patch as it's a part of x86 specific changes
you have reviewed already.
Thanks,
Igor
> -Original Message-
> From: Tsimbalist, Igor V
> Sent: Tuesday, August 1, 2017 10:57 AM
> To: 'gcc-patches@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Uros Bizjak
> Sent: Tuesday, September 19, 2017 6:13 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subjec
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Uros Bizjak
> Sent: Monday, September 18, 2017 12:17 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com
o:ubiz...@gmail.com]
> Sent: Monday, September 18, 2017 11:58 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; Tsimbalist, Igor V
> <igor.v.tsimbal...@intel.com>
> Subject: Re: 0004-Part-4.-Update-x86-backend-to-enable
for trunk?
Thanks,
Igor
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, August 25, 2017 11:01 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> Subject: Re: 0003-Par
.
* rtl.texi: Add REG_CALL_NOTRACK documenation.
Is it ok for trunk?
Thanks,
Igor
> -Original Message-
> From: Tsimbalist, Igor V
> Sent: Friday, September 15, 2017 5:14 PM
> To: 'Jeff Law' <l...@redhat.com>; 'gcc-patches@gcc.gnu.org' patc...@gcc.gnu.org>
>
.guent...@gmail.com]
> Sent: Friday, September 15, 2017 2:14 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: 0001-Part-1.-Add-generic-part-for-Intel-CET-enabling
>
> On Fri, Sep 15, 2017 at 1:12 PM, Tsimbalist, Igor V
> &l
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jeff Law
> Sent: Friday, August 25, 2017 11:03 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, August 25, 2017 10:59 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> Subject: Re: 0002-Part-2.-Document-finstr
> -Original Message-
> From: Tsimbalist, Igor V
> Sent: Tuesday, September 12, 2017 5:35 PM
> To: 'Richard Biener' <richard.guent...@gmail.com>
> Cc: 'gcc-patches@gcc.gnu.org' <gcc-patches@gcc.gnu.org>; Tsimbalist, Igor V
> <igor.v.tsimbal...@intel.com
> -Original Message-
> From: Tsimbalist, Igor V
> Sent: Tuesday, September 12, 2017 5:59 PM
> To: 'Jeff Law' <l...@redhat.com>; 'gcc-patches@gcc.gnu.org' patc...@gcc.gnu.org>
> Cc: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>
> Subject: RE: 0001-Part-
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, August 25, 2017 10:50 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>; 'gcc-
> patc...@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> Subject: Re: 0001-Part-1.-Add-gener
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, August 25, 2017 10:32 PM
> To: Richard Biener <richard.guent...@gmail.com>; Tsimbalist, Igor V
> <igor.v.tsimbal...@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject:
> -Original Message-
> From: Tsimbalist, Igor V
> Sent: Friday, August 18, 2017 4:43 PM
> To: 'Richard Biener' <richard.guent...@gmail.com>
> Cc: gcc-patches@gcc.gnu.org; Tsimbalist, Igor V
> <igor.v.tsimbal...@intel.com>
> Subject: RE: 0001-Part-1.-Add-ge
> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Friday, August 18, 2017 3:53 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: 0001-Part-1.-Add-generic-part-for-Intel-CET-e
> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Tuesday, August 15, 2017 3:43 PM
> To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: 0001-Part-1.-Add-generic-part-for-Intel-CET-e
Part#8. Add Intel CET support for EH in libgcc.
Control-flow Enforcement Technology (CET), published by Intel, introduces
the Shadow Stack feature, which ensures a return from a function is done
to exactly the same location from where the function was called. When EH
is present the control-flow
Part#4. Update x86 backend to enable Intel CET.
All platforms except i386 will report the error and do no
instrumentation with -finstrument-control-flow option. i386 will provide
the implementation based on a specification published by Intel for a new
technology called Control-flow Enforcement
Part#9. Enable bootstrap GCC with CET flags.
0009-Part-9.-Enable-bootstrap-GCC-with-CET-flags.patch
Description: 0009-Part-9.-Enable-bootstrap-GCC-with-CET-flags.patch
Part#6. Add x86 tests for Intel CET implementation.
0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation.patch
Description: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation.patch
Part#7. Enable building libgcc with CET options.
Enable building libgcc with CET options by default on Linux/x86 if
binutils supports CET v2.0.
It can be disabled with --disable-cet. It is an error to configure
GCC with --enable-cet if bintuiils doesn't support CET v2.0.
Part#5. Add x86 CET documentation.
0005-Part-5.-Add-x86-CET-documentation.patch
Description: 0005-Part-5.-Add-x86-CET-documentation.patch
Part#1. Add generic part for Intel CET enabling.
The spec is available at
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
High-level design.
--
A proposal is to introduce a target independent flag
Part#2. Document -finstrument-control-flow and notrack attribute.
0002-Part-2.-Document-finstrument-control-flow-and-notrac.patch
Description: 0002-Part-2.-Document-finstrument-control-flow-and-notrac.patch
Part#3. Add tests for -finstrument-control-flow and notrack attribute.
0003-Part-3.-Add-tests-for-finstrument-control-flow-and-n.patch
Description: 0003-Part-3.-Add-tests-for-finstrument-control-flow-and-n.patch
Thanks for the feedback. I'll redo the patch according to your comments.
Igor
-Original Message-
From: Joseph Myers [mailto:jos...@codesourcery.com]
Sent: Tuesday, June 20, 2017 11:30 PM
To: Tsimbalist, Igor V <igor.v.tsimbal...@intel.com>
Cc: gcc-patches@gcc.gnu.org; Chupin, P
Control-flow Enforcement Technology (CET) provides the following
capabilities to defend against ROP/JOP style control-flow subversion
attacks:
- Shadow Stack - return address protection to defend against Return
Oriented Programming,
- Indirect branch tracking - free branch protection to defend
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