[DOC PATCH]: Sync stack_protect_{set,test} documentation with reality

2011-08-02 Thread Uros Bizjak
Hello! 2011-08-02 Uros Bizjak ubiz...@gmail.com PR target/47766 * doc/md.texi (stack_protect_set): The pattern moves ptr_mode value. (stack_protect_test): The pattern compares ptr_mode value. Tested on x86_64-pc-linux-gnu, committed to mainline (and soon release

[PATCH, gomp]: Unbreak bootstrap on glibc-2.5

2011-08-03 Thread Uros Bizjak
Hello! We should not call CPU_COUNT when not defined in glibc. 2011-08-03 Uros Bizjak ubiz...@gmail.com * config/linux/proc.c (gomp_cpuset_popcount): Rename from cpuset_popcount. No more static. (gomp_init_num_threads): Update call to cpuset_popcount

Re: [PATCH, gomp]: Unbreak bootstrap on glibc-2.5

2011-08-03 Thread Uros Bizjak
On Wed, Aug 3, 2011 at 11:11 AM, Jakub Jelinek ja...@redhat.com wrote: On Wed, Aug 03, 2011 at 10:36:47AM +0200, Uros Bizjak wrote: We should not call CPU_COUNT when not defined in glibc. Oops, forgot that old glibcs don't have it. I don't like the prototype in libgomp.h, for one sched.h

Re: PATCH: Add -march=core-avx-i

2011-08-05 Thread Uros Bizjak
On Fri, Aug 5, 2011 at 4:45 AM, H.J. Lu hongjiu...@intel.com wrote: This patch adds -march=core-avx-i to support Intel Ivy Bridge.  OK for trunk and 4.6? 2011-08-04  H.J. Lu  hongjiu...@intel.com        * config/i386/i386.c (processor_alias_table): Add core-avx-i.        *

[PATCH, i386]: various address related fixes/cleanups

2011-08-05 Thread Uros Bizjak
there is a problem in IRA/reload how offsetable operand addresses are handled (I will post separate RFC patch for that). 2011-08-05 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (*pushmode2): Use o constraint instead of m for operand 0. Add type and mode attribute

[RFC PATCH, i386]: Allow zero_extended addresses (+ problems with reload and offsetable address, o constraint)

2011-08-05 Thread Uros Bizjak
wrong in reload? 2011-08-05 Uros Bizjak ubiz...@gmail.com PR target/49781 * config/i386/i386.c (ix86_decompose_address): Allow zero-extended SImode addresses. (ix86_print_operand_address): Handle zero-extended addresses. (memory_address_length): Add length

[PATCH, libiberty]: Check result of fwrite in test-expandargv.c

2011-08-05 Thread Uros Bizjak
../../../gcc-svn/trunk/libiberty/testsuite/test-expandargv.c: In function ‘writeout_test’: ../../../gcc-svn/trunk/libiberty/testsuite/test-expandargv.c:211: warning: ignoring return value of ‘fwrite’, declared with attribute warn_unused_result Attached patch fixes this warning. 2011-08-05 Uros

Re: [i386] New testcase (was: [rtl, patch] combine concat+shuffle)

2012-05-28 Thread Uros Bizjak
On Mon, May 28, 2012 at 3:37 PM, Marc Glisse marc.gli...@inria.fr wrote: Ping? The rest of the patch has been approved already. On Thu, 10 May 2012, Marc Glisse wrote: Hello, could an i386 maintainer take a look at the following testcase? gcc/testsuite/ChangeLog 2012-05-08  Marc Glisse

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-05-28 Thread Uros Bizjak
Hello! Ping? Please at least add and URL to the patch, it took me some time to found the latest version [1], I'm not even sure if it is the latest version... I assume that you cleared all issues with middle-end and scheduler maintainers, it is not clear from the message. + (1) IMUL

Re: PATCH: PR bootstrap/53555: [4.8 Regression] Bootstrap failure

2012-06-04 Thread Uros Bizjak
On Sat, Jun 2, 2012 at 3:27 PM, H.J. Lu hongjiu...@intel.com wrote: ix86_sched_reorder should skip debug insns.  Tested on Linux/ia32. OK to install? 2012-06-02  H.J. Lu  hongjiu...@intel.com        PR bootstrap/53555        * config/i386/i386.c (ix86_sched_reorder) Skip debug insns. OK.

Re: PATCH: --with-abi=x32 without --with-multilib-list doesn't work

2012-06-05 Thread Uros Bizjak
On Mon, Jun 4, 2012 at 8:09 PM, H.J. Lu hongjiu...@intel.com wrote: We should enable x32 run-time library if --with-abi={x32|mx32} is used to configure GCC i[34567]86-*-* and x86_64-*-*.  Tested on Linux/x86-64. OK for trunk? 2012-06-04  H.J. Lu  hongjiu...@intel.com        PR target/53575

Re: PATCH: --with-abi=x32 without --with-multilib-list doesn't work

2012-06-05 Thread Uros Bizjak
On Tue, Jun 5, 2012 at 2:47 PM, H.J. Lu hjl.to...@gmail.com wrote: We should enable x32 run-time library if --with-abi={x32|mx32} is used to configure GCC i[34567]86-*-* and x86_64-*-*.  Tested on Linux/x86-64. Why all three ABIs here? Didn't user specify -with-abi=mx32 only, so

[PATCH, testsuite]: Avoid magic constants in gcc.target/i386/avx-os-support.h

2012-06-06 Thread Uros Bizjak
Hello! 2012-06-06 Uros Bizjak ubiz...@gmail.com * gcc.target/i386/avx-os-support.h (XCR_XFEATURE_ENABLED_MASK): New. (XSTATE_FP): Ditto. (XSTATE_SSE): Ditto. (XSTATE_YMM): Ditto. (avx_os_support): Use new defines. Tested on x86_64-pc-linux-gnu AVX

[PATCH, libgcc]: Put soft-FP exception handler out-of-line for x86

2012-06-07 Thread Uros Bizjak
instructions for 32bit targets. There is no other functional changes, although the change to real SSE FP ops is tempting. ;) 2012-06-07 Uros Bizjak ubiz...@gmail.com * config/i386/32/sfp-machine.h (__gcc_CMPtype, CMPtype, _FP_KEEPNANFRACP, _FP_CHOOSENAN, FP_EX_INVALID, FP_EX_DENORM

Re: [PATCH, libgcc]: Put soft-FP exception handler out-of-line for x86

2012-06-09 Thread Uros Bizjak
On Thu, Jun 7, 2012 at 9:58 PM, Uros Bizjak ubiz...@gmail.com wrote: Attached patch rewrites x86 soft-FP as an out-of-line function that gets conditionally called when exception occurs. This rewrite removes 17 instances of the same code from libgcc. In addition, the patch unifies a lot

[RFA PATCH, ia64]: Put soft-FP exception handler out-of-line

2012-06-12 Thread Uros Bizjak
Hello! Similar to x86, this patch puts soft-FP exception handler out-of-line. The patch also cleans asm constraints a bit (introduces +), but has no other functional changes. 2012-06-12 Uros Bizjak ubiz...@gmail.com * config/ia64/sfp-machine.h (__sfp_handle_exceptions): New

Re: [RFA PATCH, ia64]: Put soft-FP exception handler out-of-line

2012-06-13 Thread Uros Bizjak
On Tue, Jun 12, 2012 at 12:31 PM, Uros Bizjak ubiz...@gmail.com wrote: Similar to x86, this patch puts soft-FP exception handler out-of-line. The patch also cleans asm constraints a bit (introduces +), but has no other functional changes. 2012-06-12  Uros Bizjak  ubiz...@gmail.com

[PATCH, i386]: Some more soft-fp cleanups

2012-06-13 Thread Uros Bizjak
Hello! A couple of #defines can be moved to shared header, no need to mask _fex with exception mask and fnstsw should be marked volatile, since it depends on hidden FP status register. 2012-06-13 Uros Bizjak ubiz...@gmail.com * config/i386/32/sfp-machine.h (_FP_NANSIGN_S

[RFA 4.7 PATCH, ia64]: Change ior attribute to or in sync.md

2012-06-13 Thread Uros Bizjak
Hello! This patch fixes a trivial oversight in the name of or family of sync functions. 2012-06-12 Uros Bizjak ubiz...@gmail.com * config/ia64/sync.md (fetchop_name): Change ior attribute to or. Tested on ia64-unknown-linux-gnu. Is it still OK to squeeze this trivial one-liner

Re: PATCH: PR target/53647: Set proper cache values when needed

2012-06-13 Thread Uros Bizjak
On Wed, Jun 13, 2012 at 4:47 PM, H.J. Lu hongjiu...@intel.com wrote: On i386, ix86_size_cost will be used for -Os, which has zero for simultaneous_prefetches, prefetch_block, l1_cache_size and l2_cache_size. This patch adds ix86_tune_cost and uses it for simultaneous_prefetches,

Re: [PATCH, i386]: Back port Fix PR 52908 - xop-mul-1:f9 miscompiled on bulldozer (-mxop) to 4.7

2012-06-14 Thread Uros Bizjak
wait with it until 4.7.1 is released. +2012-06-07  Venkataramanan Kumar venkataramanan.ku...@amd.com + The common way is to use:        Backport from mainline        2012-05-09  Uros Bizjak  ubiz...@gmail.com instead of the following line: +     Backport from  2012-05-09 mainline r187354

[PATCH. i386]: movd in zero_extend RTX is SSE2 instruction.

2012-06-14 Thread Uros Bizjak
Hello! movd to/from MMX or SSE registers is SSE2 instruction. Also, remove wrong x,x alternative. 2012-06-14 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (*zero_extendsidi2): Mark movd alternatives SSE2 only. Remove x,x alternative. (*zero_extendsidi2_rex64

Re: [PATCH. i386]: movd in zero_extend RTX is SSE2 instruction.

2012-06-14 Thread Uros Bizjak
On Thu, Jun 14, 2012 at 8:47 PM, Uros Bizjak ubiz...@gmail.com wrote: movd to/from MMX or SSE registers is SSE2 instruction. Also, remove wrong x,x alternative. 2012-06-14  Uros Bizjak  ubiz...@gmail.com        * config/i386/i386.md (*zero_extendsidi2): Mark movd alternatives        SSE2

[PATCH, testsuite]: Fix scan-tree-dump-times argument order in gcc.dg/tree-ssa/vrp68.c.

2012-06-17 Thread Uros Bizjak
Hello! The testcase still fails on x86_64-pc-linux-gnu with: FAIL: gcc.dg/tree-ssa/vrp68.c scan-tree-dump-times vrp1 link_error 1 since there are two calls to link_error. 2012-06-17 Uros Bizjak ubiz...@gmail.com * gcc.dg/tree-ssa/vrp68.c: Fix scan-tree-dump-times argument order

[PATCH, i386]: Fix vcvtph2ps vec_select selector

2012-06-17 Thread Uros Bizjak
Hello! 2012-06-17 Uros Bizjak ubiz...@gmail.com * config/i386/sse.md (vcvtph2ps): Fix vec_select selector. Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN, will be backported to release branches. Uros. Index: config/i386/sse.md

[PATCH, libgcc]: Use __builtin_expect when checking for soft-fp exceptions

2012-06-17 Thread Uros Bizjak
Hello! 2012-06-17 Uros Bizjak ubiz...@gmail.com * config/i386/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Use __builtin_expect when checking for exceptions. * config/ia64/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Ditto. Tested on x86_64-pc-linux-gnu {,-m32} and ia64-unknown

Re: [PATCH 3/3] Handle const_vector in mulv4si3 for pre-sse4.1.

2012-06-17 Thread Uros Bizjak
Hello! Please note that you will probably hit PR33329, this is the reason that we expand multiplications after reload. Please see [1] for further explanation. There is gcc.target/i386/pr33329.c test to cover this issue, but it is not effective anymore since the simplification happens at tree

Re: [PATCH 3/3] Handle const_vector in mulv4si3 for pre-sse4.1.

2012-06-17 Thread Uros Bizjak
On Sun, Jun 17, 2012 at 8:37 PM, Uros Bizjak ubiz...@gmail.com wrote: Hello! Please note that you will probably hit PR33329, this is the reason that we expand multiplications after reload. Please see [1] for further explanation. There is gcc.target/i386/pr33329.c test to cover this issue

[PATCH, testsuite]: Increase array size in gcc.target/i386/pr33329.c

2012-06-17 Thread Uros Bizjak
Hello! gcc.target/i386/pr33329.c is fully optimized with tree optimizers to a constant. Attached patch increases array size to avoid over-optimization and to perform intended RTL optimization check. 2012-06-17 Uros Bizjak ubiz...@gmail.com * gcc.target/i386/pr33329.c (f): Increase

[PATCH, i386]: Fix PR 53712, Does not combine unaligned load with _mm_cmpistri

2012-06-18 Thread Uros Bizjak
Hello! Attached patch teaches gcc how to merge unaligned load (UNSPEC_MOVU) with pcmpistr/pcmpestr instructions. 2012-06-18 Uros Bizjak ubiz...@gmail.com PR target/53712 * config/i386/sse.md (*sse4_2_pcmpestr_unaligned): New. (*sse4_2_pcmpistr_unaligned): New

[PATCH, libcpp]: Use x86 __builtin_ia32_pcmpestri128 instead of asm.

2012-06-18 Thread Uros Bizjak
Hello! Following the patch that allows unaligned operands in pcmpestri [1], we can substitute x86 asm in lex.c with equivalent builtin functions. 2011-06-18 Uros Bizjak ubiz...@gmail.com * lex.c (search_line_sse42): Use __builtin_ia32_loaddqu and __builtin_ia32_pcmpestri128

Re: [PATCH, libcpp]: Use x86 __builtin_ia32_pcmpestri128 instead of asm.

2012-06-19 Thread Uros Bizjak
On Tue, Jun 19, 2012 at 12:07 AM, Richard Henderson r...@redhat.com wrote: On 2012-06-18 13:19, Uros Bizjak wrote:        /* ??? The builtin doesn't understand that the PCMPESTRI read from        memory need not be aligned.  */ -      __asm (%vpcmpestri $0, (%1), %2 -          : =c(index) : r

Re: [PATCH, libcpp]: Use x86 __builtin_ia32_pcmpestri128 instead of asm.

2012-06-19 Thread Uros Bizjak
On Tue, Jun 19, 2012 at 8:38 AM, Uros Bizjak ubiz...@gmail.com wrote: On Tue, Jun 19, 2012 at 12:07 AM, Richard Henderson r...@redhat.com wrote: On 2012-06-18 13:19, Uros Bizjak wrote:        /* ??? The builtin doesn't understand that the PCMPESTRI read from        memory need not be aligned

[PATCH, i386]: Introduce FRNDINT_ROUNDING int iterator

2012-06-19 Thread Uros Bizjak
Hello! 2012-06-19 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (FRNDINT_ROUNDING): New int iterator. (rounding): New int attribute. (ROUNDING): Ditto. (frndintxf2_rounding): Macroize insn from frndintxf2_{floor,ceil,trunc} using FRNDINT_ROUNDING

Re: [PATCH, i386]: Introduce FIST_ROUNDING int iterator

2012-06-19 Thread Uros Bizjak
Hello! 2012-06-19 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (FIST_ROUNDING): New int iterator. (rounding): Handle UNSPEC_FIST_{FLOOR,CEIL}. (ROUNDING): Ditto. (*fistmode2_rounding_1): Macroize insn from *fistmode2_{floor,ceil}_1 using

Re: [PATCH 3/3] Handle const_vector in mulv4si3 for pre-sse4.1.

2012-06-20 Thread Uros Bizjak
On Mon, Jun 18, 2012 at 10:06 PM, Richard Henderson r...@redhat.com wrote: Please note that you will probably hit PR33329, this is the reason that we expand multiplications after reload. Please see [1] for further explanation. There is gcc.target/i386/pr33329.c test to cover this issue, but

[PATCH, i386]: Some more int iterator macroizations

2012-06-20 Thread Uros Bizjak
Hello! 2012-06-20 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (rounding_insn): New int attribute. (rounding_insnxf2): Macroize insn from {floor,ceil,btrunc}xf2 using FRNDINT_ROUNDING int iterator. (lrounding_insnxfmode2): Rename from lroundingxfmode2

[PATCH, i386]: Macroize remaining rounding expanders

2012-06-20 Thread Uros Bizjak
Hello! 2012-06-20 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (rounding_insnmode2): Macroize expander from {floor,ceil,btrunc}mode2 using FIST_ROUNDING int iterator. (lrounding_insnMODEF:modeSWI48:mode2): Macroize expander from l{floor,ceil

[PATCH, i386]: Macroize with int iterators remaining insn patterns

2012-06-20 Thread Uros Bizjak
Hello! 2012-06-20 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (SINCOS): New int iterator. (sincos): New int attribute. (*sincosxf2_i387): Macroize insn from *{sin,cos}xf2_i387 using SINCOS int iterator. (*sincos_extendmodexf2_i387): Macroize insn

Re: [PATCH] Fix accesses to freed up memory in var-tracking (PR debug/53706)

2012-06-21 Thread Uros Bizjak
Hello! During htab_delete (dropped_values), loc_exp_dep_pool allocated objects might be accessed, so it is better to free the pool afterwards. Bootstrapped/regtested on i686-linux, ok for trunk? Looks obvious. The patch doesn't fix all writes to freed up memory, please see comment #8

Re: [PATCH] x86: use 'rep bsf' syntax when assembler supports it

2012-06-22 Thread Uros Bizjak
Hello! The GNU assembler now (just as of today) accepts 'rep bsf ...' or 'rep bsr ...' syntax. It's always better to put a prefix on the instruction itself rather than to write 'rep; ...'. This changes 'rep; bsf ...' to 'rep bsf ...' when the assembler accepts the latter. 2012-06-22

Re: [off list] Re: [PATCH] x86: use 'rep bsf' syntax when assembler supports it

2012-07-01 Thread Uros Bizjak
On Sat, Jun 23, 2012 at 12:00 AM, Roland McGrath mcgra...@google.com wrote: Here is an alternative patch that just changes the configure test controlling %; so it will elide the ; only for an assembler that also accepts 'rep bsf', 'rep bsr', and 'rep ret', and just uses %; for these cases too.

[PATCH, c-family]: Remove unused variables from c_common_write_pch

2012-07-01 Thread Uros Bizjak
Hello! 2012-07-01 Uros Bizjak ubiz...@gmail.com * c-pch.c (c_common_write_pch): Remove unused variables. Tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index: c-pch.c === --- c-pch.c (revision 189099

[PATCH, i386]: Use __builtin_ia32_pause some more

2012-07-01 Thread Uros Bizjak
Hello! gcc/ 2012-07-01 Uros Bizjak ubiz...@gmail.com * config/i386/xmmintrin.h (_mm_sfence): Use __builtin_ia32_pause. libgomp/ 2012-07-01 Uros Bizjak ubiz...@gmail.com * config/linux/x86/futex.h (cpu_relax): Use __builtin_ia32_pause. * testsuite/libgomp.c/sort-1

Re: [PATCH, i386]: Use __builtin_ia32_pause some more

2012-07-03 Thread Uros Bizjak
On Sun, Jul 1, 2012 at 3:10 PM, Uros Bizjak ubiz...@gmail.com wrote: gcc/ 2012-07-01 Uros Bizjak ubiz...@gmail.com * config/i386/xmmintrin.h (_mm_sfence): Use __builtin_ia32_pause. libgomp/ 2012-07-01 Uros Bizjak ubiz...@gmail.com * config/linux/x86/futex.h

Re: [PATCH] x86: use 'rep bsf' syntax when assembler supports it

2012-07-03 Thread Uros Bizjak
On Tue, Jul 3, 2012 at 12:37 PM, Richard Guenther richard.guent...@gmail.com wrote: Based on the observation above, the patch is OK for mainline, but please also handle rep nop case. Here's the new version of the patch that does that. Note that someone needs to commit this for me, since I

[PATCH, i386]: Fix PR 53811, ICE: in insn_default_length, at config/i386/i386.md:529 (unrecognizable insn) with -mcmodel=large

2012-07-03 Thread Uros Bizjak
Hello! Attached patch fixes PR 53811. gcc failed to check if symbol_ref operands fits sibcall_insn_operand predicate. In case of -mcmodel=large, we must emit indirect jump for a sibcall. 2012-07-03 Uros Bizjak ubiz...@gmail.com PR target/53811 * config/i386/i386.c

[PATCH, i386]: Fix wrong code model string in the error message

2012-07-03 Thread Uros Bizjak
Hello! 2012-07-03 Uros Bizjak ubiz...@gmail.com * config/i386/i386.c (ix86_option_override_internal): Fix wrong code model string in the error message. Committed. Uros. Index: config/i386/i386.c === --- config

[PATCH, trivial]: Avoid various may be used uninitialized warnings

2012-07-04 Thread Uros Bizjak
Hello! Several otherwise harmless may be used uninitialized warnings break LTO profiled bootstrap. Attached patch fixes all these places, enabling profiled LTO bootstrap to continue. 2012-07-04 Uros Bizjak ubiz...@gmail.com * expmed.c (expand_mult): Initialize coeff and is_neg. java

[PATCH]: Fix IPA with profiling

2012-07-04 Thread Uros Bizjak
have to update something, at least when profiling, before calling cgraph_propagate_frequency. 2012-07-04 Uros Bizjak ubiz...@gmail.com * ipa.c (symtab_remove_unreachable_nodes): Partially revert r187375 to not call cgraph_propagate_frequency if something was changed. testsuite

[PATCH, i386]: Make construct_plt_address static

2012-07-06 Thread Uros Bizjak
Hello! 2012-07-06 Uros Bizjak ubiz...@gmail.com * config/i386/i386.c (construct_plt_address): Make static. * config/i386/i386-protos.h (construct_plt_address): Remove. Tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index: i386-protos.h

Re: [PATCH, i386]: Convert some more simple LEAs to ADD.

2012-07-06 Thread Uros Bizjak
On Fri, Jul 6, 2012 at 5:24 PM, Andi Kleen a...@firstfloor.org wrote: Uros Bizjak ubiz...@gmail.com writes: Sometimes, gcc generates: leaq(%rbx,%rax), %rax that is in fact equivalent (modulo flags reg clobber) to: addq%rbx, %rax Attached patch adds additional peephole2 patterns

Re: [patch][i386] Remove some dead code (TARGET_BRANCH_PREDICTION_HINTS)

2012-07-10 Thread Uros Bizjak
Hello! TARGET_BRANCH_PREDICTION_HINTS isn't used at all. This patch removes it. Bootstrappedtested (incl. -m32) on x86_64-unknown-linux-gnu. OK for trunk? This infrastructure can be used for future targets, so let's leave it as is. Uros.

Re: [patch][i386] Remove some dead code (TARGET_BRANCH_PREDICTION_HINTS)

2012-07-10 Thread Uros Bizjak
On Tue, Jul 10, 2012 at 9:04 AM, Steven Bosscher stevenb@gmail.com wrote: TARGET_BRANCH_PREDICTION_HINTS isn't used at all. This patch removes it. Bootstrappedtested (incl. -m32) on x86_64-unknown-linux-gnu. OK for trunk? This infrastructure can be used for future targets, so let's leave

Re: [patch] Add block debug info to phi_arg_d

2012-07-12 Thread Uros Bizjak
Hello! A test is added. Is it ok? gcc/testsuite/ChangeLog 2012-07-08 Dehao Chen de...@google.com * gcc.dg/debug_info_inline.c: New test. This test fails on alphaev68-unknown-linux-gnu [1] and other non-x86 targets [2] too: FAIL: gcc.dg/debug_info_inline.c scan-assembler loc 1

[PATCH, i386]: Cleanup cmove splitters

2012-07-12 Thread Uros Bizjak
Hello! 2012-07-12 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (QImode and HImode cmove splitters): Merge QImode and HImode splitters. Use ix86_comparison_operator. Explicitly match FLAGS_REG. (DFmode cmove splitter): Explicitly match FLAGS_REG. Tested

Re: [PATCH] Make LTO type merging cheaper

2012-07-14 Thread Uros Bizjak
Hello! A patch that's in my local tree for quite some time. This removes redundant tests. LTO bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2012-07-13 Richard Guenther rguent...@suse.de * gimple.c (gimple_types_compatible_p_1): Remove redundant

[PATCH, i386]: Fix ix86_set_reg_reg_cost w.r.t. TFmode

2012-07-14 Thread Uros Bizjak
Hello! Recently, gcc was switched to enable TFmode moves in XMM registers also for TARGET_SSE. Sync reg-reg move cost calculation. 2012-07-14 Uros Bizjak ubiz...@gmail.com * config/i386/i386.c (ix86_set_reg_reg_cost): Enable TFmode/TCmode for TARGET_SSE. Tested on x86_64-pc

Re: [PATCH] Fix up _xabort for -O0

2012-07-16 Thread Uros Bizjak
On Mon, Jul 16, 2012 at 4:45 PM, Jakub Jelinek ja...@redhat.com wrote: While backporting, I've noticed there is an extra semicolon that shouldn't be there in -O0 version of _xabort. Ok for trunk? 2012-07-16 Jakub Jelinek ja...@redhat.com * config/i386/rtmintrin.h (_xabort):

Re: [PATCH, i386, PR53877] New intrinsics for LZCNT

2012-07-16 Thread Uros Bizjak
On Mon, Jul 16, 2012 at 4:32 PM, H.J. Lu hjl.to...@gmail.com wrote: On Mon, Jul 16, 2012 at 7:14 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Hello guys, Here is a tiny patch which adds two new intrinsics which were introduced in recent spec [1]. They're aliased to the existing

Re: PR libjava/53973: Check and and skip 67h address size prefix for x32

2012-07-18 Thread Uros Bizjak
On Wed, Jul 18, 2012 at 7:34 PM, Andrew Haley a...@redhat.com wrote: On 07/18/2012 05:30 PM, H.J. Lu wrote: 2012-07-16 H.J. Lu hongjiu...@intel.com PR libjava/53973 * include/x86_64-signal.h (CHECK_67H_PREFIX): New. (HANDLE_DIVIDE_OVERFLOW): Check and and skip 67h address

[PATCH]: Add entity argument to MODE_AFTER macro

2012-07-18 Thread Uros Bizjak
already tripped on this issue. 2012-07-18 Uros Bizjak ubiz...@gmail.com * doc/tm.texi.in (MODE_AFTER): Add entity as the first macro argument. * doc/tm.texi: Regenerate. * mode-switching.c (optimize_mode_switching): Update MODE_AFTER call. * config/sh/sh.h

Re: [PATCH] Define FFI_SIZEOF_JAVA_RAW to 4 for x32

2012-07-18 Thread Uros Bizjak
On Wed, Jul 18, 2012 at 6:27 PM, H.J. Lu hongjiu...@intel.com wrote: This patch defines FFI_SIZEOF_JAVA_RAW to 4 for x32, similar to MIPS n32. It fixed: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53982 Here is the patch with updated ChangeLog entry. X32 has the same issue as MIPS n32,

Re: [PATCH] Define FFI_SIZEOF_JAVA_RAW to 4 for x32

2012-07-18 Thread Uros Bizjak
On Wed, Jul 18, 2012 at 9:10 PM, H.J. Lu hjl.to...@gmail.com wrote: This patch defines FFI_SIZEOF_JAVA_RAW to 4 for x32, similar to MIPS n32. It fixed: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53982 Here is the patch with updated ChangeLog entry. X32 has the same issue as MIPS n32,

Re: [PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW

2012-07-19 Thread Uros Bizjak
Hello! This patch adds new intrinsics for new ADCX, ADOX, RDSEED and PREFETCHW instructions, introduced here: http://software.intel.com/en-us/avx/ +/* Copyright (C) 2012 Free Software Foundation, Inc. + Contributed by Michael Zolotukhin. Please remove Contributed by lines from headers. +

Re: [PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW

2012-07-19 Thread Uros Bizjak
On Thu, Jul 19, 2012 at 11:10 AM, Jakub Jelinek ja...@redhat.com wrote: On Thu, Jul 19, 2012 at 11:03:25AM +0200, Uros Bizjak wrote: + /* Set CF to specified value. */ + emit_insn (gen_addqi3_cc( + gen_reg_rtx(QImode), + op1, + constm1_rtx

Re: [PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW

2012-07-19 Thread Uros Bizjak
On Thu, Jul 19, 2012 at 11:51 AM, Jakub Jelinek ja...@redhat.com wrote: You have a mnemonic clash here. prefetchw is not good name for a new instruction, it clashes with existing 3dnow name. Intel will need to fix the spec, you probably won't be able to change prefetchw encoding in

Re: [PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW

2012-07-19 Thread Uros Bizjak
On Thu, Jul 19, 2012 at 11:51 AM, Jakub Jelinek ja...@redhat.com wrote: I think it is fine to change existing mm3dnow.h header, but not in the way it has been changed in the patch. The thing is that unlike the newly added intrinsics headers, mm3dnow.h is still publicly includable header, and

Re: [PATCH]: Add entity argument to MODE_AFTER macro

2012-07-19 Thread Uros Bizjak
On Wed, Jul 18, 2012 at 8:31 PM, Uros Bizjak ubiz...@gmail.com wrote: As with all other mode switching macros, we need to pass entity index also to MODE_AFTER macro. In a multi-entity mode switching case, we usually don't have same modes for all entities, and we should be able to return

Re: [PATCH] Cleanup AVX2 vector/vector shifts (take 2)

2011-10-28 Thread Uros Bizjak
On Fri, Oct 28, 2011 at 10:57 AM, Jakub Jelinek ja...@redhat.com wrote: On Thu, Oct 27, 2011 at 10:07:13PM +0200, Uros Bizjak wrote: Please use expressive RTX forms for expanders, similar to the above define_insn RTX. You can avoid calling gen_avx2_lshrvmode at the end of c code. Also

[PATCH, i386]: Remove lshift_insn and lshift code attributes

2011-10-28 Thread Uros Bizjak
Hello! We can extend existing code attributes. Also, the patch includes some stylistic changes in XOP shift patterns. No functional changes. 2011-10-28 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (shift_insn): Rename code attribute from shiftrt_insn. Also handle

Re: [PATCH, i386]: Remove lshift_insn and lshift code attributes

2011-10-28 Thread Uros Bizjak
On Fri, Oct 28, 2011 at 8:21 PM, Uros Bizjak ubiz...@gmail.com wrote: Hello! We can extend existing code attributes.  Also, the patch includes some stylistic changes in XOP shift patterns. No functional changes. Eh, the patch was the old one, added is additional patch with updated ChangeLog

[PATCH, testsuite]: Use return 0 instead of exit(0) in gcc.target/i386/*-check.h

2011-10-29 Thread Uros Bizjak
Hello! 2011-10-29 Uros Bizjak ubiz...@gmail.com * gcc.target/i386/fma-check.h (main): Use return 0 instead of exit (0). * gcc.target/i386/fma4-check.h (main): Ditto. * gcc.target/i386/xop-check.h (main): Ditto. Committed as trivial change to mainline SVN. Uros. Index

[PATCH, i386]: Remove lshlv16qi3 and add lshrv16qi3 XOP expander

2011-10-29 Thread Uros Bizjak
Hello! lshlv16qi3 is not a generic name for expander, and we have ashlv16qi3 for this. Attached patch adds lshrv16qi3 to generate logical shift-right XOP instruction. 2011-10-29 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (lshlv16qi3): Remove expander. (lshrv16qi3

[PATCH, i386]: Rename xop_ashl - xop_sha, xop_lshl - xop_shl

2011-10-29 Thread Uros Bizjak
Hello! These pattern names are misleading, implying that these are logical shift left and arithmetic shift left. They are not, they are shift logical and shift arithmetic. Attached (trivial) patch renames these patterns to the insn mnemonic they generate. 2011-10-29 Uros Bizjak ubiz

[PATCH, i386]: Merge and macroize some more patterns

2011-10-30 Thread Uros Bizjak
Hello! 2011-10-30 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (avx2_vec_dupmode): Macroize insn from avx2_vec_dup{v8sf,v4sf} using VF1 mode iterator. (vec_dupv4sf): Remove expander. (vec_dupv4sf): Merge from *vec_dupv4sf and *vec_dupv4sf_avx

Re: Go patch committed: Update Go library

2011-11-01 Thread Uros Bizjak
On Thu, Oct 27, 2011 at 6:42 PM, Uros Bizjak ubiz...@gmail.com wrote: This patch updates the Go library to the most recent weekly release.  I think the only potential portability issues here are the use of the ipv6_mreq struct.  I'm not entirely sure the new exp/terminal package is portable

Re: [PATCH] Add vec_pack_ufix_trunc_{v4df,v2df} expanders

2011-11-01 Thread Uros Bizjak
On Tue, Nov 1, 2011 at 10:07 AM, Jakub Jelinek ja...@redhat.com wrote: Similarly to the V{4,8}SFmode - unsigned V{4,8}SImode conversion support for AVX this one adds V{2,4}DFmode - unsigned V{4,8}SImode conversion. Ok for trunk? Please put expander function into i386.c. IMO, this expander

Re: PATCH: Move f16c intrinsics into f16cintrin.h

2011-11-01 Thread Uros Bizjak
Hello! On Mon, Oct 31, 2011 at 05:23:58PM -0500, Quentin Neill wrote: Interested parties should view these threads from three years ago: http://gcc.gnu.org/ml/gcc-patches/2008-11/threads.html#00145 http://gcc.gnu.org/ml/gcc-patches/2008-12/threads.html#00174 Testing on x86_64, okay to

Re: [PATCH] Add vec_pack_ufix_trunc_{v4df,v2df} expanders (take 2)

2011-11-01 Thread Uros Bizjak
On Tue, Nov 1, 2011 at 2:35 PM, Jakub Jelinek ja...@redhat.com wrote: Similarly to the V{4,8}SFmode - unsigned V{4,8}SImode conversion support for AVX this one adds V{2,4}DFmode - unsigned V{4,8}SImode conversion. Ok for trunk? Please put expander function into i386.c. IMO, this

[PATCH, i386]: Fix PR50940, ICE in extract_insn, at recog.c:2137 during bootstrap

2011-11-01 Thread Uros Bizjak
Hello! Fix a typo. 2011-10-30 Uros Bizjak ubiz...@gmail.com PR target/50940 * config/i386/i386.md (floatsimode2_vector_sse_with_temp splitter): Compare ssevecmodemode with V4SFmode, not V4SImode. Tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index

[PATCH, i386]: Use reg_or_subregno in int-float splitters

2011-11-01 Thread Uros Bizjak
Hello! We have a nice utility function that can be used in int-float splitter constraints. 2011-11-01 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (splitters for int-float conversion): Use reg_or_subregno in splitter constraints. Bootstrapped and regression tested

Re: [PATCH, i386]: Use reg_or_subregno in int-float splitters

2011-11-01 Thread Uros Bizjak
On Tue, Nov 1, 2011 at 11:00 PM, Jakub Jelinek ja...@redhat.com wrote: On Tue, Nov 01, 2011 at 10:33:07PM +0100, Uros Bizjak wrote: We have a nice utility function that can be used in int-float splitter constraints. 2011-11-01  Uros Bizjak  ubiz...@gmail.com       * config/i386/i386.md

Re: -fdump-go-spec option does not handle redefinitions

2011-11-02 Thread Uros Bizjak
On Wed, Nov 2, 2011 at 6:06 AM, Ian Lance Taylor i...@google.com wrote: The problem with your proposal is that the output would be invalid Go, because it would attempt to define the name _aa twice.  However, it does seem plausible that in most scenarios of this type it would be more useful

[PATCH, i386]: Fix gcc.target/i386/avx-vcvttpd2dq-256-1.c execution test failure

2011-11-02 Thread Uros Bizjak
Hello! 2011-11-02 Uros Bizjak ubiz...@gmail.com * config/i386/i386.c (bdesc_args) [IX86_BUILTIN_CVTTPD2DQ256]: Use CODE_FOR_fix_truncv4dfv4si2, not CODE_FOR_fix_truncv4sfv4si2. Tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index: i386.c

[PATCH, i386]: Testsuite adjustments

2011-11-02 Thread Uros Bizjak
Hello! 2011-11-02 Uros Bizjak ubiz...@gmail.com * gcc.target/i386/avx-cvt-2.c (dg-options): Add -mtune=generic. * gcc.target/i386/avx2-cvt-2.c (dg-options): Ditto. * gcc.target/i386/sse2-cvt-2.c (dg-options): Ditto. * gcc.target/i386/vectorize4-avx.c (dg-final

Re: [Patch, i386] Add minus to list of promotable operators

2011-11-02 Thread Uros Bizjak
Hello! Currently gcc will promote from QI/HI mode to SI mode various operators but not minus. It will however promote a neg followed by an add (add is in the current list of promotable operators and neg is promoted around config/i386/i386.md:16904). This omission can cause RAT stalls in

libgo now builds fine on alpha-pc-linux-gnu (+ results)

2011-11-02 Thread Uros Bizjak
On Wed, Nov 2, 2011 at 5:50 PM, Ian Lance Taylor i...@google.com wrote: #defines with arguments are not working at all. Please consider following testcase: You're right: this approach doesn't work for preprocessor macros with arguments.  Making those work via this approach would be much much

Re: [PATCH Atom] Fix for PR target/50962 (bad AGU stall avoidance)

2011-11-03 Thread Uros Bizjak
Hello! Here is a fix for PR 50962. Fix improves AGU stall avoidance optimization by adding opportunity to emit lea instead of mov when it is profitable. 2011-11-03 Enkovich Ilya ilya.enkov...@intel.com PR target/50962 * config/i386/i386-protos.h (ix86_use_lea_for_mov): New.

[PATCH, i386]: Use {} for multi-line preparation statements.

2011-11-03 Thread Uros Bizjak
Hello! No functional change. 2011-11-03 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md: Use {} for multi-line preparation statements. Bootstrapped and regression tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index: i386.md

[PATCH, i386]: Use operands[N] consistently in i386.md

2011-11-03 Thread Uros Bizjak
Hello! For some reason, several expanders use operandN internal variable instead of operands[N] from the array. Attached patch fixes this oversight. 2011-11-03 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (lroundX87MODEF:modeSWI248x:mode2, rintmode2, floormode2

Re: [PATCH] Fix up floatunsv{4,8}siv{4,8}sf2

2011-11-03 Thread Uros Bizjak
On Thu, Nov 3, 2011 at 6:54 PM, Jakub Jelinek ja...@redhat.com wrote: As mentioned in the last mail, the testcase in that patch shows a bug in the unsigned int - float vectorization on i?86/x86_64.  E.g. 0x808fU converted to float by scalar code is 0x1.02p+31, but by vector code is

[PATCH]: Handle STRICT_LOW_PART in slim RTL dumps

2011-11-03 Thread Uros Bizjak
Hello! Currently slim RTL dump prints STRICT_LOW_PART as: 48 strict_low_part=flags:CCZ!=0 Attached patch fixes these dumps to print: 48 strict_low_part(ax:QI)=flags:CCZ!=0 2011-11-03 Uros Bizjak ubiz...@gmail.com * sched-vis.c (print_value): Handle STRICT_LOW_PART. Tested

Re: Many testsuite failures on x86_64 due recent fix about f16cintrin.h header

2011-11-07 Thread Uros Bizjak
Hello! Attached patch fixes all remaining i386 testsuite failures. The header did say that we can include it also through immintrin.h ... 2011-11-07 Uros Bizjak ubiz...@gmail.com * config/i386/f16cintrin: Remove extra _X86INTRIN_H_INCLUDED check. Tested on x86_64-pc-linux-gnu {,-m32

[PATCH, testsuite]: Do not cache check_effective_target_sync_{long_long,int_128} results

2011-11-07 Thread Uros Bizjak
/atomic-other-int128.c -O2 -g (test for excess errors) FAIL: gcc.dg/simulate-thread/atomic-other-int128.c -O3 -g (test for excess errors) FAIL: gcc.dg/simulate-thread/atomic-other-int128.c -Os -g (test for excess errors) 2011-11-07 Uros Bizjak ubiz...@gmail.com * lib/target

[PATCH, testsuite]: Fix FAIL: gcc.target/i386/pr49781-1.c scan-assembler-not for atom

2011-11-07 Thread Uros Bizjak
Hello! 2011-11-07 Uros Bizjak ubiz...@gmail.com * gcc.target/i386/pr49781-1.c (dg-options): Add -mtune=generic. Tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index: gcc.target/i386/pr49781-1.c

Re: [PATCH] Gather vectorization (PR tree-optimization/50789, take 2)

2011-11-07 Thread Uros Bizjak
On Fri, Nov 4, 2011 at 2:22 PM, Jakub Jelinek ja...@redhat.com wrote: On Fri, Nov 04, 2011 at 12:21:49PM +0100, Richard Guenther wrote: Ok.  I guess it's ok to use builtins for now - I didn't think of the memory reference issue ;) Based on IRC discussion I'm posting an updated patch (both

Re: [PATCH] Vectorize lrint on x86_64/i686 -m32 -mavx using 32-byte vectors

2011-11-07 Thread Uros Bizjak
On Mon, Nov 7, 2011 at 7:38 PM, Jakub Jelinek ja...@redhat.com wrote: BUILT_IN_LRINT has been vectorized just using 16-byte vectors, the following patch cures it (of course, for -m64 it unfortunately can't be vectorized, as long there is DImode rather than SImode). Hm... Looking at

[PATCH, i386]: Vectorize BUILT_IN_{I,LL}RINT{,F} when appropriate

2011-11-07 Thread Uros Bizjak
Hello! Attached patch fixes omission from (int) rint () conversion to __builtin_irint (). We can vectorize this function when out_mode is SImode, no matter how the builtin is called. Throw in also BUILT_IN_LLRINT, just for completion ... 2011-11-07 Uros Bizjak ubiz...@gmail.com

Re: [PATCH] Emit vperm2[if]128 $0x12/$0x20 as vinsert[if]128 $0/$1

2011-11-08 Thread Uros Bizjak
On Mon, Nov 7, 2011 at 10:20 PM, Jakub Jelinek ja...@redhat.com wrote: I think it is at least more readable and perhaps for some CPUs could be faster (for SandyBridge it is the same speed) if we emit a more specialized insn over a more generic one. Bootstrapped/regtested on x86_64-linux and

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