Re: [PATCH] Reduce floating-point difficulties in timevar.cc

2023-07-21 Thread Xi Ruoyao via Gcc-patches
t guard it with #ifdef __GNUC__. And IMO it's just hiding the real problem. We need more info of the "particular machine". Is this a hardware bug (i.e. the machine violates the AArch64 spec) or a GCC code generation issue? Or should we generally use -ffp-contract=off in BOOT_CFLAGS? -

Re: [PATCH] Reduce floating-point difficulties in timevar.cc

2023-07-21 Thread Xi Ruoyao via Gcc-patches
ger floating > point rounding inaccuracies?) It's possible that the test itself is flaky. Can you provide some detail about how it fails? -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH] Reduce floating-point difficulties in timevar.cc

2023-07-21 Thread Xi Ruoyao via Gcc-patches
On Fri, 2023-07-21 at 16:58 +0300, Alexander Monakov wrote: > > On Fri, 21 Jul 2023, Xi Ruoyao via Gcc-patches wrote: > > > Perhaps -ffp-contract=on (not off) is enough to fix the issue (if you > > are building GCC 14 snapshot).  The default is "fast" (if no -

Re: [PATCH 2/9] LoongArch: Fix default ISA setting

2023-08-08 Thread Xi Ruoyao via Gcc-patches
rom implementing -mabi=ilp32d - march=loongarch64 and they should be fixed. They are not our excuse to blindly "simulate" what RISC-V has. -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

2023-08-11 Thread Xi Ruoyao via Gcc-patches
t_op & GET_MODE_MASK (int_mode), > +       GET_RTX_NAME (adjusted_code), n); >     } >   poly_int64 offset = (BYTES_BIG_ENDIAN >    ? 0 >    : (GET_MODE_SIZE (int_mode) >   - GET_MODE_SIZE (narrow_mode_iter))); >   *pop0 = adjust_address_nv (op0, narrow_mode_iter, offset); > - *pop1 = GEN_INT (n); > + *pop1 = gen_int_mode (n, narrow_mode_iter); >   return adjusted_code; > } > } -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH v1] LoongArch:Implement 128-bit floating point functions in gcc.

2023-08-06 Thread Xi Ruoyao via Gcc-patches
only used once? > + tree type,ftype; > + tree const_string_type > + > =build_pointer_type(build_qualified_type(char_type_node,TYPE_QUAL_CONST)); Really bad format. In GNU coding standard you should have a white space after '=', and before '(', etc. Please fix the formatting everywhere. -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH v2] LoongArch:Implement 128-bit floating point functions in gcc.

2023-08-07 Thread Xi Ruoyao via Gcc-patches
t; +} Same logic error. And this seems exactly same as nanq, the analogous is definitely wrong because __builtin_nanq should return a quiet NaN, but __builtin_nansq should return a signaling NaN. -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH v2] LoongArch:Implement 128-bit floating point functions in gcc.

2023-08-07 Thread Xi Ruoyao via Gcc-patches
On Tue, 2023-08-08 at 10:24 +0800, Xi Ruoyao wrote: And I think this way to implement these functions (using libgcc calls) is not the best. On 64-bit LoongArch a __float128 is stored in a pair of GPR, so operations like copysignq and absq can be implemented much more efficiently by expanding

Re: [PATCH v2 01/14] LoongArch: Introduce loongarch32 target

2023-08-09 Thread Xi Ruoyao via Gcc-patches
8. Unfortunately for LP64 ABI _ABILP64 is already a part of public API. I've tried to raise a deprecation warning for them, but it seems doing so needs a major change in libcpp... However ILP32 ABI is "fresh new" so we should take the advantage to remove the historic burden. -- Xi

Re: [PATCH v2 11/14] LoongArch: Mark am* instructions as LA64-only

2023-08-09 Thread Xi Ruoyao via Gcc-patches
>     (set (match_dup 1) > (match_operand:GPR 2 "register_operand" "r"))] > -  "" > +  "TARGET_64BIT" >    "amswap%A3.\t%0,%z2,%1" >    [(set (attr "length") (const_int 8))]) >   > @@ -182,7 +182,7 @@ >    [(match_operand:QI 0 "register_operand" "") ;; bool output >     (match_operand:QI 1 "memory_operand" "+ZB")    ;; memory >     (match_operand:SI 2 "const_int_operand" "")]   ;; model > -  "" > +  "TARGET_64BIT" >  { >    /* We have no QImode atomics, so use the address LSBs to form a mask, >   then use an aligned SImode atomic.  */ -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

2023-08-09 Thread Xi Ruoyao via Gcc-patches
t; +mscatter > +Target > +Enable vectorization for scatter instruction. > + >  mpreferred-stack-boundary= >  Target RejectNegative Joined UInteger > Var(ix86_preferred_stack_boundary_arg) >  Attempt to keep stack aligned to this power of 2. -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH v5] MIPS: Add speculation_barrier support

2023-06-16 Thread Xi Ruoyao via Gcc-patches
to close it. -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH 1/2] c++: implement __is_const built-in trait

2023-06-24 Thread Xi Ruoyao via Gcc-patches
@ > +// { dg-do compile { target c++11 } } > + > +#include > + > +using namespace __gnu_test; > + > +#define SA(X) static_assert((X),#X) > + > +// Positive tests. > +SA(__is_const(const int)); > +SA(__is_const(const volatile int)); > +SA(__is_const(cClassType)); > +SA(__is_const(cvClassType)); > + > +// Negative tests. > +SA(!__is_const(int)); > +SA(!__is_const(volatile int)); > +SA(!__is_const(ClassType)); > +SA(!__is_const(vClassType)); -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH] i386: add -fno-stack-protector to two tests

2023-06-29 Thread Xi Ruoyao via Gcc-patches
On Fri, 2023-06-30 at 04:08 +0800, Xi Ruoyao wrote: > On Thu, 2023-06-29 at 16:01 -0400, Marek Polacek via Gcc-patches wrote: > > These tests fail when the testsuite is executed with -fstack- > > protector-strong. > > To avoid this, this patch adds -fno-stack-pr

Re: [PATCH] i386: add -fno-stack-protector to two tests

2023-06-29 Thread Xi Ruoyao via Gcc-patches
> @@ -1,5 +1,5 @@ >  /* { dg-do compile } */ > -/* { dg-options "-O3" } */ > +/* { dg-options "-O3 -fno-stack-protector" } */ >   >  static inline void memset_s(void* s, int n) { >    volatile unsigned char * p = s; > > base-commit: 070a6bf0bdc6761ad77ac97404c98f00a7007d54 -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH v1 2/6] LoongArch: Added Loongson SX base instruction support.

2023-06-30 Thread Xi Ruoyao via Gcc-patches
On Fri, 2023-06-30 at 10:16 +0800, Chenghui Pan wrote: > +(define_c_enum "unspec" [ > +  UNSPEC_LSX_ASUB_S > +  UNSPEC_LSX_VABSD_U > +  UNSPEC_LSX_VAVG_S /* ... */ To me many of them can be modeled using RTL templates, instead of an unspec. -- Xi Ruoyao Schoo

Re: [PATCH v1 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

2023-06-30 Thread Xi Ruoyao via Gcc-patches
+ >  gcc/config/loongarch/predicates.md    |  333 +- >  25 files changed, 28723 insertions(+), 290 deletions(-) >  create mode 100644 gcc/config/loongarch/lasx.md >  create mode 100644 gcc/config/loongarch/lasxintrin.h >  create mode 100644 gcc/config/loongarch/lsx.md >  create mode 100644 gcc/config/loongarch/lsxintrin.h > -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Re: [PATCH v1 2/6] LoongArch: Added Loongson SX base instruction support.

2023-06-30 Thread Xi Ruoyao via Gcc-patches
P64D anymore), or we add some special switch for it (like x86's -msseregparm and sseregparm attribute). -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

[PATCH] LoongArch: Set default alignment for functions and labels with -mtune

2023-06-13 Thread Xi Ruoyao via Gcc-patches
The LA464 micro-architecture is sensitive to alignment of code. The Loongson team has benchmarked various combinations of function, the results [1] show that 16-byte label alignment together with 32-byte function alignment gives best results in terms of SPEC score. Add a mtune-based table-driven

Re: [PATCH] rs6000: replace '(const_int 0)' to 'unspec:BLK [(const_int 0)]' for stack_tie

2023-06-14 Thread Xi Ruoyao via Gcc-patches
On Wed, 2023-06-14 at 09:55 +0800, Jiufu Guo wrote: > Hi, > > Xi Ruoyao writes: > > > On Tue, 2023-06-13 at 20:23 +0800, Jiufu Guo via Gcc-patches wrote: > > > > > Compare with previous version, this addes ChangeLog and removes > > > const_anchor part

Re: [pushed] wwwdocs: Add GCC Code of Conduct

2023-06-20 Thread Xi Ruoyao via Gcc-patches
e link should be "../conduct.html" :). > + >   -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

Pushed: [PATCH v2 4/7] fortran: use grep instead of fgrep

2023-05-11 Thread Xi Ruoyao via Gcc-patches
On Wed, 2023-05-10 at 22:02 +0200, Thomas Koenig wrote: > On 10.05.23 21:29, Bernhard Reutner-Fischer via Fortran wrote: > > On Mon, 27 Jun 2022 14:10:36 +0800 > > Xi Ruoyao wrote: > > > > > fgrep has been deprecated in favor of grep -F for a long time, and th

Re: [PATCH v3] Machine_Mode: Extend machine_mode from 8 to 16 bits

2023-05-16 Thread Xi Ruoyao via Gcc-patches
can only a dedicate a certain amount of > the day to reviews.  And reviewing patches can be time-consuming in > itsself. > > So sometimes a patch will get a review within the day.  Sometimes it > will take a bit longer.  The fact that a patch doesn't get a response > within one wor

Pushed: [PATCH] build: Use -nostdinc generating macro_list [PR109522]

2023-05-06 Thread Xi Ruoyao via Gcc-patches
On Sat, 2023-04-29 at 12:05 -0600, Jeff Law wrote: > > > On 4/15/23 06:01, Xi Ruoyao via Gcc-patches wrote: > > This prevents a spurious message building a cross-compiler when > > target > > libc is not installed yet: > > > > cc1: error: no i

Pushed: [PATCH v2] LoongArch: Enable shrink wrapping

2023-05-06 Thread Xi Ruoyao via Gcc-patches
On Wed, 2023-04-26 at 21:29 +0800, Xi Ruoyao via Gcc-patches wrote: > > > >    Do you have any questions about the test cases mentioned by > > Guo > > Jie? If there is no problem, modify the test case, > > > > I think the code can be merged into the mai

Re: [PATCH] LoongArch: Enable shrink wrapping

2023-05-06 Thread Xi Ruoyao via Gcc-patches
ry long. I will reply the result as soon as the test results > > come out.:-) > > > Oh, I got. Thanks very much for all the tests and take your time! Sorry if it's noisy, but I hope there is some (maybe preliminary) result: now I finally have some spare time to rebuild the system with GCC 13 and I'd like to use some -falign-functions= in my CFLAGS :). -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

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