Commit: RX: Fix typo in description of RX vector attribute

Hi Guys, I am checking in the patch below to fix a small typo in the description of the RX vector function attribute. Cheers Nick gcc/ChangeLog 2014-06-26 Nick Clifton ni...@redhat.com * doc/extend.texi (Function Attributes): Fix typo in description of RX vector

Commit: Testsuite: Fix typo in proc check_effective_target_trapping

Hi Guys, I am applying the patch below as an obvious fix for a typo in the check_effective_target_trapping proc in the testsuite's target-supports.exp file. Cheers Nick gcc/testsuite/ChangeLog 2014-06-26 Nick Clifton ni...@redhat.com * lib/target-supports.exp

Commit: FRV: Remove redundant assert

Hi Guys, I am checking in the patch below to remove a redundant assert, now that DECL_SECTION_NAME returns a string rather than a tree. Cheers Nick gcc/ChangeLog 2014-06-26 Nick Clifton ni...@redhat.com * config/frv/frv.c (frv_in_small_data_p): Remove redundant assert. Index

Commit: RX:

where a register was pushed onto the stack was off by 4 bytes. Cheers Nick gcc/ChangeLog 2014-07-24 Nick Clifton ni...@redhat.com * config/rx/rx.md (stack_push): Adjust RTL to account for the fact that operations are taking place in parallel. * config/rx.h

RL78: Add support for assembler G10 multiply/divide functions to libgcc

Hi Guys, I am applying the patch below to add support for G10 versions of the RL78 assembler multiply and divide functions to the libgcc library. Cheers Nick libgcc/ChangeLog 2014-11-13 Nick Clifton ni...@redhat.com * config/rl78/divmodhi.S: Add support for the G10 architecture

Commit: Rl78: Save ES register in interrupt handlers

Nick gcc/ChangeLog 2014-11-21 Nick Clifton ni...@redhat.com * config/rl78/rl78-real.md (movqi_from_es): New pattern. * config/rl78/rl78.c (struct machine_function): Add uses_es field. (rl78_expand_prologue): Save the ES register in interrupt handlers that use

Commit: MSP430: Improve -mhwmult= opton and fix prologues and epilogues for naked functions

generation in that code in function.c expects some RTL to be returned, even if the function is naked. Cheers Nick gcc/ChangeLog 2014-09-29 Nick Clifton ni...@redhat.com * config/msp430/msp430.c (msp430_expand_prologue): Return a CLOBBER rtx for naked functions

RFA: RL78: Fix handling of (SUBREG (SYMBOL_REF))

to apply ? Cheers Nick gcc/ChangeLog 2014-04-01 Nick Clifton ni...@redhat.com * config/rl78/rl78-expand.md (movqi): Handle (SUBREG (SYMBOL_REF)) properly. Index: gcc/config/rl78/rl78-expand.md === --- gcc/config/rl78

RFA: x86 backend: Add default-manifest to Cygwin/MinGW links

will have to become a new dependency for the Cygwin and MinGW projects. Cheers Nick gcc/ChangeLog 2014-04-23 Nick Clifton ni...@redhat.com * config/i386/cygwin.h (ENDFILE_SPEC): Include default-manifest.o if it can be found in the search path. * config/i386/mingw32

Commit: MSP430: Enhance -mhwmult option

options so that the last one specified takes precedence. Cheers Nick gcc/ChangeLog 2014-04-23 Nick Clifton ni...@redhat.com * config/msp430/msp430.c (msp430_handle_option): Move function to msp430-common.c (msp430_option_override): Simplify mcu and mcpu option handling

Commit: Fix building ARC, M32C and M32R backends

: error: invalid conversion from 'int' to 'machine_mode' [-fpermissive] It happens because all of these backends use an integer to hold a machine mode value instead of an enum. The simple fix is to use the enum instead. Cheers Nick gcc/ChangeLog 2014-04-29 Nick Clifton ni...@redhat.com

Commit: MSP430: Fix bugs in MSP430 backend

interrupt handlers when in fact it is interrupt safe. * The umulsidi3 pattern used the wrong address for the second operand. Tested with an msp430-elf toolchain with no regressions. Cheers Nick gcc/ChangeLog 2014-04-29 Nick Clifton ni...@redhat.com * config/msp430

RFA: Fix calculation of size of builtin setjmp buffer

for an rl78-elf toolchain. OK to apply ? Cheers Nick 2014-05-06 Nick Clifton ni...@redhat.com * except.c (init_eh): Fix computation of builtin setjmp buffer size. Index: gcc/except.c === --- gcc/except.c

Commit: MSP430: Fix gcc.c-torture/execute/20050826-2.c

r7))) it became confused and thought that only r7 was being set, not r7 and r8. Changing the output constraint to +r prevents this from happening. Cheers Nick ChangeLog 2014-05-20 Nick Clifton ni...@redhat.com * config/msp430/msp430.md (zero_extendpsisi2): Use + constraint

Commit: MSP430: Fix some gcc testsuite failures

was that the zero_extendpsisi2 pattern was confusing gcc about the number of hard registers needed to hold an SImode value. The second fixes a problem with expanding va_arg when pointers are not a multiple of the word size. Cheers Nick gcc/ChangeLog 2014-05-20 Nick Clifton ni...@redhat.com

Commit: MSP430: Add spaces after options inserted by ASM_SPEC

unintelligible options. Cheers Nick gcc/ChangeLog 2014-05-22 Nick Clifton ni...@redhat.com * config/msp430/msp430.h (ASM_SPEC): Add spaces after inserted options. Index: gcc/config/msp430/msp430.h === --- gcc/config

Commit: MSP430: Built libgcc with hardware multiply disabled

even when it was not clear that it would be supported by the target MCU. The fix is just to disable the use of hardware multiplies inside libgcc. Cheers Nick libgcc/ChangeLog 2014-05-22 Nick Clifton ni...@redhat.com * config/msp430/t-msp430 (HOST_LIBGCC2_CFLAGS): Add

Commit: RX: Correctly honour user specified alignment of jumps, loops and labels

Hi Guys, I am applying the patch below to fix a small problem with the RX port - it was using non-log based alignment values for jumps, loops and labels when user specified alignment was enabled. Cheers Nick gcc/ChangeLog 2014-06-13 Nick Clifton ni...@redhat.com * config/rx

Commit: MSP430: Add NOP after DINT in hardware multiply patterns

it has to be a NOP. The change is going in to the mainline sources and the 4.9 branch. Cheers Nick gcc/ChangeLog 2014-06-17 Nick Clifton ni...@redhat.com * config/msp430/msp430.md (mulhisi3): Add a NOP after the DINT. (umulhi3, mulsidi3, umulsidi3): Likewise. Index: gcc

RFA: RL78: Fix UMUL and $FP size

gcc/ChangeLog 2014-01-29 Nick Clifton ni...@redhat.com DJ Delorie d...@redhat.com * config/rl78/rl78.c (register_sizes): Make the upper half of %fp 2 to keep registers after it properly word-aligned. (rl78_alloc_physical_registers_umul): Handle the case where

RFA: MN10300: Fix typo store_movm pattern

- mn10300_store_multiple_operation_p mn10300_store_multiple_operation_p - mn10300_store_multiple_regs Cheers Nick gcc/ChangeLog 2014-01-29 Nick Clifton ni...@redhat.com * config/mn10300/mn10300.md (store_movm): Fix typo. Index: gcc/config/mn10300/mn10300.md

Re: RFA: MN10300: Fix typo store_movm pattern

Hi Jeff, Agreed, the naming seems awfully confusing right now. Feel free to go forward with fixing that :-) Done - thanks! Cheers Nick

RFA: MN10300: Fix building libstdc++-v3

class however is the mn10300_register_move_cost() function which tells it that it only costs 2 to move via those registers. Hence the patch below. With the patch applied the libstdc++-v3 library now builds. OK to apply ? gcc/ChangeLog 2014-02-03 Nick Clifton ni...@redhat.com

Re: RFA: MN10300: Fix building libstdc++-v3

registers to match some classes even in MN10300. So how about the patch below ? This also allows the libstdc++-v3 library to be built. Cheers Nick gcc/ChangeLog 2014-02-04 Nick Clifton ni...@redhat.com * config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Do not accept

RFA: MN10300: Include saved registers in stack usage

, but there is one thing that I am not sure about - is it OK to use __builtin_popcount() or should I be calling some other function ? Tested with no regression on an mn10300-elf toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2014-02-05 Nick Clifton ni...@redhat.com * config

Re: RFA: MN10300: Include saved registers in stack usage

Hi Jeff, According to our coding conventions, the ability to build with something other than gcc is still desirable. You could argue that you're unlikely to be bootstrapping on a mn103 with something other than GCC and if you're building a cross, you could start by first building gcc native.

Re: [PATCH] Fix ARM dwarf2cfi ICE and unwind info issues (PR target/59575)

Hi Jakub, 2014-01-30 Jakub Jelinek ja...@redhat.com PR target/59575 * config/arm/arm.c (emit_multi_reg_push): Add dwarf_regs_mask argument, don't record in REG_FRAME_RELATED_EXPR registers not set in that bitmask. (arm_expand_prologue): Adjust all

RFA: RL78: Add missing instruction patterns

/bf.c gcc.dg/20050922-1.c OK to apply ? Cheers Nick gcc/ChangeLog 2014-02-14 Nick Clifton ni...@redhat.com * config/rl78/rl78-expand.md (xorhi3): New pattern. * config/rl78/rl78-virt.md (andhi3_virt): New pattern. (nandhi3_virt): New pattern

RFA: Fix some gcc tests for 16-bit targets

. OK to apply ? Cheers Nick gcc/testsuite/ChangeLog 2014-02-17 Nick Clifton ni...@redhat.com * gcc.dg/c-torture/execute/pr43220.c: Use a long integer to count the iterations. * gcc.c-torture/execute/pr58570.c: Use a long integer to hold a 29-bit bitfield

Re: RFA: RL78: Add missing instruction patterns

patch below removes them, Cheers Nick gcc/ChangeLog 2014-02-18 Nick Clifton ni...@redhat.com * config/rl78/rl78-real.md (cbranchsi4_real_signed): Add anti-cacnonical alternatives. (negandhi3_real): New pattern. * config/rl78/rl78-virt.md (negandhi3_virt): New

Re: RFA: Fix some gcc tests for 16-bit targets

Hi Richard, Instead of modifying testcases I'd be less nervous if you'd make them require 32bit. Otherwise you should reproduce the original issues with the modified testcases. OK, I can do that. How about this patch. OK to apply ? Cheers Nick gcc/testsuite/ChangeLog 2014-02-18 Nick

Commit: Xstormy16: Add modes to post_inc and pre_dec patterns

Hi Guys, I am applying the patch below to add modes to the POST_INC and PRE_DEC patterns in the XStormy16 backend. The lack of the modes was leading to some build problems. Cheers Nick gcc/ChangeLog 2014-02-21 Nick Clifton ni...@redhat.com * config/stormy16/stormy16.md

Commit: MSP430: Add hardware multiply routines to libgcc

Hi Guys, I am applying the patch below to add libgcc functions to support hardware multiplies on the MSP430. Cheers Nick libgcc/ChangeLog 2014-03-06 Nick Clifton ni...@redhat.com * config/msp430/t-msp430 (LIB2ADD): Add lib2hw_mul.S * config/msp430/lib2hw_mul.S: New

Commit:

Hi Guys, I am applying the patch below as an obvious fix. It adds a missing @gol to the end of one of the option list lines and it removes a superfluous second functions from the description of the -mhotpatch option. Cheers Nick gcc/ChangeLog 2014-09-09 Nick Clifton ni

Commit: RL78: Fix poping of registers in G10 mode

A to the correct register) because the popped values were never used. Cheers Nick gcc/ChangeLog 2014-09-19 Nick Clifton ni...@redhat.com * config/rl78/rl78.c (rl78_expand_epilogue): Generate a USE of the pop'ed registers so that DCE does not eliminate them. Index: gcc/config/rl78

Commit: SH: Fix typo in atomic fetch sequence

Hi Alex, Hi Kaz, Hi Oleg, I am applying the patch below as an obvious fix for a typo in the instruction sequence of the atomic_fetch_nandmode_soft_imask pattern. I hope that this is OK with you. Cheers Nick gcc/ChangeLog 2014-09-25 Nick Clifton ni...@redhat.com PR target

Re: [PATCH, libgcc, ARM] __gnu_f2h_internal inaccuracy

Hi John, John Tytgatj...@bass-software.com * config/arm/fp16.c (__gnu_f2h_internal): Fix inaccuracy. Approved and applied. Cheers Nick

RFA: RL78: Always select register bank 0 at the start of an ISR

that this happens. No regressions with a rl78-elf toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2013-01-03 Nick Clifton ni...@redhat.com * config/rl78/rl78.c (rl78_expand_prologue): Always select register bank 0 at the start of an interrupt handler. Index: gcc/config/rl78/rl78.c

RFA: RL78: Correct values of the MDBL and MDBH registers

/ChangeLog 2013-01-03 Nick Clifton ni...@redhat.com * config/rl78/rl78.md (mulsi3_g13): Correct values for MDBL and MDBH registers. Index: gcc/config/rl78/rl78.md === --- gcc/config/rl78/rl78.md (revision 194833

Commit: V850: Only compile callt support functions when CALLT is enabled

relocation error for these functions due to the way that they are implemented. Tested with no regressions on a v850-elf toolchain. Cheers Nick libgcc/ChangeLog 2013-01-04 Nick Clifton ni...@redhat.com * config/v850/lib1funcs.S: Only provide CALLT support functions

Commit: V850: Fix floating point comparisons, branches and conditional stores

patterns. Tested with no regressions on a v850e2v3-elf toolchain. Cheers Nick gcc/ChangeLog 2013-01-09 Nguyen Duy Dat Nick Clifton ni...@redhat.com * config/v850/v850.md (cbranchsf4): New pattern. (cstoresf4): New pattern. (cbranchdf4): New pattern

Re: v850 ld error

Hi Joel, Well Doh! The gcc-abi and 8byte multilib variants appeared to have been added around 2012-11-20 by Nick Clifton. I think he missed changing the ASM_SPEC in gcc/config/v850/rtems.h when he added it. v850-rtems-gcc wasn't passing in the expected cpu specification flags. Nick.. how does

Re: PING: gcc.target/arm: skip 5 tests for flag conflicts

Hi Janis, Back in September I submitted a patch to fix five ARM tests in http://gcc.gnu.org/ml/gcc-patches/2012-09/msg01515.html. You responded in http://gcc.gnu.org/ml/gcc-patches/2012-10/msg00972.html and I answered your questions in a reply. I believe that Richard's main point was that

Re: [testsuite] remove ARM big-endian from some vect effective targets

Hi Janis, 2013-01-15 Janis Johnson jani...@codesourcery.com PR testsuite/54622 * lib/target-supports.exp (check_effective_target_vect_perm_byte, check_effective_target_vect_perm_short, check_effective_target_vect_widen_mult_qi_to_hi_pattern,

Re: [testsuite] add option to LTO flags for c-torture/execute/builtins tests

Hi Janis, 2013-01-15 Janis Johnson jani...@codesourcery.com PR testsuite/55994 * gcc.c-torture/execute/builtins/builtins.exp: Add -Wl,--allow-multiple-definition for eabi and elf targets. Approved - please apply. Cheers Nick

Re: [testsuite] fix ARM test gcc.target/arm/neon-vld1_dupQ.c

Hi Janis, 2013-01-14 Janis Johnson jani...@codesourcery.com * gcc.target/arm/neon-vld1_dupQ.c: Use types that match function prototypes. Approved - please apply. Cheers Nick

Re: [testsuite] replace gcc.target/arm/ftest-*.c with compile-only tests

Hi Janis, The gcc.target/arm/ftest-*.c tests check various macros that are set for ARM targets by setting flags based on preprocessor directives that check those macros. The tests are skipped if the current test platform doesn't support executing programs for the architecture for which flags

Re: PING: gcc.target/arm: skip 5 tests for flag conflicts

Hi Janis, Now I get it. This version is more selective about which multilibs are skipped. I tested it by using multilib test flags for all valid values for -march, with and without -mthumb as appropriate for the arch. The ones that are now skipped are the ones that used to fail with

Re: [testsuite] replace gcc.target/arm/ftest-*.c with compile-only tests

Hi Janis, 2013-01-16 Janis Johnson jani...@codesourcery.com * gcc.target/arm/ftest-support.h: Replace for compile-only tests. * gcc.target/arm/ftest-support-arm.h: Delete. * gcc.target/arm/ftest-support-thumb.h: Delete. * gcc.target/arm/ftest-armv4-arm.c: Replace with

RFA: RL78: Allow SP to be used as a base register

/ChangeLog 2013-01-28 Nick Clifton ni...@redhat.com * config/rl78/rl78.c (rl78_regno_mode_code_ok_for_base_p): Allow SP_REG. Index: gcc/config/rl78/rl78.c === --- gcc/config/rl78/rl78.c (revision 195461) +++ gcc

Re: [PATCH ARM iWMMXt 0/5] Improve iWMMXt support

Hi Matt, Could this patch, or perhaps the much smaller one I attached to bug 35294 be committed to the 4.7 branch? Yes. Done. Also, could you close its duplicates, bugs 36798 and 36966? Sorry no. I do not actually own these PRs, so I cannot close them. :-( Cheers Nick

Commit: V850: Add support for the E3V5 architecture variant

/ChangeLog 2013-01-31 Hiroyuki Ono hiroyuki.ono...@renesas.com Nick Clifton ni...@redhat.com * config/v850/constraints.md (Q): Define as a memory constraint. * config/v850/predicates.md (label_ref_operand): New predicate. (e3v5_shift_operand): New predicate

Re: RFA: MN10300: Add support for SETLB and Lcc instructions

, but I must have gotten something wrong. Any pointers on how to fix this are greatly appreciated. Cheers Nick gcc/ChangeLog 2011-03-08 Nick Clifton ni...@redhat.com * config/mn10300/mn10300.c: Include cfgloop.h. (DUMP): New macro. (mn10300_insert_setlb_lcc): New

Re: [4.7] Avoid global state in v850_handle_option

Hi Joseph, Tested building cc1 and xgcc for cross to v850-elf. Will commit to trunk for 4.7 in the absence of target maintainer objections. No objections - please apply. 2011-03-07 Joseph Myersjos...@codesourcery.com * config/v850/v850-opts.h: New. * config/v850/v850.c

RX: Fixing latency timings for BSET and BLCR insns

Hi Guys, I am applying the attached patch to fix a typo in the timings of the BSET and BCLR instructions for the RX port. Cheers Nick gcc/ChangeLog 2011-03-10 Nick Clifton ni...@redhat.com * config/rx/rx.md (bitset_in_memory, bitclr_in_memory: Fix timings. Index: gcc/config/rx

RX: 4.5 branch: Fix alignment and addressing issues.

Hi Guys, I am checking in the attached patch to fix some regressions in the RX port with regard to alignment and addressing modes. With this patch applied I have 18 fewer failures in the GCC testsuite. Cheers Nick gcc/ChangeLog 2011-03-16 Nick Clifton ni...@redhat.com

Re: RX: 4.5 branch: Fix alignment and addressing issues.

Hi Richard, Do you really need peepholes for this? I would have thought that merely adding the instruction patterns for this would have been enough to encourage combine to do its job merging these patterns... I thought so too, but I found in my tests that combine was missing plenty of cases

Re: RX: 4.5 branch: Fix alignment and addressing issues.

Hi Richard, What is length used for in the rx port? I don't see any branch shortening going on here; out of range branches are completely handled by the assembler. You might be better off simply deleting the length attribute, so that the compiler skips the bulk of the shorten_branches pass.

invoke.texi: Fix minor typos

Hi Gerald, Hi Jospeh, The patch below fixes a bunch of minor typos in the invoke.texi file. I suspect that it might qualify as obvious, but I though that I ought to run it past you first. OK to apply ? Cheers Nick gcc/ChangeLog 2011-03-21 Nick Clifton ni...@redhat.com

Fix typo on cygming.h

day, so it is best to clean up the macro definition. Tested by building an i686-pc-cygwin toolchain. Cheers Nick gcc/ChangeLog 2011-03-22 Nick Clifton ni...@redhat.com * config/i386/cygming.h (SUBTARGET_OVERRIDE_OPTIONS): Remove trailing backslash from the end of the macro

Commit: RX: Add alignment for jumps, loops and labels

Hi Guys, I am applying the patch below to add alignment control for jumps, loops and labels to the RX backend. Tested without regressions on an rx-elf target. Cheers Nick gcc/ChangeLog 2011-03-24 Nick Clifton ni...@redhat.com * config/rx/rx.h (LABEL_ALIGN_FOR_BARRIER

Add support for DragonFlyBSD target to top level configure

Hi Guys, I am propagating the attached patch from the binutils source tree. It adds support for the DragonFlyBSD target to the top level configure script. Cheers Nick ./ChangeLog 2011-03-26 John Marino binut...@marino.st * configure.ac: Add support for *-*-dragonfly*

Re: PING^3: PR 47551: ARM patch for Neon-related spill failure

Hi Richard, Third ping for this ARM-specific reload fix: http://gcc.gnu.org/ml/gcc-patches/2011-01/msg02266.html Tested on arm-linux-gnueabi (-marm and -mthumb). I don't think this is a regression, so: OK to install once 4.7 is open? Yes. gcc/ PR target/47551 *

RX: Sync with 4.6 branch

for the rx_max_skip_for_label function). Cheers Nick gcc/ChangeLog 2011-03-30 Nick Clifton ni...@redhat.com * config/rx/rx.md: Add peepholes and patterns to combine extending loads and simple arithmetic instructions. * config/rx/rx.h (ADJUST_INSN_LENGTH): Define

Re: Add ToLower .opt facility

Hi Joseph, This patch adds a ToLower .opt feature, for option arguments that are case-insensitive and should be converted to a canonical lowercase form. This is relevant to at least mips, mn10300 and rx. This patch makes rx use it, thereby causing an existing spec that tested only for a

Commit: V850: Fix generation of callt helper functions for interrupt handlers

-04-12 Nick Clifton ni...@redhat.com * config/v850/v850.c (expand_prologue): Do not use the CALLT instruction for interrupt handlers if the target is the basic V850 architecture. (expand_epilogue): Likewise. Index: gcc/config/v850/v850.c

Re: Ping: Some remodelling of the ARM vld and vst patterns

Hi Richard, gcc/ * config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the size of a '%A' memory reference. (T_DREG, T_QREG): New neon_builtin_type_bits. (arm_init_neon_builtins): Assert that the load and store operands are neon_struct_operands.

Re: [IQ2000] Use match_test rather than eq/ne symbol_ref

Hi Richard, gcc/ * config/iq2000/iq2000.md: Use match_test rather than eq/ne symbol_ref throughout file. Approved - please apply. Cheers Nick

Re: [M32R] Use match_test rather than eq/ne symbol_ref

Hi Richard, gcc/ * config/m32r/m32r.md: Use match_test rather than eq/ne symbol_ref throughout file. Approved - please apply. Cheers Nick

RFC: ARM: Add comment enumerating emitted .eabi_attribute tags

week. Cheers Nick gcc/ChangeLog 2011-09-27 Nick Clifton ni...@redhat.com * config/arm/arm.c (EMIT_EABI_ATTRIBUTE): New macro. (arm_file_start): Use it to generate .eabi_attribute assembler pseudo-ops. Index: gcc/config/arm/arm.c

Re: RFC: ARM: Add comment enumerating emitted .eabi_attribute tags

Hi Ramana, +/* Get the definitions of the ARM EABI Attribute tag values. */ +#define BFD_ARCH_SIZE +#include elf/arm.h Defining BFD_ARCH_SIZE appears to be a bit of a hack. I would also ifdef this inclusion on TARGET_AAPCS since we shouldn't really be caring about object attributes for non

Re: RFC: ARM: Add comment enumerating emitted .eabi_attribute tags

Hi Richard, You should only emit the comment for -dA, I think. Really ? I thought that it was kind of nice to have the comments in the default output. If I go with -dA as the trigger then I assume that it is also OK to add the comments if --verbose-asm is enabled, yes ? Cheers Nick

Commit: RX: Fix problems building libgcc

libgcc/ChangeLog 2011-09-28 Nick Clifton ni...@redhat.com * config/rx/rx-lib.h: Always restrict doubles to the SF type when 64-bit doubles are not enabled. * config/rx/rx-abi.h: Fix extraneous renaming of the floatsisf and floatunsisf functions. Index: libgcc

Commit: RX: Add support for MIN and MAX instructions in QI and HI modes

Hi Guys, I am going to apply the patch below to the RX backend to add support for generating MIN and MAX instructions for HI and QI modes. Cheers Nick gcc/ChangeLog 2011-09-28 Nick Clifton ni...@redhat.com * config/rx/predicates.md (rx_minmax_operand): New predicate

Commit: FRV: Fix problems building toolchain.

information for function prologues when sometimes CALL_ARG_LOCATION notes can be separated from their CALL insns. Cheers Nick gcc/ChangeLog 2011-09-29 Nick Clifton ni...@redhat.com Bernd Schmidt ber...@codesourcery.com * config/frv/frvbegin.c: Fix location of unwind

Re: ifcvt cond_exec support rewrite

Hi Bernd, Experiments show that the existing multi-if-block support isn't terribly effective on FRV; before-after comparisons show that by turning it off, there are three spots in gcc that are meaningfully changed, and below 20 in the C benchmarks of SPEC2k. FRV also doesn't build in mainline,

Commit: RX: Codegen bug fixes

and max instructions did not work for the SMAX insn, as the RX does not have narrow mode versions of this insn. Cheers Nick gcc/ChangeLog 2011-10-05 Nick Clifton ni...@redhat.com * config/rx/rx.md (tablejump): Add missing label. (adddi3_internal): Mark operand 0 as early

Commit: RX: Add PID support

-time, rather than link-time, and without the overhead of storing relocations in the executable image. The code was written by DJ Delorie for Renesas and it is now being contributed back to the FSF. Cheers Nick gcc/ChangeLog 2011-10-05 DJ Delorie d...@redhat.com Nick Clifton ni

RFC: ARM: Add comments to emitted .eabi_attribute directives

are in effect) emitted by GCC. It does not have any dependencies upon header files, nor does it attempt to make use of the symbolic names in the actual .eabi_directives. Any objections to this version of the patch ? Cheers Nick gcc/ChangeLog 2011-10-05 Nick Clifton ni...@redhat.com

Re: Commit: RX: Codegen bug fixes

Hi Richard, The SMIN pattern has the same problem. *sigh* Fixed. Cheers Nick

RFA: Compare Elimination Pass: Fix use of dataflow info

? Cheers Nick gcc/ChangeLog 2011-10-07 Nick Clifton ni...@redhat.com PR middle-end/49801 * compare-elim.c (find_comparisons_in_bb): Use df_get_live_in and df_get_live_out instead of accessing the bitmaps directly. (execute_compare_elim_after_reload): Remove calls

Commit: ARM: Add comments to emitted .eabi_attribute directives

Hi Guys, I am checking in the patch below to add comments to the .eabi_attribute assembler directives emitted by the ARM backend, when commented assembler output is enabled. Cheers Nick gcc/ChangeLog 2011-10-12 Nick Clifton ni...@redhat.com * config/arm/arm.h

Re: RFA: RL78: Add -fstack-usage support

Hi Eric, On 04/04/12 12:24, Eric Botcazou wrote: You probably need to adjust gcc.dg/stack-usage-1.c too. s/flag_stack_usage/flag_stack_usage_info/ Thanks for the corrections. Revised patch attached. OK for mainline/4.7 branch ? Cheers Nick gcc/ChangeLog 2012-04-04 Nick Clifton ni

Re: RFA: consolidate DWARF strings into libiberty

Hi Tom, Built and regtested on x86-64 Fedora 16. Ok? Tom 2012-03-15 Tom Tromeytro...@redhat.com * dwarf2out.c (dwarf_stack_op_name): Use get_DW_OP_name. (dwarf_tag_name): Use get_DW_TAG_name. (dwarf_attr_name): Use get_DW_AT_name. (dwarf_form_name): Use

Commit: RL78: Remove use of TODO_dump_func

Hi DJ, The optimization pass flag TODO_dump_flag has been removed (see patch committed 2012-04-11) which was causing the RL78 backend to fail to build. I am applying the following patch as an obvious fix. Cheers Nick gcc/ChangeLog 2012-04-13 Nick Clifton ni...@redhat.com

Re: [RFA] dwarf2.h (dwarf_location_atom): Add DW_OP_GNU_addr_index.

Hi Doug, 2012-04-18 Doug Evansd...@google.com * dwarf2.h (dwarf_location_atom): Add DW_OP_GNU_addr_index. Approved - please apply. Cheers Nick

Re: [rx] add initial rtx_costs() function

Hi DJ, Initial implementation of RTX_COSTS target function for rx-elf. Minor increase in coremark scores, and enables division by multiplication of reciprocals, tested on trunk and 4.7. Ok for trunk and/or 4.7 branch? * config/rx/rx.c (TARGET_RTX_COSTS): Define.

RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.

with no regressions on an m32c-elf toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2012-05-02 Nick Clifton ni...@redhat.com PR target/53120 * config/m32c/bitops.md (bset_qi): Change operand 2 from having a 0 constraint to being a (match_dup 0). Index: gcc/config/m32c

Re: RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.

Hi DJ, Make sure a match_dup will still match the generated pattern later, I've had problems with match_dup not matching two rtx that rtx_equals() says are the same but not physically the same. I have tried, but failed, to find a way to trigger the use of the bset_qi pattern. :-( I tried

RFA: Fix detecting of in-tree MPFR 3.1.0 sources

copy of the mpfr 2.4.2 sources, just to make sure that the old paths still worked. Both builds worked. OK to apply ? Cheers Nick gcc/ChangeLog 2012-05-09 Nick Clifton ni...@redhat.com * configure.ac (mpfr-dir): When using in-tree MPFR sources allow for the fact that from

Re: RFA: Fix detecting of in-tree MPFR 3.1.0 sources

Hi Guys, Ok. I think it's nicer for the users if we enable both builds to work. Thanks. I have applied the patch, along with a reference to PR 50461 and a credit to Paul Smith in the ChangeLog entry since he came up with basically the same patch as mine. Cheers Nick

Re: [PATCH, frv-linux] Silence warning

Hi JBG, warning: implicit declaration of function ‘frv_ifcvt_machdep_init’ warning: no previous prototype for ‘frv_ifcvt_machdep_init’ oops! gcc/ 2012-07-21 Jan-Benedict Glaw jbg...@lug-owl.de * config/frv/frv-protos.h: Update copyright year, include

Re: [PATCH, frv-linux] Silence warning

to frv_ifcvt_machdep_init is not used. So I just made it a void * and updated frv.c. Cheers Nick gcc/ChangeLog 2012-07-23 Jan-Benedict Glaw jbg...@lug-owl.de Nick Clifton ni...@redhat.com * config/frv/frv-protos.h (frv_ifcvt_machdep_init): Prototype. * config/frv

Re: [PATCH] PR target/53633; disable return value warnings for naked functions

Hi Sandra, I've updated the patch One suggestion - rather than having architecture specific test files, why not just have a single generic test case with a new dg-require-naked-attribute qualifier. That way the mcore port would be tested as well as the ARM port. I'm not set up to test

Re: [PATCH] PR target/53633; disable return value warnings for naked functions

Hi Sandra, One suggestion - rather than having architecture specific test files, why not just have a single generic test case with a new dg-require-naked-attribute qualifier. That way the mcore port would be tested as well as the ARM port. Something like this? The code part of the patch is

Commit: XStormy16: Add __clrsbhi2() to libgcc

Hi Guys, I am checking in the patch below to add a __clrsbhi2 function to libgcc for the XStormy16 port. This fixes several gcc testsuite failures that need this particular function. Cheers Nick libgcc/ChangeLog 2012-07-31 Nick Clifton ni...@redhat.com * config/stormy16

Commit: FRV: Fix typo in definition of QUAD macro

Hi Guys, I am checking in the patch below as an obvious fix for the definition of the QUAD macro in the FRV backend. Cheers Nick gcc/ChangeLog 2012-07-31 Nick Clifton ni...@redhat.com * config/frv/frv.c (QUAD): Fix typo. Index: gcc/config/frv/frv.c

Commit: FRV: Add support for -fstack-usage

Hi Guys, I am applying the patch below to add support for the -fstack-usage option to the FRV backend. Cheers Nick gcc/ChangeLog 2012-07-31 Nick Clifton ni...@redhat.com * config/frv/frv.c (frv_expand_prologue): Report stack usage. gcc/testsuite/ChangeLog 2012-07-31 Nick

RFA: M32C: Add __clrsbhi2 to libgcc

Hi DJ, The patch below adds an implementation of the __clrsbhi2 function to libgcc for the M32C port. Implementing this function resolves several gcc testsuite failures that rely upon the function being present. Ok to apply ? Cheers Nick libgcc/ChangeLog 2012-07-31 Nick Clifton ni

Commit: XStormy16: Add support for -fstack-usage

Hi Guys, I am checking in the patch below to add support for reporting stack usage by the XStormy16 backend. Cheers Nick gcc/ChangeLog Index: gcc/ChangeLog 2012-07-31 Nick Clifton ni...@redhat.com * config/stormy16/stormy16.c (xstormy16_expand_prologue): Add support

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