+++ b/gcc/testsuite/gcc.target/i386/pr65915.c
@@ -0,0 +1,6 @@
+/* { dg-do run } */
+/* { dg-options -O2 -mavx512f -fpic -mcmodel=medium } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-require-effective-target lp64 } */
+
+#include avx512f-vrndscalepd-2.c
Missing
Hi,
Looks like I missed some splits, which caused PR65915.
Patch below fixes it.
Ok for trunk?
2015-04-28 Ilya Tocar ilya.to...@intel.com
* config/i386/i386.md (define_split): Check for xmm16+,
when splitting scalar float conversion.
---
gcc/config/i386/i386.md
I've renamed EXT_SSE_REG_P into EXT_REX_SSE_REG_P for consistency.
Ok for stage1?
Patch is OK for stage1.
--
Thanks, K
On 19 Mar 12:24, Ilya Tocar wrote:
Hi,
There were some discussion about x constraints being too conservative
for some patterns in i386.md.
Patch
On 17 Apr 10:09, Uros Bizjak wrote:
On Thu, Mar 19, 2015 at 10:24 AM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
There were some discussion about x constraints being too conservative
for some patterns in i386.md.
Patch below fixes it. This is probably stage1 material.
ChangeLog
sed -i s/-O2/-O2 -fno-strict-aliasing/g
../gcc/testsuite/gcc.target/i386/avx*-2.c
Ok for stage1?
Changelog below:
testsuite/
2015-04-03 Ilya Tocar ilya.to...@intel.com
PR target/63211
* gcc.target/i386/avx-cmpsd-2.c: Update test.
* gcc.target/i386/avx-cmpss-2.c
On 03 Apr 13:39, Uros Bizjak wrote:
On Fri, Apr 3, 2015 at 1:02 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
I've looked into avx* tests and many of them (even those that don't fail
in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63211) use invalid type
punning. Properly fixing them
On 02 Feb 13:05, Jakub Jelinek wrote:
On Tue, Jul 29, 2014 at 06:45:01PM +0400, Ilya Tocar wrote:
Hi,
As discussed here in https://gcc.gnu.org/ml/gcc/2014-01/msg00189.html
Gcc should complain about pragma omp declare target without
corresponding pragma omp end declare target
Hi,
There were some discussion about x constraints being too conservative
for some patterns in i386.md.
Patch below fixes it. This is probably stage1 material.
ChangeLog:
gcc/
2015-03-19 Ilya Tocar ilya.to...@intel.com
* config/i386/i386.h (EXT_SSE_REG_P): New.
* config/i386
Hi,
On android dlerror returns const char*.
Ok for trunk?
libgomp/
* target.c (gomp_load_plugin_for_device): Fix type of dlerror
return value.
(DLSYM_OPT): Ditto.
---
libgomp/target.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
I think that fix for avx2 part should be backported to 4.8/4.9
What do you think?
On 14 Jan 14:18, Ilya Tocar wrote:
Hi,
This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64387
Which was caused by different in predicates between vec_unpacks_hi
and vec_extract_hi.
Ok for trunk
Hi,
Looks like new ISA doc [1] renamed srli,slli intrinsics to bsrli,bslli.
This patch adds b* versions, while keeping old srli for backward
compatibility.
OK for trunk?
1:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
ChangeLog:
gcc/
*
Hi,
This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64387
Which was caused by different in predicates between vec_unpacks_hi
and vec_extract_hi.
Ok for trunk?
ChangeLog:
gcc/
PR target/64387
* config/i386/sse.md (vec_unpacks_hi_v8sf): Fix predicate.
Hi,
This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64393
It makes -mavx512vbmi enable avx512bw, as it requires 64-bit masks.
OK for trunk?
ChangeLog:
gcc/
PR target/64393
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI_SET):
Enable AVX512BW.
On 14 Jan 12:36, Uros Bizjak wrote:
On Wed, Jan 14, 2015 at 12:18 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64387
Which was caused by different in predicates between vec_unpacks_hi
and vec_extract_hi.
Why
Hi,
This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64386
Ok for trunk?
ChangeLog:
gcc/
PR target/64386
* config/i386/i386.c (ix86_expand_sse_cmp): Handle V64QImode,
V32HImode.
testsuite/
PR target/64386
* gcc.target/i386/pr64386.c: New
Hi,
Patch bellow adds march/mtune/attribute=knl.
For now this is just silvermont tuning and avx/avx2/avx512 support.
Ok for trunk?
gcc/
* config.gcc: Support knl.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect knl.
* config/i386/i386-c.c
On 04 Dec 15:16, Uros Bizjak wrote:
On Thu, Dec 4, 2014 at 2:53 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Can you add a few testcases?
Isn't it already covered by gcc.dg/torture/vshuf* ?
I didn't see them fail on my machines today.
Those are executable testcases
Hi,
As discussed in https://gcc.gnu.org/ml/gcc-patches/2014-10/msg00473.html
This patch enables v64qi permutations.
I've checked vshuf* tests from dg-torture.exp,
with avx512* options on sde and generated permutations are correct.
OK for trunk?
---
gcc/config/i386/i386.c | 85
Ping.
On 19 Nov 16:34, Ilya Tocar wrote:
As omp target and offloading support is committed to trunk,
I think it's reasonable to add some new warnings.
On 06 Nov 15:27, Ilya Tocar wrote:
Ping.
On 30 Oct 18:31, Ilya Tocar wrote:
Ping.
On 20 Oct 19:26, Ilya Tocar wrote:
Ping
On 04 Dec 13:51, Uros Bizjak wrote:
On Thu, Dec 4, 2014 at 1:45 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Thu, Dec 4, 2014 at 1:04 PM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Dec 04, 2014 at 04:00:27AM -0800, H.J. Lu wrote:
Can you add a few testcases?
Isn't it already
I saw
FAIL: gcc.dg/vect/costmodel/i386/costmodel-fast-math-vect-pr29925.c
scan-tree-dump-times vect vectorized 1 loops 1
FAIL: gcc.dg/vect/costmodel/x86_64/costmodel-fast-math-vect-pr29925.c
scan-tree-dump-times vect vectorized 1 loops 1
FAIL:
I think using cpuid for that is just fine. __builtin_cpu_supports
is for ISA additions users might actually want to version code for,
MPX stuff, as the instructions are nops without hw support, are not
something one would multi-version a function for.
If anything, AVX512F and
Hi,
As proposed in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63853
this patch replaces some function calls with pointer arithmetic.
I didn't mention PR in Changelog, as they are not actually related.
Ok for trunk?
gcc/
* gcc.c (handle_foffload_option): Remove unnecessary calls to
On 20 Nov 09:43, Uros Bizjak wrote:
On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
New revision of Intel ISA reference [1] has new instructions:
Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
I understand that stage 1 is closed, however
On 20 Nov 09:43, Uros Bizjak wrote:
On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
New revision of Intel ISA reference [1] has new instructions:
Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
I understand that stage 1 is closed, however
On 20 Nov 09:43, Uros Bizjak wrote:
On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
New revision of Intel ISA reference [1] has new instructions:
Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
I understand that stage 1 is closed, however
On 20 Nov 09:43, Uros Bizjak wrote:
On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
New revision of Intel ISA reference [1] has new instructions:
Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
I understand that stage 1 is closed, however
As omp target and offloading support is committed to trunk,
I think it's reasonable to add some new warnings.
On 06 Nov 15:27, Ilya Tocar wrote:
Ping.
On 30 Oct 18:31, Ilya Tocar wrote:
Ping.
On 20 Oct 19:26, Ilya Tocar wrote:
Ping.
On 02 Oct 17:38, Ilya Tocar wrote:
Ping
functionality, and I personally think it's desirable for
newest GCC to support newest spec.
Bootstrapped/regtestsed on x86_64-unknown-linux-gnu.
Ok for trunk?
[1]:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
gcc/
2014-11-19 Ilya Tocar ilya.to...@intel.com
* common
On 05 Nov 17:17, Uros Bizjak wrote:
On Wed, Nov 5, 2014 at 5:14 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
Currently we only check for dg-require-effective-target avx512vl in
avx512vl tests. We should also check for avx512dq/avx512bw.
Patch bwllow does this.
Ok for trunk
Ping.
On 30 Oct 18:31, Ilya Tocar wrote:
Ping.
On 20 Oct 19:26, Ilya Tocar wrote:
Ping.
On 02 Oct 17:38, Ilya Tocar wrote:
Ping.
On 15 Aug 16:26, Ilya Tocar wrote:
Ping.
On 29 Jul 18:45, Ilya Tocar wrote:
Hi,
As discussed here in https://gcc.gnu.org/ml
On 03 Nov 11:21, Jakub Jelinek wrote:
On Fri, Oct 31, 2014 at 11:17:07AM +0100, Uros Bizjak wrote:
I'd like to ask Jakub for a review of the above two parts, other parts
are OK with a rename (as mentioned above).
Looks ok to me. Where the ICEs discovered just by normal make check or only
Ping.
On 20 Oct 19:25, Ilya Tocar wrote:
Same in collect2.
On 09 Oct 15:40, Ilya Tocar wrote:
Ping.
On 29 Sep 18:02, Ilya Tocar wrote:
Hi,
Currently if call to atexit (lto_wrapper_cleanup) fails we
won't report error as we haven't initialized error-reporting
Hi,
Currently we only check for dg-require-effective-target avx512vl in
avx512vl tests. We should also check for avx512dq/avx512bw.
Patch bwllow does this.
Ok for trunk?
2014-11-05 Ilya Tocar ilya.to...@intel.com
* gcc.target/i386/avx512vl-vandnpd-2.c: Fix
dg-require-effective
Hi,
I've run gcc.dg/torture/* tests with -mavx512bw -mavx512vl -mavx512dq
flags, and got a bunch of fails (mostly in permutes autogen).
Patch below fixes them.
Ok for trunk?
2014-10-30 Ilya Tocar ilya.to...@intel.com
* config/i386/i386.c (expand_vec_perm_pshufb): Try vpermq/vpermd
Ping.
On 20 Oct 19:26, Ilya Tocar wrote:
Ping.
On 02 Oct 17:38, Ilya Tocar wrote:
Ping.
On 15 Aug 16:26, Ilya Tocar wrote:
Ping.
On 29 Jul 18:45, Ilya Tocar wrote:
Hi,
As discussed here in https://gcc.gnu.org/ml/gcc/2014-01/msg00189.html
Gcc should complain about
it. Ok for trunk?
2014-10-20 Ilya Tocar ilya.to...@intel.com
* config/i386/i386.c (expand_vec_perm_1): Fix
expand_vec_perm_palignr case.
* config/i386/sse.md (ssse3_avx2_palignrmode_mask): Use
VI1_AVX512.
---
gcc/config/i386/i386.c | 1 +
gcc/config/i386/sse.md
Same in collect2.
On 09 Oct 15:40, Ilya Tocar wrote:
Ping.
On 29 Sep 18:02, Ilya Tocar wrote:
Hi,
Currently if call to atexit (lto_wrapper_cleanup) fails we
won't report error as we haven't initialized error-reporting
infrastructure. This patch moves this call after
Ping.
On 02 Oct 17:38, Ilya Tocar wrote:
Ping.
On 15 Aug 16:26, Ilya Tocar wrote:
Ping.
On 29 Jul 18:45, Ilya Tocar wrote:
Hi,
As discussed here in https://gcc.gnu.org/ml/gcc/2014-01/msg00189.html
Gcc should complain about pragma omp declare target without
corresponding
On 10 Oct 18:37, Uros Bizjak wrote:
On Fri, Oct 10, 2014 at 5:47 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Please recode that horrible first switch statement to:
--cut here--
rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
switch (mode)
{
case V8HImode
On 09 Oct 20:51, Jakub Jelinek wrote:
On Thu, Oct 09, 2014 at 04:15:23PM +0400, Ilya Tocar wrote:
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -21358,32 +21358,169 @@ ix86_expand_int_vcond (rtx operands[])
return true;
}
-ix86_expand_vec_perm_vpermi2 (rtx
Ping.
On 29 Sep 18:02, Ilya Tocar wrote:
Hi,
Currently if call to atexit (lto_wrapper_cleanup) fails we
won't report error as we haven't initialized error-reporting
infrastructure. This patch moves this call after diagnostic_initialize.
I hope that we can't exit inside
Hi,
I think this patch should be split in 2 parts:
V64QI related and non-V64QI related.
This part contains non-V64QI related changes.
Also I've noticed, that not all patterns using VI1_AVX2,
actually have AVX512 versions, so fixed bogus patterns.
On 06 Oct 16:10, Jakub Jelinek wrote:
On Mon,
On 03 Oct 07:53, H.J. Lu wrote:
On Fri, Oct 3, 2014 at 6:46 AM, Ilya Tocar tocarip.in...@gmail.com wrote:
On 02 Oct 07:41, H.J. Lu wrote:
On Thu, Oct 2, 2014 at 7:29 AM, Ilya Tocar tocarip.in...@gmail.com wrote:
The same is true for x32. Can you add a testcase to show it
fails on x32
On 06 Oct 09:08, Jakub Jelinek wrote:
On Fri, Oct 03, 2014 at 04:39:08PM +0200, Jakub Jelinek wrote:
Just to stress the new testcases some more, I've enabled the
vec_perm_const{32hi,64qi} patterns.
Got several ICEs in expand_vec_perm_broadcast_1,
on the final gcc_unreachable () in the
On 02 Oct 07:41, H.J. Lu wrote:
On Thu, Oct 2, 2014 at 7:29 AM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
sizeof (long) == 4 on windows, so we should use long long as param type.
Patch below does it.
The same is true for x32. Can you add a testcase to show it
fails on x32 without
Ping.
On 15 Aug 16:26, Ilya Tocar wrote:
Ping.
On 29 Jul 18:45, Ilya Tocar wrote:
Hi,
As discussed here in https://gcc.gnu.org/ml/gcc/2014-01/msg00189.html
Gcc should complain about pragma omp declare target without
corresponding pragma omp end declare target. This patch adds
Hi,
sizeof (long) == 4 on windows, so we should use long long as param type.
Patch below does it.
Ok for trunk?
2014-10-02 Ilya Tocar ilya.to...@intel.com
* config/i386/adxintrin.h (_subborrow_u64): Use long long for param
type.
(_addcarry_u64): Ditto
Ping.
On 15 Sep 18:43, Ilya Tocar wrote:
On 01 Sep 18:38, Ilya Tocar wrote:
Please mention the PR in the ChangeLog entry and add some testcases
(can be gcc.target/i386/, but we should have it tested).
Does this change anything on say register short sil __asm (sil); in
32-bit
mode
for trunk?
2014-09-29 Ilya Tocar ilya.to...@intel.com
* lto-wrapper.c (main): Don't call fatal_error before
diagnostic_initialize.
---
gcc/lto-wrapper.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/lto-wrapper.c b/gcc/lto-wrapper.c
index 08fd090
On 25 Sep 13:14, Jeff Law wrote:
On 09/01/14 04:29, Ilya Tocar wrote:
AVX512 added new 16 xmm registers (xmm16-xmm31).
Those registers require evex encoding.
Only 512-bit wide versions of instructions have evex encoding with
avx512f, but all versions have it with avx512vl.
Most
On 01 Sep 18:38, Ilya Tocar wrote:
Please mention the PR in the ChangeLog entry and add some testcases
(can be gcc.target/i386/, but we should have it tested).
Does this change anything on say register short sil __asm (sil); in 32-bit
mode (when it IMHO should be rejected too?)?
Do we
Hi,
Currently we don't check zmm/mask-registers related bits in xgetbv
output, when detecting native cpu. Patch below fixes it.
Bootstraps/passes make check.
Ok for trunk?
ChangeLog:
gcc/
2014-09-15 Ilya Tocar ilya.to...@intel.com
* config/i386/driver-i386.c (host_detect_local_cpu
Ilya Tocar ilya.to...@intel.com
* config/i386/adxintrin.h (_subborrow_u32): New.
(_addcarry_u32): Ditto.
(_subborrow_u64): Ditto.
(_addcarry_u64): Ditto.
* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_SBB32,
IX86_BUILTIN_SBB64
AVX512 added new 16 xmm registers (xmm16-xmm31).
Those registers require evex encoding.
Only 512-bit wide versions of instructions have evex encoding with
avx512f, but all versions have it with avx512vl.
Most instructions have same macroized pattern for 128/256/512 vector
length. They all
Hi, this patch adds checks for registers availability, when
alternative/numeric name is used.
Bootstraps/passes make-check on x86-64.
Ok for trunk?
ChangeLog:
gcc/
2014-09-01 Ilya Tocar ilya.to...@intel.com
* varasm.c (decode_reg_name_and_count): Check availability
-names.c to be valid on
32 bits. Ok for trunk?
gcc/
2014-09-01 Ilya Tocar ilya.to...@intel.com
PR middle-end/62120
* varasm.c (decode_reg_name_and_count): Check availability for
registers from ADDITIONAL_REGISTER_NAMES.
Testsuite/
2014-09-01 Ilya Tocar ilya.to...@intel.com
Hi,
This patch adds myself to the MAINTAINERS file. Commmitted as 214012.
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 87fb9dd..a40a537 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -555,6 +555,7 @@ Dinar Temirbulatov
===
--- ChangeLog (revision 214011)
+++ ChangeLog (revision 214012)
@@ -1,3 +1,7 @@
+2014-08-15 Ilya Tocar toca...@gmail.com
+
+ * MAINTAINERS (Write After Approval): Add myself.
+
2014-08-01 Jiong Wang jiong.w...@arm.com
* MAINTAINERS (Write After Approval
Ping.
On 29 Jul 18:45, Ilya Tocar wrote:
Hi,
As discussed here in https://gcc.gnu.org/ml/gcc/2014-01/msg00189.html
Gcc should complain about pragma omp declare target without
corresponding pragma omp end declare target. This patch adds a warning
for those cases.
Bootstraps/passes make
I've observed SPEC2006 failure on avx512-vlbwdq branch.
It was caused by hardreg_cprop. In maybe_mode_change it was
assumed, that all values of the same register class and same mode.
are ok. This is not the case for i386/avx512. We need to honor
HARD_REGNO_MODE_OK.
One could argue that
Hi,
This patch adds missing intrinsics and tests for them.
Ok for trunk?
gcc/ChangeLog:
2014-08-13 Ilya Tocar ilya.to...@intel.com
* config/i386/avx512fintrin.h (_mm512_mask_cmpge_epi32_mask): New.
(_mm512_mask_cmpge_epu32_mask): Ditto.
(_mm512_cmpge_epu32_mask
for trunk?
2014-08-11 Ilya Tocar ilya.to...@intel.com
* regcprop.c (maybe_mode_change): Honor HARD_REGNO_MODE_OK.
---
gcc/regcprop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/regcprop.c b/gcc/regcprop.c
index 932037d..694deb2 100644
--- a/gcc/regcprop.c
Hi,
I've noticed that vec_extract_lo_modemask_name pattern has
vm/vm alternative when mask is not applied. This can lead to insn
with 2 memory operands. Patch bellow fixes it.
Ok for trunk?
2014-08-05 Ilya Tocar ilya.to...@intel.com
* common/config/i386/sse.md
I'd suggest op0: =store_mask_constraint,v and op1: v,m. This
would result in op0:=vm,v op1:v,m and op0:=v,v op1:v,m.
Uros.
Done.
2014-08-05 Ilya Tocar ilya.to...@intel.com
* common/config/i386/sse.md (vec_extract_lo_modemask_name): Fix
constraint.
---
gcc/config/i386
): Remeber location.
(c_parser_omp_end_declare_target): Forget location.
And ChangeLog for testsuite:
2014-07-29 Ilya Tocar ilya.to...@intel.com
* gcc.dg/gomp//target-3.c: New testcase.
---
gcc/c/c-decl.c | 3 +++
gcc/c/c-lang.h | 3
On 12 May 15:42, Uros Bizjak wrote:
On Mon, May 12, 2014 at 3:25 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
This patch add support for xsavec, xsaves ISA extensions, introduced in
[1], and clflushopt introduced in [2].
[1]http://www.intel.com/content/www/us/en/processors
-check.
Ok for trunk?
Changelog:
2014-05-12 Ilya Tocar ilya.to...@intel.com
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_CLFLUSHOPT_SET): Define.
(OPTION_MASK_ISA_XSAVES_SET): Ditto.
(OPTION_MASK_ISA_XSAVEC_SET): Ditto
On 17 Mar 22:18, Ulrich Drepper wrote:
On Mon, Mar 17, 2014 at 7:39 AM, Ilya Tocar tocarip.in...@gmail.com wrote:
undefined is similar in behavior to setzero, but it also clobbers
flags. Maybe just define it to setzero for now?
What do you mean by clobbers flags? Do you have
On 16 Mar 07:12, Ulrich Drepper wrote:
[This patch is so far really meant for commenting. I haven't tested it
at all yet.]
Intel's intrinsic specification includes one set which currently is not
defined in gcc's headers: the _mm*_undefined_* intrinsics.
What specification are talking about?
On 21 Feb 18:35, Uros Bizjak wrote:
On Fri, Feb 21, 2014 at 4:25 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Latest version of AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Has a few changes.
1)PREFETCHWT1 instruction now has
On 20 Feb 17:23, Uros Bizjak wrote:
On Thu, Feb 20, 2014 at 4:39 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
Latest version of AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Has a few changes.
2)Currently for scatter/gather prefetches
release that fully conforms to some published specification.
Patch bellow add -mprefetchwt1 flag, corresponding TARGET_PREFETCHWT1,
and uses them for prefetchwt1 instruction. Bootstraps/passes testing.
Ok for trunk?
ChangeLog:
2014-02-21 Ilya Tocar ilya.to...@intel.com
* common/config/i386
?
Patch bellow changes CPUID of vptestnmq/vptestnmd and changes some bogus
%v to v. Bootstraps, passes make check. Ok for trunk?
ChangeLog
2014-02-20 Ilya Tocar ilya.to...@intel.com
* config/i386/avx512fintrin.h (_mm512_testn_epi32_mask),
(_mm512_mask_testn_epi32_mask
is ok. Ok for trunk?
ChangeLog bellow:
2014-02-19 Ilya Tocar ilya.to...@intel.com
* config/i386/i386.c (classify_argument): Update to reflect abi fix.
And for testsuite:
2014-02-19 Ilya Tocar ilya.to...@intel.com
* gcc.target/x86_64/abi/avx512f
On 30 Jan 19:24, Uros Bizjak wrote:
On Thu, Jan 30, 2014 at 5:41 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
This patch removes possible division by zero.
Make check passes. Ok for trunk?
2014-01-30 Ilya Tocar ilya.to...@intel.com
* gcc.target/i386/m512-check.h: Use
We won't get zero from exponential function, so expecting zero result
is flawed anyway.
If we would like to introduce universal epsilon comparisons into the
testsuite, then please read [1]. Being overly pedantic, the definition
should be |(v[i] - u.a[i]) / v[i]|, as stated in [2].
make check/SPEC2006. Ok for trunk?
Here is ChangeLog:
2014-01-30 Ilya Tocar ilya.to...@intel.com
* config/i386/constraints.md (Yk): Swap meaning with k.
* config/i386/i386.md (movhi_internal): Change Yk to k.
(movqi_internal): Ditto.
(*klogicmode): Ditto
2014-01-30 H.J. Lu hjl.to...@gmail.com:
On Thu, Jan 30, 2014 at 2:54 AM, Ilya Tocar tocarip.in...@gmail.com wrote:
Hi,
Turns out that for Icc meaning of Yk and k constraints
(exposed through inline asm) is opposite to current GCC implementation.
As Icc with such behavior was already releases
Hi,
This patch removes possible division by zero.
Make check passes. Ok for trunk?
2014-01-30 Ilya Tocar ilya.to...@intel.com
* gcc.target/i386/m512-check.h: Use correct rounding values.
---
gcc/testsuite/gcc.target/i386/m512-check.h | 3 ++-
1 file changed, 2 insertions(+), 1
I found out that we forgot to implement some of AVX512 intrinsics.
Here is a patch that adds them. Sorry for huge patch, but changes are
mostly trivial.
Ok for trunk?
...
This is the same as the second alternative of the
avx512f_codepmov_src_lower2_mask pattern. Please change the
RA figured out that operation with general registers results in less
moves (you already have x1 in general reg). This is exaclty the reason
why I think unspecs are not needed. It is the job of the compiler to
choose most appropriate approach, and its behavior should be adjusted
with
You don't need an unspec (or corresponding __builtin), generic movhi
pattern should be able to generate correct insn.
Uros.
Hi,
Generic movhi genrates simple mov.
Actually the whole purpose of this intrinsic is to let complier know,
that this variable should pe placed on mask register and
Perhaps we should add sandybridge, ivybridge and haswell aliases for
corei7-avx, core-avx-i, core-avx2? I mean, it is a nightmare to remember
which one has the i7 in and which doesn't even for me.
Yes please, I think this is a good idea.
I've added aliases for haswell, sandybridge,
Hi,
This patch adds march for broadwell cpu.
-march=bdw is the same as -march=core-avx2 but with support for rdseed,
adcx, prefetchw. OK for trunk?
Thanks.
2013-12-19 Tocar Ilya ilya.to...@intel.com
* config.gcc: Support march=bdw.
* config/i386/driver-i386.c
Why not -march=broadwell instead?
If people don't mind long names, broadwell works for me.
Done.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect broadwell.
^Capital B.
Thanks, fixed.
Just say Intel Broadwell CPU.
Done. Other options
to be dumped into LTO bytecode for LTO,
or in pragma omp target case, for separate compilation targeting
a different architecture.
Ok for gomp4 branch now?
2013-11-19 Ilya Tocar ilya.to...@intel.com
* cgraph.h (symtab_node): Add need_dump.
* cgraphunit.c (ipa_passes): Run
On 18 Oct 13:30, Richard Biener wrote:
Certainly better than the first version. Jakub should decide for the branch
and eventually Honza for the merge to trunk. It still looks somewhat hackish,
but I suppose that's because we don't have a LTO-state object where we
can encapsulate all this.
Ping.
On 09 Oct 19:12, Ilya Tocar wrote:
Ping.
On 03 Oct 20:05, Ilya Tocar wrote:
On 26 Sep 21:21, Ilya Tocar wrote:
On 25 Sep 15:48, Richard Biener wrote:
On Wed, Sep 25, 2013 at 3:29 PM, Ilya Tocar tocarip.in...@gmail.com
wrote:
On 24 Sep 11:02, Richard Biener wrote
Ping.
On 03 Oct 20:05, Ilya Tocar wrote:
On 26 Sep 21:21, Ilya Tocar wrote:
On 25 Sep 15:48, Richard Biener wrote:
On Wed, Sep 25, 2013 at 3:29 PM, Ilya Tocar tocarip.in...@gmail.com
wrote:
On 24 Sep 11:02, Richard Biener wrote:
On Mon, Sep 23, 2013 at 3:29 PM, Ilya Tocar
On 26 Sep 21:21, Ilya Tocar wrote:
On 25 Sep 15:48, Richard Biener wrote:
On Wed, Sep 25, 2013 at 3:29 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
On 24 Sep 11:02, Richard Biener wrote:
On Mon, Sep 23, 2013 at 3:29 PM, Ilya Tocar tocarip.in...@gmail.com
wrote:
thus consider
On 27 Sep 12:08, Jakub Jelinek wrote:
Looks like you forgot some files. I've checked
http://gcc.gnu.org/viewcvs/gcc?view=revisionrevision=202968
And e. g. hashtab.h is missing. So currently branch is failing to build,
with task.c:46:21: fatal error: hashtab.h: No such file or directory
Here is
On 25 Sep 15:48, Richard Biener wrote:
On Wed, Sep 25, 2013 at 3:29 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
On 24 Sep 11:02, Richard Biener wrote:
On Mon, Sep 23, 2013 at 3:29 PM, Ilya Tocar tocarip.in...@gmail.com
wrote:
thus consider assigning the section
name in a different
Hi,
I've rebased my patch.
Is it ok for gomp4
2013/9/13 Ilya Tocar tocarip.in...@gmail.com:
Hi,
I'm working on dumping gimple for omp pragma target stuff into
gnu.target_lto_ sections.
I've tried to reuse current lto infrastructure as much as possible.
Could you please take a look
implicit-zee
pass), so comments are welcome.
Also if this aproach is correct we will need to enable implicit-zee
pass on some new targets ( for example x86 32bit).
It passes bootstrap and make-check.
Here is a Changelog:
2011-09-27 Ilya Tocar ilya.to...@intel.com
* implicit-zee.c: Added 2011
Sorry. Like this?
Changelog:
2011-08-25 Ilya Tocar ilya.to...@intel.com
* config/i386/fmaintrin.h: New.
* config.gcc: Add fmaintrin.h.
* config/i386/i386.c
(enum ix86_builtins) IX86_BUILTIN_VFMADDSS3: New.
IX86_BUILTIN_VFMADDSD3
Fixed.
Changelog:
2011-08-25 Ilya Tocar ilya.to...@intel.com
* config/i386/fmaintrin.h: New.
* config.gcc: Add fmaintrin.h.
* config/i386/i386.c
(enum ix86_builtins) IX86_BUILTIN_VFMADDSS3: New.
IX86_BUILTIN_VFMADDSD3: Likewise
Removed extra blank lines and pass tests through indent.
2011/8/23 Uros Bizjak ubiz...@gmail.com:
On Tue, Aug 23, 2011 at 4:19 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
I removed unnecessary expands/builtins and tests are now compiled with -O2.
Is this version ok?
OK with minor comments
2011/8/24 Jakub Jelinek ja...@redhat.com:
On Wed, Aug 24, 2011 at 12:48:06PM +0400, Ilya Tocar wrote:
Removed extra blank lines and pass tests through indent.
You haven't:
Ah sorry only noticed one in sse.md.
@@ -25113,6 +25125,9 @@ static const struct builtin_description
bdesc_multi_arg
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