-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, December 13, 2014 3:26 AM
To: Zhenqiang Chen
Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
- tree lhs = gimple_assign_lhs (g
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Eric Botcazou
Sent: Monday, November 24, 2014 5:41 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, combine] Try REG_EQUAL for nonzero_bits
Thanks
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Wednesday, December 10, 2014 8:55 AM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, ifcvt] Fix PR63917
On 12/04/2014 05:16 PM, Zhenqiang Chen wrote:
+static rtx
+cc_in_cond
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Wednesday, December 10, 2014 3:16 AM
To: Segher Boessenkool; Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Fix PR 61225
On 12/09/14 12:07, Segher Boessenkool wrote:
On Tue, Dec 09, 2014 at 05:49
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Tuesday, November 25, 2014 5:25 PM
To: Zhenqiang Chen
Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
On 11/25/2014 09:41 AM, Zhenqiang Chen wrote:
I
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Tuesday, December 09, 2014 5:29 AM
To: Zhenqiang Chen
Cc: Steven Bosscher; gcc-patches@gcc.gnu.org; Jakub Jelinek
Subject: Re: [PATCH] Fix PR 61225
On 12/04/14 01:43, Zhenqiang Chen wrote:
Part
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Jeff Law
Sent: Tuesday, December 02, 2014 6:11 AM
To: Zhenqiang Chen
Cc: Steven Bosscher; gcc-patches@gcc.gnu.org; Jakub Jelinek
Subject: Re: [PATCH] Fix PR 61225
On 08/04
Ping?
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Zhenqiang Chen
Sent: Monday, December 01, 2014 3:14 PM
To: 'H.J. Lu'
Cc: Richard Henderson; GCC Patches
Subject: RE: [PATCH, ifcvt] Fix PR63917
-Original Message-
From: H.J. Lu [mailto:hjl.to...@gmail.com]
Sent: Friday, November 28, 2014 10:45 PM
To: Zhenqiang Chen
Cc: Richard Henderson; GCC Patches
Subject: Re: [PATCH, ifcvt] Fix PR63917
On Sun, Nov 23, 2014 at 7:47 PM, Zhenqiang Chen
zhenqiang.c...@arm.com wrote
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Tuesday, November 25, 2014 5:25 PM
To: Zhenqiang Chen
Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
On 11/25/2014 09:41 AM, Zhenqiang Chen wrote:
I
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Richard Henderson
Sent: Monday, November 24, 2014 4:57 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Cc: Marcus Shawcroft
Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP
-Original Message-
From: Eric Botcazou [mailto:ebotca...@adacore.com]
Sent: Saturday, November 22, 2014 6:15 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, combine] Try REG_EQUAL for nonzero_bits
The patch tries to use REG_EQUAL to get more precise info
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Friday, November 21, 2014 2:27 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Fix PR63917
On 11/20/2014 10:48 AM, Zhenqiang Chen wrote:
+/* Check X clobber CC reg
.
No make check regression with qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-24 Zhenqiang Chen zhenqiang.c...@arm.com
PR target/64015
* config/aarch64/aarch64.c (aarch64_gen_ccmp_first): Recheck operand
after mode conversion.
(aarch64_gen_ccmp_next
.
Bootstrap and no make check regression on X86-64 and i686.
All the failed cases in PR63917 PASS.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-20 Zhenqiang Chen zhenqiang.c...@arm.com
PR rtl-optimization/63917
* ifcvt.c (clobber_cc_p, use_cc_p): New functions
.
Coremark on Cortex-M4 is 0.07% regression due to alignment change.
No Coremark change on Corter-M0 and Cortex-A15.
Unfortunately I failed to generate a meaningful small case for it. So no
test case is included in the patch.
Ok for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-21 Zhenqiang Chen
-Original Message-
From: Richard Earnshaw
Sent: Friday, November 07, 2014 8:51 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Cc: Ramana Radhakrishnan
Subject: Re: [PATCH, testsuite, ARM] Check lr other than r3
On 03/11/14 08:18, Zhenqiang Chen wrote:
Hi,
pr45701-1.c FAIL
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Thursday, November 06, 2014 4:23 PM
To: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Ulrich Weigand;
Andreas Krebbel
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Allow CC mode
-Original Message-
From: Ulrich Weigand [mailto:uweig...@de.ibm.com]
Sent: Friday, November 07, 2014 12:11 AM
To: Richard Henderson
Cc: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Andreas Krebbel;
gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Allow CC mode
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Wednesday, November 05, 2014 9:42 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 9/10] aarch64: generate conditional compare
instructions
On 11/05/2014 10:05 AM, Zhenqiang
The patch leads to big regression for float operators on target without hard
fpu support due to register shuffle.
Please refer https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63743 for more
detail.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org
Of Zhenqiang Chen
Sent: Monday, October 27, 2014 3:50 PM
To: 'Richard Henderson'
Cc: gcc-patches@gcc.gnu.org
Subject: RE: [Ping] [PATCH, 9/10] aarch64: generate conditional compare
instructions
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday
to run full s390 tests. Would anyone in the TO list help
to run the s390 tests?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-06 Zhenqiang Chen zhenqiang.c...@arm.com
* ifcvt.c (noce_emit_cmove, noce_get_alt_condition,
noce_get_condition):
Allow CC mode if HAVE_cbranchcc4
PASS for Cortex-M0/M4 and Cortext-A15 (THUMB and ARM
modes).
OK for trunk?
Thanks!
-Zhenqiang
testsuite/ChangeLog:
2014-11-03 Zhenqiang Chen zhenqiang.c...@arm.com
* gcc.target/arm/pr45701-1.c: Check LR used.
diff --git a/gcc/testsuite/gcc.target/arm/pr45701-1.c
b/gcc/testsuite
-11-03 Zhenqiang Chen zhenqiang.c...@arm.com
* gcc.target/arm/combine-cmp-shift.c: Skip arm_thumb1_ok.
* gcc.target/arm/unsined-extend-1.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
b/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
index a64f20e
-Original Message-
From: Jan-Benedict Glaw [mailto:jbg...@lug-owl.de]
Sent: Monday, November 03, 2014 6:16 PM
To: Zhenqiang Chen; Hartmut Penner; Ulrich Weigand; Andreas Krebbel
Cc: 'Richard Henderson'; gcc-patches@gcc.gnu.org
Subject: Re: [BUILDROBOT] s390x-linux: Breaking
Sorry for breaking the build. The patch was reverted.
I will rework on it.
Thanks!
-Zhenqiang
-Original Message-
From: Jan-Benedict Glaw [mailto:jbg...@lug-owl.de]
Sent: Monday, November 03, 2014 6:16 PM
To: Zhenqiang Chen; Hartmut Penner; Ulrich Weigand; Andreas Krebbel
Cc
- bytes) iov_len)
+return 22;
+ return 0;
+}
+/* { dg-final { object-size text = 12 } } */
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Thursday, October 30, 2014 1:27 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Check size cost
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Thursday, October 30, 2014 11:58 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 4/10] expand ccmp
On 10/29/2014 03:30 AM, Zhenqiang Chen wrote:
+
+bool
+ccmp_insn_p
Hi,
The patch enhances ifcvt to allow_cc_mode if HAVE_cbranchcc4.
Bootstrap and no make check regression on X86-64.
Will add new test cases after ccmp is enabled.
Ok for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-29 Zhenqiang Chen zhenqiang.c...@arm.com
* ifcvt.c (noce_emit_cmove
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Monday, October 27, 2014 10:56 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
On 10/27/2014 12:47 AM, Zhenqiang Chen wrote
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Monday, October 27, 2014 11:14 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 2/10] prepare ccmp
On 10/27/2014 12:48 AM, Zhenqiang Chen wrote:
On 09/22/2014 11:43 PM
Patch is rebased and merged with other changes according to comments.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Tuesday, September 23, 2014 2:44 PM
To: gcc-patches@gcc.gnu.org
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Monday, October 27, 2014 11:20 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 6/10] aarch64: add ccmp CC mode
On 10/27/2014 12:48 AM, Zhenqiang Chen wrote:
-Original
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Richard Henderson
Sent: Monday, October 27, 2014 11:47 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 8/10] aarch64: ccmp insn patterns
Thanks for the comments. All comments are accepted and the updated patch is
attached.
-Zhenqiang
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, October 11, 2014 11:00 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 1/10
Thanks for the comments. All comments are accepted and the updated patch is
attached.
-Zhenqiang
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, October 11, 2014 11:22 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 5/10
Thanks for the comments. Patch is updated.
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Richard Henderson
Sent: Saturday, October 11, 2014 11:03 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, October 11, 2014 11:32 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 6/10] aarch64: add ccmp CC mode
On 09/22/2014 11:44 PM, Zhenqiang Chen wrote:
+case
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 12:52 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 7/10] aarch64: add function to output ccmp
insn
On 10/11/2014 09:11 AM, Richard Henderson wrote
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 4:12 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 8/10] aarch64: ccmp insn patterns
On 09/22/2014 11:45 PM, Zhenqiang Chen wrote:
+(define_expand
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 4:46 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 9/10] aarch64: generate conditional compare
instructions
On 09/22/2014 11:46 PM, Zhenqiang Chen
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 5:40 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 10/10] aarch64: Handle ccmp in ifcvt to make
it
work with cmov
On 09/22/2014 11:46 PM, Zhenqiang
on X86-64.
No make check regression with Cortex-M0 qemu.
For CSiBE, ARM Cortex-m0 result is a little better. A little regression for
MIPS. Roughly no change for PowerPC.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-27 Zhenqiang Chen zhenqiang.c...@arm.com
* ifcvt.c
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Thursday, October 09, 2014 5:21 PM
To: Zhenqiang Chen
Cc: GCC Patches
Subject: Re: [PATCH] Clean up duplicated function seq_cost
On Thu, Oct 9, 2014 at 11:20 AM, Richard Biener
richard.guent
Hi,
The are two implementations of seq_cost. The function bodies are exactly the
same. The patch removes one of them and make the other global.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-09 Zhenqiang Chen zhenqiang.c...@arm.com
-Original Message-
From: Jiong Wang [mailto:jiong.w...@arm.com]
Sent: Thursday, September 25, 2014 2:13 AM
To: Jeff Law; Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, 2/2] shrink wrap a function with a single loop: split
live_edge
On 22/09/14 18:51, Jeff Law
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Monday, June 23, 2014 2:57 PM
To: gcc-patches@gcc.gnu.org
Subject: [PATCH, 1/10] two hooks
The patch is discarded since I can not reproduce the issue with the latest
trunk.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Thursday, June 26, 2014 3:21 PM
To: Richard
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Tuesday, July 01, 2014 1:08 PM
To: Richard Earnshaw
Cc: gcc-patches@gcc.gnu.org
Subject
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Monday, June 23, 2014 3:00 PM
To: gcc-patches@gcc.gnu.org
Subject: [PATCH, 5/10] aarch64
Ping?
Patch is rebased and regenerated since [PATCH, 3/10] skip swapping operands
used in ccmp is discarded.
Please find the updated patch in attachment.
Bootstrap and no make check regression on X86-64.
Thanks!
-Zhenqiang
ChangeLog:
2014-09-23 Zhenqiang Chen zhenqiang.c...@linaro.org
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Monday, June 23, 2014 3:00 PM
To: gcc-patches@gcc.gnu.org
Subject: [PATCH, 6/10] aarch64
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Monday, June 23, 2014 3:00 PM
To: gcc-patches@gcc.gnu.org
Subject: [PATCH, 7/10] aarch64
Ping?
Patch is attached for easy to apply.
Move the cstorecc4 pattern from [PATCH, 10/10] aarch64: Handle ccmp in
ifcvt to make it work with cmov to this patch, since cmov optimization does
not depend on that patch.
Thanks!
-Zhenqiang
ChangeLog:
2014-09-23 Zhenqiang Chen zhenqiang.c
Ping?
Patch is attached for easy to apply.
Bootstrap on AARCH64 qemu.
Test cases: test_frame_*.c need update after the patch.
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Monday
Ping?
Patch is rebased and attached.
Thanks!
-Zhenqiang
ChangeLog
2014-09-23 Zhenqiang Chen zhenqiang.c...@linaro.org
Andrew Pinski apin...@cavium.com
* ccmp.c (used_in_cond_stmt_p): Hande ? expr.
* expr.c (expand_cond_expr_using_cmove): Handle CCmode
-Original Message-
From: Marek Polacek [mailto:pola...@redhat.com]
Sent: Wednesday, September 17, 2014 5:29 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ira] Ignore some conflict cost
On Wed, Sep 17, 2014 at 05:18:27PM +0800, Zhenqiang Chen wrote:
Hi
for ARM Cortex-M0.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-09-17 Zhenqiang Chen zhenqiang.c...@arm.com
PR rtl-optimization/63210
* ira-color.c (assign_hard_reg): Ignore conflict cost if the
HARD_REGNO is not availabe for CONFLICT_A.
testsuite/ChangeLog:
2014-09
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Jiong Wang
Sent: Monday, September 15, 2014 11:28 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org; Jeff Law
Subject: Re: [PATCH, 2/2] shrink wrap a function with a single
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Friday, September 05, 2014 12:45 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ira] Miss checks in split_live_ranges_for_shrink_wrap
On 09/01/14 02:13, Zhenqiang Chen wrote:
To split
text code size, it reduces 0.15% for CSiBE, 0.59% for
coremark, 0.13% for dhrystone, 0.14% for eembc_v1 and 0.31% for eembc-v2.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-09-10 Zhenqiang Chen zhenqiang.c...@arm.com
* config/arm/arm.c: #include tm-constrs.h
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Jeff Law
Sent: Saturday, August 30, 2014 4:54 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ira] Miss checks in split_live_ranges_for_shrink_wrap
On 12 August 2014 17:24, Richard Earnshaw rearn...@arm.com wrote:
On 05/08/14 10:31, Zhenqiang Chen wrote:
Hi,
For some large constants, ARM will split them during expanding, which
makes impossible to hoist them out the loop or shared by different
references (refer the test case in the patch
for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-08-14 Zhenqiang Chen zhenqiang.c...@arm.com
* shrink-wrap.h: #define SUPPORT_SHRINK_WRAP_P.
* ira.c: #include shrink-wrap.h
(split_live_ranges_for_shrink_wrap): Use SUPPORT_SHRINK_WRAP_P.
* ifcvt.c: #include shrink
On 13 August 2014 20:29, Richard Earnshaw rearn...@arm.com wrote:
On 25/02/14 09:34, Zhenqiang Chen wrote:
Hi,
Current value for max_insns_skipped is 6. For THUMB2, it needs 2 (IF-THEN)
or 3 (IF-THEN-ELSE) IT blocks to hold all the instructions. The overhead of
IT is 4 or 6 BYTES.
If we do
Ping ^ 2?
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Tuesday, April 29, 2014 5:38 PM
To: gcc-patches@gcc.gnu.org
Cc: Ramana Radhakrishnan
Subject: [PING] [PATCH, ARM] Set
On 11 August 2014 19:14, Ramana Radhakrishnan ramana@googlemail.com wrote:
On Mon, Aug 11, 2014 at 3:35 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
On 8 August 2014 23:22, Ramana Radhakrishnan ramana@googlemail.com
wrote:
On Tue, Aug 5, 2014 at 10:31 AM, Zhenqiang Chen
On 8 August 2014 23:22, Ramana Radhakrishnan ramana@googlemail.com wrote:
On Tue, Aug 5, 2014 at 10:31 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
For some large constants, ARM will split them during expanding, which
makes impossible to hoist them out the loop or shared
On 5 August 2014 21:59, Richard Biener richard.guent...@gmail.com wrote:
On Mon, Aug 4, 2014 at 11:09 AM, Zhenqiang Chen zhenqiang.c...@arm.com
wrote:
-Original Message-
From: Bin.Cheng [mailto:amker.ch...@gmail.com]
Sent: Monday, August 04, 2014 4:41 PM
To: Zhenqiang Chen
Cc
show very few difference.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-08-05 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3): Keep some
large constants in register other than split them.
testsuite/ChangeLog:
2014-08-05 Zhenqiang
, no performance changes with coremark and dhrystone. Coremark
code size is ~0.44 smaller. And eembcv2 code size is ~0.22 smaller. CSiBE
code size is ~0.05% smaller.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog
2014-08-04 Zhenqiang Chen zhenqiang.c...@arm.com
* tree-ssa-loop-ivopts.c
On 17 July 2014 11:10, Jeff Law l...@redhat.com wrote:
On 05/22/14 03:52, Zhenqiang Chen wrote:
On 21 May 2014 20:43, Steven Bosscher stevenb@gmail.com wrote:
On Wed, May 21, 2014 at 11:58 AM, Zhenqiang Chen wrote:
Hi,
The patch fixes the gcc.target/i386/pr49095.c FAIL in PR61225
-Original Message-
From: Bin.Cheng [mailto:amker.ch...@gmail.com]
Sent: Monday, August 04, 2014 4:41 PM
To: Zhenqiang Chen
Cc: gcc-patches List
Subject: Re: [PATCH, ivopt] Try aligned offset when get_address_cost
On Mon, Aug 4, 2014 at 2:28 PM, Zhenqiang Chen
zhenqiang.c
the gcc.mo.
The patch tries to search relative dir ../share/locale from gcc.
Although it can not cover all cases, I think it can cover most cases.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-07-07 Zhenqiang Chen zhenqiang.c...@linaro.org
Ping?
Thanks!
-Zhenqiang
On 17 June 2014 12:53, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping?
Thanks!
-Zhenqiang
On 9 June 2014 17:08, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping ^2?
Thanks!
-Zhenqiang
On 28 May 2014 15:02, Zhenqiang Chen zhenqiang.c...@linaro.org
check regression on qemu.
OK for trunk?
Thanks!
-Zhenqiang
2014-07-04 Zhenqiang Chen zhenqiang.c...@linaro.org
Andrew Pinski apin...@cavium.com
* config/aarch64/aarch64.md (cstorecc4): New.
(movmodecc): Handle ccmp_cc.
* ccmp.c (used_in_cond_stmt_p): Hande
On 2 July 2014 03:54, Jeff Law l...@redhat.com wrote:
On 07/01/14 01:16, Zhenqiang Chen wrote:
ChangeLog:
2014-07-01 Zhenqiang Chen zhenqiang.c...@linaro.org
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno
On 10 June 2014 19:16, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:23 AM, Zhenqiang Chen wrote:
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno;
(create_new_invariant): Init eqno
On 25 June 2014 23:16, Richard Earnshaw rearn...@arm.com wrote:
On 23/06/14 07:59, Zhenqiang Chen wrote:
Hi,
This patch includes the main logic to expand ccmp instructions.
In the patch,
* ccmp_candidate_p is used to identify the CCMP candidate
* expand_ccmp_expr is the main entry
On 25 June 2014 22:41, Richard Earnshaw rearn...@arm.com wrote:
On 23/06/14 07:57, Zhenqiang Chen wrote:
Hi,
The patch makes several functions global, which will be used when
expanding ccmp instructions.
The other change in this patch is to check CCMP when turning code into
jumpy sequence
On 26 June 2014 05:30, Jeff Law l...@redhat.com wrote:
On 06/11/14 04:05, Zhenqiang Chen wrote:
On 10 June 2014 19:06, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:22 AM, Zhenqiang Chen wrote:
Hi,
For loop2-invariant pass, when flag_ira_loop_pressure is enabled
On 26 June 2014 05:03, Jeff Law l...@redhat.com wrote:
On 06/25/14 08:44, Richard Earnshaw wrote:
On 23/06/14 07:58, Zhenqiang Chen wrote:
Hi,
Swapping operands in a ccmp will lead to illegal instructions. So the
patch disables it in simplify_while_replacing.
The patch is separated from
On 25 June 2014 22:44, Richard Earnshaw rearn...@arm.com wrote:
On 23/06/14 07:58, Zhenqiang Chen wrote:
Hi,
Swapping operands in a ccmp will lead to illegal instructions. So the
patch disables it in simplify_while_replacing.
The patch is separated from
https://gcc.gnu.org/ml/gcc-patches
discussion about the hooks was in thread:
https://gcc.gnu.org/ml/gcc-patches/2013-10/msg02601.html
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* doc/md.texi (ccmp): Add description about conditional compare
instruction pattern
Hi,
The patch makes several functions global, which will be used when
expanding ccmp instructions.
The other change in this patch is to check CCMP when turning code into
jumpy sequence.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
functions.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* Makefile.in: Add ccmp.o
* ccmp.c: New file.
* ccmp.h: New file.
* recog.c (simplify_while_replacing): Check ccmp_insn_p.
diff --git a/gcc/Makefile.in b/gcc
in a COND_EXPR (checked by function
used_in_cond_stmt_p), it calls cstorecc4 pattern to store the CC to a
general register.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
Hi,
The patches defines ccmp operand predicate for AARCH64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-protos.h (aarch64_uimm5): New prototype.
* config/aarch64/constraints.md (Usn): Immediate
Hi,
The patches add a set of CC mode for AARCH64, which is similar as them for ARM.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-modes.def: Define new CC modes for ccmp.
* config/aarch64/aarch64.c
Hi,
The patch adds three help functions to output ccmp instructions.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-protos.h (aarch64_output_ccmp): New prototype.
* config/aarch64/aarch64.c
Hi,
The patches implements the two hooks for AARCH64 to generate ccmp instructions.
Bootstrap and no make check regression on qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64.c (aarch64_code_to_ccmode
on qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64.md (movmodecc): Handle ccmp_cc.
* ifcvt.c: #include ccmp.h.
(struct noce_if_info): Add a new field ccmp_p.
(noce_emit_cmove): Allow ccmp
Hi,
The patch adds two insn patterns for ccmp instructions.
cbranchcc4 is introduced to generate optimized conditional branch
without an additional compare against the result of ccmp.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
On 23 June 2014 15:09, Andrew Pinski pins...@gmail.com wrote:
On Mon, Jun 23, 2014 at 12:01 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
The patch enhances ifcvt to handle conditional compare instruction
(ccmp) to make it work with cmov. For ccmp, ALLOW_CC_MODE is set to
TRUE
On 18 June 2014 05:32, Jeff Law l...@redhat.com wrote:
On 06/11/14 03:35, Zhenqiang Chen wrote:
Thanks for the comments. df_live seams redundant.
With flag_ira_loop_pressure, the pass will call df_analyze () at the
beginning, which can make sure all the DF info are correct.
Can we
On 17 June 2014 17:42, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
On 17 June 2014 16:15, Richard Biener richard.guent...@gmail.com wrote:
On Tue, Jun 17, 2014 at 4:11 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
For some large constant, ports like ARM, need one more
On 10 June 2014 19:16, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:23 AM, Zhenqiang Chen wrote:
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno;
(create_new_invariant): Init eqno
On 17 June 2014 16:15, Richard Biener richard.guent...@gmail.com wrote:
On Tue, Jun 17, 2014 at 4:11 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
For some large constant, ports like ARM, need one more instructions to
operate it. e.g
#define MASK 0xfe00ff
void maskdata (int
On 18 June 2014 05:49, Jeff Law l...@redhat.com wrote:
On 06/11/14 04:05, Zhenqiang Chen wrote:
On 10 June 2014 19:06, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:22 AM, Zhenqiang Chen wrote:
Hi,
For loop2-invariant pass, when flag_ira_loop_pressure is enabled
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