The S/390 backend does not define vec_cmp expanders so far. We relied
solely on expanding vcond.  With commit 502d63b6d various testcases
started to ICE now.

This patch just adds the missing expanders to prevent the ICE.
However, there are still a couple of performance-related testcase
regressions with the vcond lowering which have to be fixed
independently.

Bootstrapped and regression-tested on IBM Z.
Committed to mainline

gcc/ChangeLog:

        PR target/97502
        * config/s390/vector.md ("vec_cmp<VI_HW:mode><VI_HW:mode>")
        ("vec_cmpu<VI_HW:mode><VI_HW:mode>"): New expanders.

gcc/testsuite/ChangeLog:

        * gcc.dg/pr97502.c: New test.
---
 gcc/config/s390/vector.md      | 24 +++++++++++++++++++++++-
 gcc/testsuite/gcc.dg/pr97502.c | 15 +++++++++++++++
 2 files changed, 38 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.dg/pr97502.c

diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index e9332bad0fd..3c01cd1b1e1 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -1441,7 +1441,29 @@ (define_expand "copysign<mode>3"
 ;; Integer compares
 ;;
 
-(define_insn "*vec_cmp<VICMP_HW_OP:code><VI:mode>_nocc"
+(define_expand "vec_cmp<VI_HW:mode><VI_HW:mode>"
+  [(set (match_operand:VI_HW    0 "register_operand" "")
+       (match_operator:VI_HW   1 ""
+         [(match_operand:VI_HW 2 "register_operand" "")
+          (match_operand:VI_HW 3 "register_operand" "")]))]
+  "TARGET_VX"
+{
+  s390_expand_vec_compare (operands[0], GET_CODE(operands[1]), operands[2], 
operands[3]);
+  DONE;
+})
+
+(define_expand "vec_cmpu<VI_HW:mode><VI_HW:mode>"
+  [(set (match_operand:VI_HW    0 "register_operand" "")
+       (match_operator:VI_HW   1 ""
+         [(match_operand:VI_HW 2 "register_operand" "")
+          (match_operand:VI_HW 3 "register_operand" "")]))]
+  "TARGET_VX"
+{
+  s390_expand_vec_compare (operands[0], GET_CODE(operands[1]), operands[2], 
operands[3]);
+  DONE;
+})
+
+(define_insn "*vec_cmp<VICMP_HW_OP:code><VI:mode><VI:mode>_nocc"
   [(set (match_operand:VI                 2 "register_operand" "=v")
        (VICMP_HW_OP:VI (match_operand:VI 0 "register_operand"  "v")
                        (match_operand:VI 1 "register_operand"  "v")))]
diff --git a/gcc/testsuite/gcc.dg/pr97502.c b/gcc/testsuite/gcc.dg/pr97502.c
new file mode 100644
index 00000000000..d87af9c1838
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr97502.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+extern char v[54];
+void bar (char *);
+void
+foo (void)
+{
+  int i;
+  char c[32];
+  bar (c);
+  for (i = 0; i < 32; i++)
+    c[i] = c[i] && !v[i];
+  bar (c);
+}
-- 
2.25.1

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