Hello!
Attached patch cleans MPX patterns a bit. Additionally, it moves a
couple of checks out from the expander to the call site and uses a
couple of helper functions.
There are no functional changes in the patch.
2015-06-28 Uros Bizjak <ubiz...@gmail.com>
* config/i386/i386.md (<mode>_ldx): Do not zero-extend non-Pmode
operand 2 here. Use copy_addr_to_reg to copy non-index
register operand 2 to a temporary.
(<mode>_stx): Ditto for operand 1.
(*<mode>_ldx, *<mode>_stx): Remove enclosing parallel.
* config/i386/i386.c (ix86_load_bounds): Zero-extend non-Pmode ptr here.
(ix86_store_bounds): Ditto.
Patch was tested on x86_64-linux-gnu and committed to mainline SVN.
Uros.
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 225104)
+++ config/i386/i386.c (working copy)
@@ -8886,9 +8886,8 @@ ix86_setup_incoming_vararg_bounds (cumulative_args
for (i = cum->regno; i < max; i++)
{
rtx addr = plus_constant (Pmode, save_area, i * UNITS_PER_WORD);
- rtx reg = gen_rtx_REG (DImode,
+ rtx ptr = gen_rtx_REG (Pmode,
x86_64_int_parameter_registers[i]);
- rtx ptr = reg;
rtx bounds;
if (bnd_reg <= LAST_BND_REG)
@@ -40344,6 +40343,9 @@ ix86_load_bounds (rtx slot, rtx ptr, rtx slot_no)
ptr = copy_addr_to_reg (slot);
}
+ if (!register_operand (ptr, Pmode))
+ ptr = ix86_zero_extend_to_Pmode (ptr);
+
emit_insn (BNDmode == BND64mode
? gen_bnd64_ldx (reg, addr, ptr)
: gen_bnd32_ldx (reg, addr, ptr));
@@ -40378,6 +40380,9 @@ ix86_store_bounds (rtx ptr, rtx slot, rtx bounds,
ptr = copy_addr_to_reg (slot);
}
+ if (!register_operand (ptr, Pmode))
+ ptr = ix86_zero_extend_to_Pmode (ptr);
+
gcc_assert (POINTER_BOUNDS_MODE_P (GET_MODE (bounds)));
if (!register_operand (bounds, BNDmode))
bounds = copy_to_mode_reg (BNDmode, bounds);
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 225104)
+++ config/i386/i386.md (working copy)
@@ -18950,28 +18950,28 @@
(define_expand "<mode>_mk"
[(set (match_operand:BND 0 "register_operand")
- (unspec:BND
- [(mem:<bnd_ptr>
- (match_par_dup 3
- [(match_operand:<bnd_ptr> 1 "register_operand")
- (match_operand:<bnd_ptr> 2 "address_mpx_no_base_operand")]))]
- UNSPEC_BNDMK))]
+ (unspec:BND
+ [(mem:<bnd_ptr>
+ (match_par_dup 3
+ [(match_operand:<bnd_ptr> 1 "register_operand")
+ (match_operand:<bnd_ptr> 2 "address_mpx_no_base_operand")]))]
+ UNSPEC_BNDMK))]
"TARGET_MPX"
{
operands[3] = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[1],
operands[2]),
- UNSPEC_BNDMK_ADDR);
+ UNSPEC_BNDMK_ADDR);
})
(define_insn "*<mode>_mk"
[(set (match_operand:BND 0 "register_operand" "=w")
- (unspec:BND
- [(match_operator:<bnd_ptr> 3 "bnd_mem_operator"
- [(unspec:<bnd_ptr>
- [(match_operand:<bnd_ptr> 1 "register_operand" "r")
- (match_operand:<bnd_ptr> 2 "address_mpx_no_base_operand" "Tb")]
- UNSPEC_BNDMK_ADDR)])]
- UNSPEC_BNDMK))]
+ (unspec:BND
+ [(match_operator:<bnd_ptr> 3 "bnd_mem_operator"
+ [(unspec:<bnd_ptr>
+ [(match_operand:<bnd_ptr> 1 "register_operand" "r")
+ (match_operand:<bnd_ptr> 2 "address_mpx_no_base_operand" "Tb")]
+ UNSPEC_BNDMK_ADDR)])]
+ UNSPEC_BNDMK))]
"TARGET_MPX"
"bndmk\t{%3, %0|%0, %3}"
[(set_attr "type" "mpxmk")])
@@ -18978,24 +18978,24 @@
(define_expand "mov<mode>"
[(set (match_operand:BND 0 "general_operand")
- (match_operand:BND 1 "general_operand"))]
+ (match_operand:BND 1 "general_operand"))]
"TARGET_MPX"
-{
- ix86_expand_move (<MODE>mode, operands);DONE;
-})
+ "ix86_expand_move (<MODE>mode, operands); DONE;")
(define_insn "*mov<mode>_internal_mpx"
[(set (match_operand:BND 0 "nonimmediate_operand" "=w,m")
- (match_operand:BND 1 "general_operand" "wm,w"))]
+ (match_operand:BND 1 "general_operand" "wm,w"))]
"TARGET_MPX"
"bndmov\t{%1, %0|%0, %1}"
[(set_attr "type" "mpxmov")])
(define_expand "<mode>_<bndcheck>"
- [(parallel [(unspec [(match_operand:BND 0 "register_operand")
- (match_operand:<bnd_ptr> 1 "address_no_seg_operand")]
BNDCHECK)
- (set (match_dup 2)
- (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
+ [(parallel
+ [(unspec
+ [(match_operand:BND 0 "register_operand")
+ (match_operand:<bnd_ptr> 1 "address_no_seg_operand")] BNDCHECK)
+ (set (match_dup 2)
+ (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
"TARGET_MPX"
{
operands[2] = gen_rtx_MEM (BLKmode, operands[1]);
@@ -19003,84 +19003,69 @@
})
(define_insn "*<mode>_<bndcheck>"
- [(parallel [(unspec [(match_operand:BND 0 "register_operand" "w")
- (match_operand:<bnd_ptr> 1 "address_no_seg_operand"
"Ts")] BNDCHECK)
- (set (match_operand:BLK 2 "bnd_mem_operator")
- (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
+ [(unspec
+ [(match_operand:BND 0 "register_operand" "w")
+ (match_operand:<bnd_ptr> 1 "address_no_seg_operand" "Ts")] BNDCHECK)
+ (set (match_operand:BLK 2 "bnd_mem_operator")
+ (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))]
"TARGET_MPX"
"bnd<bndcheck>\t{%a1, %0|%0, %a1}"
[(set_attr "type" "mpxchk")])
(define_expand "<mode>_ldx"
- [(parallel [(set (match_operand:BND 0 "register_operand")
- (unspec:BND
- [(mem:<bnd_ptr>
- (match_par_dup 3
- [(match_operand:<bnd_ptr> 1
"address_mpx_no_index_operand")
- (match_operand:<bnd_ptr> 2 "register_operand")]))]
- UNSPEC_BNDLDX))
- (use (mem:BLK (match_dup 1)))])]
+ [(parallel
+ [(set (match_operand:BND 0 "register_operand")
+ (unspec:BND
+ [(mem:<bnd_ptr>
+ (match_par_dup 3
+ [(match_operand:<bnd_ptr> 1 "address_mpx_no_index_operand")
+ (match_operand:<bnd_ptr> 2 "register_operand")]))]
+ UNSPEC_BNDLDX))
+ (use (mem:BLK (match_dup 1)))])]
"TARGET_MPX"
{
- /* Avoid registers which connot be used as index. */
+ /* Avoid registers which cannot be used as index. */
if (!index_register_operand (operands[2], Pmode))
- {
- rtx temp = gen_reg_rtx (Pmode);
- emit_move_insn (temp, operands[2]);
- operands[2] = temp;
- }
+ operands[2] = copy_addr_to_reg (operands[2]);
- /* If it was a register originally then it may have
- mode other than Pmode. We need to extend in such
- case because bndldx may work only with Pmode regs. */
- if (GET_MODE (operands[2]) != Pmode)
- operands[2] = ix86_zero_extend_to_Pmode (operands[2]);
-
operands[3] = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[1],
- operands[2]),
+ operands[2]),
UNSPEC_BNDLDX_ADDR);
})
(define_insn "*<mode>_ldx"
- [(parallel [(set (match_operand:BND 0 "register_operand" "=w")
- (unspec:BND
- [(match_operator:<bnd_ptr> 3 "bnd_mem_operator"
- [(unspec:<bnd_ptr>
- [(match_operand:<bnd_ptr> 1
"address_mpx_no_index_operand" "Ti")
- (match_operand:<bnd_ptr> 2 "register_operand" "l")]
- UNSPEC_BNDLDX_ADDR)])]
- UNSPEC_BNDLDX))
- (use (mem:BLK (match_dup 1)))])]
+ [(set (match_operand:BND 0 "register_operand" "=w")
+ (unspec:BND
+ [(match_operator:<bnd_ptr> 3 "bnd_mem_operator"
+ [(unspec:<bnd_ptr>
+ [(match_operand:<bnd_ptr> 1 "address_mpx_no_index_operand" "Ti")
+ (match_operand:<bnd_ptr> 2 "register_operand" "l")]
+ UNSPEC_BNDLDX_ADDR)])]
+ UNSPEC_BNDLDX))
+ (use (mem:BLK (match_dup 1)))]
"TARGET_MPX"
"bndldx\t{%3, %0|%0, %3}"
[(set_attr "type" "mpxld")])
(define_expand "<mode>_stx"
- [(parallel [(unspec [(mem:<bnd_ptr>
- (match_par_dup 3
- [(match_operand:<bnd_ptr> 0
"address_mpx_no_index_operand")
- (match_operand:<bnd_ptr> 1 "register_operand")]))
- (match_operand:BND 2 "register_operand")] UNSPEC_BNDSTX)
- (set (match_dup 4)
- (unspec:BLK [(match_dup 4)] UNSPEC_MPX_FENCE))])]
+ [(parallel
+ [(unspec
+ [(mem:<bnd_ptr>
+ (match_par_dup 3
+ [(match_operand:<bnd_ptr> 0 "address_mpx_no_index_operand")
+ (match_operand:<bnd_ptr> 1 "register_operand")]))
+ (match_operand:BND 2 "register_operand")]
+ UNSPEC_BNDSTX)
+ (set (match_dup 4)
+ (unspec:BLK [(match_dup 4)] UNSPEC_MPX_FENCE))])]
"TARGET_MPX"
{
- /* Avoid registers which connot be used as index. */
+ /* Avoid registers which cannot be used as index. */
if (!index_register_operand (operands[1], Pmode))
- {
- rtx temp = gen_reg_rtx (Pmode);
- emit_move_insn (temp, operands[1]);
- operands[1] = temp;
- }
+ operands[1] = copy_addr_to_reg (operands[1]);
- /* If it was a register originally then it may have
- mode other than Pmode. We need to extend in such
- case because bndstx may work only with Pmode regs. */
- if (GET_MODE (operands[1]) != Pmode)
- operands[1] = ix86_zero_extend_to_Pmode (operands[1]);
-
operands[3] = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[0],
- operands[1]),
+ operands[1]),
UNSPEC_BNDLDX_ADDR);
operands[4] = gen_rtx_MEM (BLKmode, operands[0]);
MEM_VOLATILE_P (operands[4]) = 1;
@@ -19087,14 +19072,16 @@
})
(define_insn "*<mode>_stx"
- [(parallel [(unspec [(match_operator:<bnd_ptr> 3 "bnd_mem_operator"
- [(unspec:<bnd_ptr>
- [(match_operand:<bnd_ptr> 0
"address_mpx_no_index_operand" "Ti")
- (match_operand:<bnd_ptr> 1 "register_operand" "l")]
- UNSPEC_BNDLDX_ADDR)])
- (match_operand:BND 2 "register_operand" "w")]
UNSPEC_BNDSTX)
- (set (match_operand:BLK 4 "bnd_mem_operator")
- (unspec:BLK [(match_dup 4)] UNSPEC_MPX_FENCE))])]
+ [(unspec
+ [(match_operator:<bnd_ptr> 3 "bnd_mem_operator"
+ [(unspec:<bnd_ptr>
+ [(match_operand:<bnd_ptr> 0 "address_mpx_no_index_operand" "Ti")
+ (match_operand:<bnd_ptr> 1 "register_operand" "l")]
+ UNSPEC_BNDLDX_ADDR)])
+ (match_operand:BND 2 "register_operand" "w")]
+ UNSPEC_BNDSTX)
+ (set (match_operand:BLK 4 "bnd_mem_operator")
+ (unspec:BLK [(match_dup 4)] UNSPEC_MPX_FENCE))]
"TARGET_MPX"
"bndstx\t{%2, %3|%3, %2}"
[(set_attr "type" "mpxst")])
@@ -19101,9 +19088,9 @@
(define_insn "move_size_reloc_<mode>"
[(set (match_operand:SWI48 0 "register_operand" "=r")
- (unspec:SWI48
- [(match_operand:SWI48 1 "symbol_operand")]
- UNSPEC_SIZEOF))]
+ (unspec:SWI48
+ [(match_operand:SWI48 1 "symbol_operand")]
+ UNSPEC_SIZEOF))]
"TARGET_MPX"
{
if (x86_64_immediate_size_operand (operands[1], VOIDmode))
