Hello!

Now that Vlad fixed the real problem of PR 63620 [1], we can remove
the temporary workaround. The patch also adds the testcase from PR.

2014-11-11  Uros Bizjak  <ubiz...@gmail.com>

    Revert:
    2014-10-31  Uros Bizjak  <ubiz...@gmail.com>

    PR target/63620
    * config/i386/i386-protos.h (ix86_use_pseudo_pic_reg): Declare.
    * config/i386/i386.c (ix86_use_pseudo_pic_reg): Export.
    * config/i386/i386.md (*pushtf): Allow only CONST_DOUBLEs that won't
    be reloaded through memory.
    (*pushxf): Ditto.
    (*pushdf): Ditto.

testsuite/ChangeLog:

2014-11-11  Uros Bizjak  <ubiz...@gmail.com>
        Ilya Enkovich  <ilya.enkov...@intel.com>

    PR target/63620
    * gcc.target/i386/pr63620.c: New test.

Patch was ootstrapped and regression tested on x86_64-linux-gnu
{,-m32}. Committed to mainline SVN.

[1] https://gcc.gnu.org/ml/gcc-patches/2014-11/msg00875.html

Uros.
Index: ChangeLog
===================================================================
--- ChangeLog   (revision 217320)
+++ ChangeLog   (working copy)
@@ -1,3 +1,16 @@
+2014-11-10  Uros Bizjak  <ubiz...@gmail.com>
+
+       Revert:
+       2014-10-31  Uros Bizjak  <ubiz...@gmail.com>
+
+       PR target/63620
+       * config/i386/i386-protos.h (ix86_use_pseudo_pic_reg): Declare.
+       * config/i386/i386.c (ix86_use_pseudo_pic_reg): Export.
+       * config/i386/i386.md (*pushtf): Allow only CONST_DOUBLEs that won't
+       be reloaded through memory.
+       (*pushxf): Ditto.
+       (*pushdf): Ditto.
+
 2014-11-10  Vladimir Makarov  <vmaka...@redhat.com>
 
        PR rtl-optimization/63620
Index: config/i386/i386-protos.h
===================================================================
--- config/i386/i386-protos.h   (revision 217320)
+++ config/i386/i386-protos.h   (working copy)
@@ -42,8 +42,6 @@ extern enum calling_abi ix86_function_type_abi (co
 
 extern void ix86_reset_previous_fndecl (void);
 
-extern bool ix86_use_pseudo_pic_reg (void);
-
 #ifdef RTX_CODE
 extern int standard_80387_constant_p (rtx);
 extern const char *standard_80387_constant_opcode (rtx);
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c  (revision 217320)
+++ config/i386/i386.c  (working copy)
@@ -6184,7 +6184,7 @@ ix86_maybe_switch_abi (void)
 
 /* Return 1 if pseudo register should be created and used to hold
    GOT address for PIC code.  */
-bool
+static bool
 ix86_use_pseudo_pic_reg (void)
 {
   if ((TARGET_64BIT
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 217320)
+++ config/i386/i386.md (working copy)
@@ -2779,15 +2779,10 @@
 
 ;; Floating point push instructions.
 
-;; %%% Remove CONST_DOUBLE workaround after PR63620 is fixed!
 (define_insn "*pushtf"
   [(set (match_operand:TF 0 "push_operand" "=<,<")
        (match_operand:TF 1 "general_no_elim_operand" "x,*roF"))]
-  "(TARGET_64BIT || TARGET_SSE)
-   && (!ix86_use_pseudo_pic_reg ()
-       || !can_create_pseudo_p ()
-       || GET_CODE (operands[1]) != CONST_DOUBLE
-       || standard_sse_constant_p (operands[1]))"
+  "TARGET_64BIT || TARGET_SSE"
 {
   /* This insn should be already split before reg-stack.  */
   gcc_unreachable ();
@@ -2809,14 +2804,10 @@
   operands[0] = replace_equiv_address (operands[0], stack_pointer_rtx);
 })
 
-;; %%% Remove CONST_DOUBLE workaround after PR63620 is fixed!
 (define_insn "*pushxf"
   [(set (match_operand:XF 0 "push_operand" "=<,<")
        (match_operand:XF 1 "general_no_elim_operand" "f,Yx*roF"))]
-  "!ix86_use_pseudo_pic_reg ()
-   || !can_create_pseudo_p ()
-   || GET_CODE (operands[1]) != CONST_DOUBLE
-   || standard_80387_constant_p (operands[1]) > 0"
+  ""
 {
   /* This insn should be already split before reg-stack.  */
   gcc_unreachable ();
@@ -2844,17 +2835,10 @@
   operands[0] = replace_equiv_address (operands[0], stack_pointer_rtx);
 })
 
-;; %%% Remove CONST_DOUBLE workaround after PR63620 is fixed!
 (define_insn "*pushdf"
   [(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
        (match_operand:DF 1 "general_no_elim_operand" "f,Yd*roF,rmF,x"))]
-  "!ix86_use_pseudo_pic_reg ()
-   || !can_create_pseudo_p ()
-   || GET_CODE (operands[1]) != CONST_DOUBLE
-   || (!(TARGET_SSE2 && TARGET_SSE_MATH)
-       && standard_80387_constant_p (operands[1]) > 0)
-   || (TARGET_SSE2 && TARGET_SSE_MATH
-       && standard_sse_constant_p (operands[1]))"
+  ""
 {
   /* This insn should be already split before reg-stack.  */
   gcc_unreachable ();
Index: testsuite/gcc.target/i386/pr63620.c
===================================================================
--- testsuite/gcc.target/i386/pr63620.c (revision 0)
+++ testsuite/gcc.target/i386/pr63620.c (working copy)
@@ -0,0 +1,20 @@
+/* PR target/63620 */
+/* { dg-do compile } */
+/* { dg-require-effective-target fpic } */
+/* { dg-require-effective-target ia32 } */
+/* { dg-options "-O2 -fpic -mfpmath=sse -msse" } */
+
+static const __float128 cf = 0.1E+30Q;
+
+typedef __float128 (*func)(__float128 x);
+
+__float128
+test (__float128 x, int p, func f)
+{
+  x = f (x);
+  if (p)
+    x = f (cf);
+  return x;
+}
+
+/* { dg-final { scan-assembler "get_pc_thunk" } } */

Reply via email to