Re: [PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[Segher Boessenkool]

Hi!

On Fri, Dec 04, 2020 at 01:19:11PM -0600, acsaw...@linux.ibm.com wrote:
> This patch adds the first batch of patterns to support p10 fusion. These
> will allow combine to create a single insn for a pair of instructions
> that that power10 can fuse and execute. These particular ones have the
> requirement that only cr0 can be used when fusing a load with a compare
> immediate of -1/0/1 (if signed) or 0/1 (if unsigned), so we want combine
> to put that requirement in, and if it doesn't work out later the splitter
> can get used.

> The patterns are generated by a script genfusion.pl and live in new file
> fusion.md. This script will be expanded to generate more patterns for
> fusion.

> This also adds option -mpower10-fusion which defaults on for power10 and
> will gate all these fusion patterns. In addition I have added an
> undocumented option -mpower10-fusion-ld-cmpi (which may be removed later)
> that just controls the load+compare-immediate patterns. I have make
> these default on for power10 but they are not disallowed for earlier
> processors because it is still valid code. This allows us to test the
> correctness of fusion code generation by turning it on explicitly.

>   * config/rs6000/genfusion.pl: New file, script to generate
>   define_insn_and_split patterns so combine can arrange fused
>   instructions next to each other.
>   * config/rs6000/fusion.md: New file, generated fused instruction
>   patterns for combine.

So this script is never run by any target, you have to do it all
manually?  Okay.

>   * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
>   (non_update_memory_operand): New predicate.
>   * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
>   OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
>   POWERPC_MASKS.
>   * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
>   prototype.
>   * config/rs6000/rs6000.c (rs6000_option_override_internal):
>   automatically set -mpower10-fusion and -mpower10-fusion-ld-cmpi
>   if target is power10.

Capital A.  And, you do not set any "-m", you set OPTION_MASK_P10_FUSION,
instead.

Every new entry starts on a new line:

(rs600_opt_masks): Allow -mpower10-fusion in function attributes.
(address_is_non_pfx_d_or_x): New function.

>   * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
>   * config/rs6000/rs6000.md: Include fusion.md.
>   * config/rs6000/rs6000.opt: Add -mpower10-fusion
>   and -mpower10-fusion-ld-cmpi.
>   * config/rs6000/t-rs6000: Add dependencies involving fusion.md.

> --- /dev/null
> +++ b/gcc/config/rs6000/fusion.md
> @@ -0,0 +1,357 @@
> +;; -*- buffer-read-only: t -*-

Don't do these things please.  You can make the file r/o if you really
want to, that works for all (sane) editors (and works fine in Git).

> +;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
> +;; load mode is DI result mode is clobber compare mode is CC extend is none
> +(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
> +  [(set (match_operand:CC 2 "cc_reg_operand" "=x")
> +(compare:CC (match_operand:DI 1 "non_update_memory_operand" "m")
> + (match_operand:DI 3 "const_m1_to_1_operand" "n")))

The indent here is wrong?  Just use all spaces, that is fine, and easier
than getting tabs right in a generated file.

> +   (clobber (match_scratch:DI 0 "=r"))]
> +  "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)"

I would make TARGET_P10_FUSION_LD_CMPI imply TARGET_P10_FUSION, that
makes all further code simpler, no?

> +  "ld%X1 %0,%1\;cmpdi 0,%0,%3"
> +  "&& reload_completed
> +   && (cc_reg_not_cr0_operand (operands[2], CCmode)
> +   || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), DImode, 
> NON_PREFIXED_DS))"

Space after comma.  Line too long (I think you can easily break it in the
source?  If not, no man overboard :-) )

> +  [(set (match_dup 0) (match_dup 1))
> +   (set (match_dup 2)
> +(compare:CC (match_dup 0)
> + (match_dup 3)))]

(Here, the line before where you use a tab should have one, already.)

If you write the first arm on one line, than why not this one (or at
least start the rhs on the same line as the lhs, etc.)

> +  [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
> +(compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m")
> + (match_operand:QI 3 "const_0_to_1_operand" "n")))
> +   (clobber (match_scratch:GPR 0 "=r"))]
> +  "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)"
> +  "lbz%X1 %0,%1\;cmpldi 0,%0,%3"

This should use
  cmpldi %2,%0,%3
(not all assemblers allow bare "0", some require "cr0").

> --- /dev/null
> +++ b/gcc/config/rs6000/genfusion.pl
> @@ -0,0 +1,144 @@
> +#!/usr/bin/perl -w

Since Perl 5.6, you can use
  use warnings;
instead of -w.

Also:
  use strict;
(which will catch a few errors you made; nothing super serious, but
still).

> +# Generate fusion.md 

Re: [PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[Aaron Sawdey via Gcc-patches]

Ping.

Aaron Sawdey, Ph.D. saw...@linux.ibm.com
IBM Linux on POWER Toolchain
 

> On Jan 3, 2021, at 2:42 PM, Aaron Sawdey  wrote:
> 
> Ping.
> 
> I assume we’re going to want a separate patch for the new instruction type.
> 
> Aaron Sawdey, Ph.D. saw...@linux.ibm.com
> IBM Linux on POWER Toolchain
> 
> 
>> On Dec 4, 2020, at 1:19 PM, acsaw...@linux.ibm.com wrote:
>> 
>> From: Aaron Sawdey 
>> 
>> This patch adds the first batch of patterns to support p10 fusion. These
>> will allow combine to create a single insn for a pair of instructions
>> that that power10 can fuse and execute. These particular ones have the
>> requirement that only cr0 can be used when fusing a load with a compare
>> immediate of -1/0/1 (if signed) or 0/1 (if unsigned), so we want combine
>> to put that requirement in, and if it doesn't work out later the splitter
>> can get used.
>> 
>> The patterns are generated by a script genfusion.pl and live in new file
>> fusion.md. This script will be expanded to generate more patterns for
>> fusion.
>> 
>> This also adds option -mpower10-fusion which defaults on for power10 and
>> will gate all these fusion patterns. In addition I have added an
>> undocumented option -mpower10-fusion-ld-cmpi (which may be removed later)
>> that just controls the load+compare-immediate patterns. I have make
>> these default on for power10 but they are not disallowed for earlier
>> processors because it is still valid code. This allows us to test the
>> correctness of fusion code generation by turning it on explicitly.
>> 
>> If bootstrap/regtest is clean, ok for trunk?
>> 
>> Thanks!
>> 
>>  Aaron
>> 
>> gcc/ChangeLog:
>> 
>>  * config/rs6000/genfusion.pl: New file, script to generate
>>  define_insn_and_split patterns so combine can arrange fused
>>  instructions next to each other.
>>  * config/rs6000/fusion.md: New file, generated fused instruction
>>  patterns for combine.
>>  * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
>>  (non_update_memory_operand): New predicate.
>>  * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
>>  OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
>>  POWERPC_MASKS.
>>  * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
>>  prototype.
>>  * config/rs6000/rs6000.c (rs6000_option_override_internal):
>>  automatically set -mpower10-fusion and -mpower10-fusion-ld-cmpi
>>  if target is power10.  (rs600_opt_masks): Allow -mpower10-fusion
>>  in function attributes.  (address_is_non_pfx_d_or_x): New function.
>>  * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
>>  * config/rs6000/rs6000.md: Include fusion.md.
>>  * config/rs6000/rs6000.opt: Add -mpower10-fusion
>>  and -mpower10-fusion-ld-cmpi.
>>  * config/rs6000/t-rs6000: Add dependencies involving fusion.md.
>> ---
>> gcc/config/rs6000/fusion.md   | 357 ++
>> gcc/config/rs6000/genfusion.pl| 144 
>> gcc/config/rs6000/predicates.md   |  14 ++
>> gcc/config/rs6000/rs6000-cpus.def |   6 +-
>> gcc/config/rs6000/rs6000-protos.h |   2 +
>> gcc/config/rs6000/rs6000.c|  51 +
>> gcc/config/rs6000/rs6000.h|   1 +
>> gcc/config/rs6000/rs6000.md   |   1 +
>> gcc/config/rs6000/rs6000.opt  |   8 +
>> gcc/config/rs6000/t-rs6000|   6 +-
>> 10 files changed, 588 insertions(+), 2 deletions(-)
>> create mode 100644 gcc/config/rs6000/fusion.md
>> create mode 100755 gcc/config/rs6000/genfusion.pl
>> 
>> diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
>> new file mode 100644
>> index 000..a4d3a6ae7f3
>> --- /dev/null
>> +++ b/gcc/config/rs6000/fusion.md
>> @@ -0,0 +1,357 @@
>> +;; -*- buffer-read-only: t -*-
>> +;; Generated automatically by genfusion.pl
>> +
>> +;; Copyright (C) 2020 Free Software Foundation, Inc.
>> +;;
>> +;; This file is part of GCC.
>> +;;
>> +;; GCC is free software; you can redistribute it and/or modify it under
>> +;; the terms of the GNU General Public License as published by the Free
>> +;; Software Foundation; either version 3, or (at your option) any later
>> +;; version.
>> +;;
>> +;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
>> +;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> +;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
>> +;; for more details.
>> +;;
>> +;; You should have received a copy of the GNU General Public License
>> +;; along with GCC; see the file COPYING3.  If not see
>> +;; .
>> +
>> +;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
>> +;; load mode is DI result mode is clobber compare mode is CC extend is none
>> +(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
>> +  [(set (match_operand:CC 2 "cc_reg_operand" "=x")
>> +(compare:CC (match_operand:DI 1 "non_update_memory_operand" "m")
>> + 

Re: [PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[Aaron Sawdey via Gcc-patches]

Ping.

I assume we’re going to want a separate patch for the new instruction type.

Aaron Sawdey, Ph.D. saw...@linux.ibm.com
IBM Linux on POWER Toolchain
 

> On Dec 4, 2020, at 1:19 PM, acsaw...@linux.ibm.com wrote:
> 
> From: Aaron Sawdey 
> 
> This patch adds the first batch of patterns to support p10 fusion. These
> will allow combine to create a single insn for a pair of instructions
> that that power10 can fuse and execute. These particular ones have the
> requirement that only cr0 can be used when fusing a load with a compare
> immediate of -1/0/1 (if signed) or 0/1 (if unsigned), so we want combine
> to put that requirement in, and if it doesn't work out later the splitter
> can get used.
> 
> The patterns are generated by a script genfusion.pl and live in new file
> fusion.md. This script will be expanded to generate more patterns for
> fusion.
> 
> This also adds option -mpower10-fusion which defaults on for power10 and
> will gate all these fusion patterns. In addition I have added an
> undocumented option -mpower10-fusion-ld-cmpi (which may be removed later)
> that just controls the load+compare-immediate patterns. I have make
> these default on for power10 but they are not disallowed for earlier
> processors because it is still valid code. This allows us to test the
> correctness of fusion code generation by turning it on explicitly.
> 
> If bootstrap/regtest is clean, ok for trunk?
> 
> Thanks!
> 
>   Aaron
> 
> gcc/ChangeLog:
> 
>   * config/rs6000/genfusion.pl: New file, script to generate
>   define_insn_and_split patterns so combine can arrange fused
>   instructions next to each other.
>   * config/rs6000/fusion.md: New file, generated fused instruction
>   patterns for combine.
>   * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
>   (non_update_memory_operand): New predicate.
>   * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
>   OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
>   POWERPC_MASKS.
>   * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
>   prototype.
>   * config/rs6000/rs6000.c (rs6000_option_override_internal):
>   automatically set -mpower10-fusion and -mpower10-fusion-ld-cmpi
>   if target is power10.  (rs600_opt_masks): Allow -mpower10-fusion
>   in function attributes.  (address_is_non_pfx_d_or_x): New function.
>   * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
>   * config/rs6000/rs6000.md: Include fusion.md.
>   * config/rs6000/rs6000.opt: Add -mpower10-fusion
>   and -mpower10-fusion-ld-cmpi.
>   * config/rs6000/t-rs6000: Add dependencies involving fusion.md.
> ---
> gcc/config/rs6000/fusion.md   | 357 ++
> gcc/config/rs6000/genfusion.pl| 144 
> gcc/config/rs6000/predicates.md   |  14 ++
> gcc/config/rs6000/rs6000-cpus.def |   6 +-
> gcc/config/rs6000/rs6000-protos.h |   2 +
> gcc/config/rs6000/rs6000.c|  51 +
> gcc/config/rs6000/rs6000.h|   1 +
> gcc/config/rs6000/rs6000.md   |   1 +
> gcc/config/rs6000/rs6000.opt  |   8 +
> gcc/config/rs6000/t-rs6000|   6 +-
> 10 files changed, 588 insertions(+), 2 deletions(-)
> create mode 100644 gcc/config/rs6000/fusion.md
> create mode 100755 gcc/config/rs6000/genfusion.pl
> 
> diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
> new file mode 100644
> index 000..a4d3a6ae7f3
> --- /dev/null
> +++ b/gcc/config/rs6000/fusion.md
> @@ -0,0 +1,357 @@
> +;; -*- buffer-read-only: t -*-
> +;; Generated automatically by genfusion.pl
> +
> +;; Copyright (C) 2020 Free Software Foundation, Inc.
> +;;
> +;; This file is part of GCC.
> +;;
> +;; GCC is free software; you can redistribute it and/or modify it under
> +;; the terms of the GNU General Public License as published by the Free
> +;; Software Foundation; either version 3, or (at your option) any later
> +;; version.
> +;;
> +;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
> +;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
> +;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
> +;; for more details.
> +;;
> +;; You should have received a copy of the GNU General Public License
> +;; along with GCC; see the file COPYING3.  If not see
> +;; .
> +
> +;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
> +;; load mode is DI result mode is clobber compare mode is CC extend is none
> +(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
> +  [(set (match_operand:CC 2 "cc_reg_operand" "=x")
> +(compare:CC (match_operand:DI 1 "non_update_memory_operand" "m")
> + (match_operand:DI 3 "const_m1_to_1_operand" "n")))
> +   (clobber (match_scratch:DI 0 "=r"))]
> +  "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)"
> +  "ld%X1 %0,%1\;cmpdi 0,%0,%3"
> +  "&& reload_completed
> +   && (cc_reg_not_cr0_operand 

Re: [PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[Segher Boessenkool]

On Mon, Dec 21, 2020 at 12:11:44PM -0600, Pat Haugen wrote:
> On 12/4/20 1:19 PM, acsawdey--- via Gcc-patches wrote:
> > + print "  [(set_attr \"type\" \"load\")\n";
> 
> We need to tag these with a new instruction type, such as 'fused-load-cmp', 
> so the scheduler can distinguish them from normal loads.

Yeah...  and the insn_cost function can use that to give better costs
for such fused instructions, as well (it will right now do 12 for
load+cmp, not all that bad -- for combine that always counts as better
that separate load (8) and cmp (4) insns, since it is "just one insn"...
but we can do better than that, make it a bit cheaper).


Segher

Re: [PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[Pat Haugen via Gcc-patches]

On 12/4/20 1:19 PM, acsawdey--- via Gcc-patches wrote:
> +   print "  [(set_attr \"type\" \"load\")\n";

We need to tag these with a new instruction type, such as 'fused-load-cmp', so 
the scheduler can distinguish them from normal loads.

-Pat

Re: [PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[will schmidt via Gcc-patches]

On Fri, 2020-12-04 at 13:19 -0600, acsawdey--- via Gcc-patches wrote:
> From: Aaron Sawdey 
> 

Assorted comments sprinkled around below.
thanks
-Will


> This patch adds the first batch of patterns to support p10 fusion. These
> will allow combine to create a single insn for a pair of instructions
> that that power10 can fuse and execute. These particular ones have the

Just one that, or maybe 'that the'.
s/ones/fusion pairs/ ?

> requirement that only cr0 can be used when fusing a load with a compare
> immediate of -1/0/1 (if signed) or 0/1 (if unsigned), so we want combine
> to put that requirement in, and if it doesn't work out later the splitter
> can get used.

... splitter can get used, or ... splitter will 

> 
> The patterns are generated by a script genfusion.pl and live in new file
> fusion.md. This script will be expanded to generate more patterns for
> fusion.

ok

> 
> This also adds option -mpower10-fusion which defaults on for power10 and
> will gate all these fusion patterns. In addition I have added an
> undocumented option -mpower10-fusion-ld-cmpi (which may be removed later)
> that just controls the load+compare-immediate patterns. I have make

made

> these default on for power10 but they are not disallowed for earlier
> processors because it is still valid code. This allows us to test the
> correctness of fusion code generation by turning it on explicitly.
> 
> If bootstrap/regtest is clean, ok for trunk?
> 
> Thanks!
> 
>Aaron
> 
> gcc/ChangeLog:
> 
>   * config/rs6000/genfusion.pl: New file, script to generate
>   define_insn_and_split patterns so combine can arrange fused
>   instructions next to each other.

New script to generate ...

>   * config/rs6000/fusion.md: New file, generated fused instruction
>   patterns for combine.

>   * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
>   (non_update_memory_operand): New predicate.
ok
>   * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
>   OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
>   POWERPC_MASKS.
>   * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
>   prototype.

All usages of address_is_non_pfx_d_or_x() appear to be negated, i.e. 
+   || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), 
DImode, NON_PREFIXED_DS))" 
Fully understanding that naming is
hard, I'd wonder if that can be adjusted to avoid the double negative. 
something like (address_load_mode_requires_prefix (...foo) ?


>   * config/rs6000/rs6000.c (rs6000_option_override_internal):
>   automatically set -mpower10-fusion and -mpower10-fusion-ld-cmpi
>   if target is power10.  (rs600_opt_masks): Allow -mpower10-fusion
>   in function attributes.  (address_is_non_pfx_d_or_x): New function.

ok

>   * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
>   * config/rs6000/rs6000.md: Include fusion.md.
>   * config/rs6000/rs6000.opt: Add -mpower10-fusion
>   and -mpower10-fusion-ld-cmpi.

ok

>   * config/rs6000/t-rs6000: Add dependencies involving fusion.md.

ok


> ---
>  gcc/config/rs6000/fusion.md   | 357 ++
>  gcc/config/rs6000/genfusion.pl| 144 
>  gcc/config/rs6000/predicates.md   |  14 ++
>  gcc/config/rs6000/rs6000-cpus.def |   6 +-
>  gcc/config/rs6000/rs6000-protos.h |   2 +
>  gcc/config/rs6000/rs6000.c|  51 +
>  gcc/config/rs6000/rs6000.h|   1 +
>  gcc/config/rs6000/rs6000.md   |   1 +
>  gcc/config/rs6000/rs6000.opt  |   8 +
>  gcc/config/rs6000/t-rs6000|   6 +-
>  10 files changed, 588 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/config/rs6000/fusion.md
>  create mode 100755 gcc/config/rs6000/genfusion.pl
> 
> diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
> new file mode 100644
> index 000..a4d3a6ae7f3
> --- /dev/null
> +++ b/gcc/config/rs6000/fusion.md
> @@ -0,0 +1,357 @@
> +;; -*- buffer-read-only: t -*-
> +;; Generated automatically by genfusion.pl
> +
> +;; Copyright (C) 2020 Free Software Foundation, Inc.
> +;;
> +;; This file is part of GCC.
> +;;
> +;; GCC is free software; you can redistribute it and/or modify it under
> +;; the terms of the GNU General Public License as published by the Free
> +;; Software Foundation; either version 3, or (at your option) any later
> +;; version.
> +;;
> +;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
> +;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
> +;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
> +;; for more details.
> +;;
> +;; You should have received a copy of the GNU General Public License
> +;; along with GCC; see the file COPYING3.  If not see
> +;; .
> +
> +;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
> +;; load mode is DI result mode is clobber compare mode is CC extend is none
> 

[PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

[acsawdey--- via Gcc-patches]

From: Aaron Sawdey 

This patch adds the first batch of patterns to support p10 fusion. These
will allow combine to create a single insn for a pair of instructions
that that power10 can fuse and execute. These particular ones have the
requirement that only cr0 can be used when fusing a load with a compare
immediate of -1/0/1 (if signed) or 0/1 (if unsigned), so we want combine
to put that requirement in, and if it doesn't work out later the splitter
can get used.

The patterns are generated by a script genfusion.pl and live in new file
fusion.md. This script will be expanded to generate more patterns for
fusion.

This also adds option -mpower10-fusion which defaults on for power10 and
will gate all these fusion patterns. In addition I have added an
undocumented option -mpower10-fusion-ld-cmpi (which may be removed later)
that just controls the load+compare-immediate patterns. I have make
these default on for power10 but they are not disallowed for earlier
processors because it is still valid code. This allows us to test the
correctness of fusion code generation by turning it on explicitly.

If bootstrap/regtest is clean, ok for trunk?

Thanks!

   Aaron

gcc/ChangeLog:

* config/rs6000/genfusion.pl: New file, script to generate
define_insn_and_split patterns so combine can arrange fused
instructions next to each other.
* config/rs6000/fusion.md: New file, generated fused instruction
patterns for combine.
* config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
(non_update_memory_operand): New predicate.
* config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
POWERPC_MASKS.
* config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
prototype.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
automatically set -mpower10-fusion and -mpower10-fusion-ld-cmpi
if target is power10.  (rs600_opt_masks): Allow -mpower10-fusion
in function attributes.  (address_is_non_pfx_d_or_x): New function.
* config/rs6000/rs6000.h: Add MASK_P10_FUSION.
* config/rs6000/rs6000.md: Include fusion.md.
* config/rs6000/rs6000.opt: Add -mpower10-fusion
and -mpower10-fusion-ld-cmpi.
* config/rs6000/t-rs6000: Add dependencies involving fusion.md.
---
 gcc/config/rs6000/fusion.md   | 357 ++
 gcc/config/rs6000/genfusion.pl| 144 
 gcc/config/rs6000/predicates.md   |  14 ++
 gcc/config/rs6000/rs6000-cpus.def |   6 +-
 gcc/config/rs6000/rs6000-protos.h |   2 +
 gcc/config/rs6000/rs6000.c|  51 +
 gcc/config/rs6000/rs6000.h|   1 +
 gcc/config/rs6000/rs6000.md   |   1 +
 gcc/config/rs6000/rs6000.opt  |   8 +
 gcc/config/rs6000/t-rs6000|   6 +-
 10 files changed, 588 insertions(+), 2 deletions(-)
 create mode 100644 gcc/config/rs6000/fusion.md
 create mode 100755 gcc/config/rs6000/genfusion.pl

diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
new file mode 100644
index 000..a4d3a6ae7f3
--- /dev/null
+++ b/gcc/config/rs6000/fusion.md
@@ -0,0 +1,357 @@
+;; -*- buffer-read-only: t -*-
+;; Generated automatically by genfusion.pl
+
+;; Copyright (C) 2020 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it under
+;; the terms of the GNU General Public License as published by the Free
+;; Software Foundation; either version 3, or (at your option) any later
+;; version.
+;;
+;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+;; for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; .
+
+;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
+;; load mode is DI result mode is clobber compare mode is CC extend is none
+(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
+  [(set (match_operand:CC 2 "cc_reg_operand" "=x")
+(compare:CC (match_operand:DI 1 "non_update_memory_operand" "m")
+ (match_operand:DI 3 "const_m1_to_1_operand" "n")))
+   (clobber (match_scratch:DI 0 "=r"))]
+  "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)"
+  "ld%X1 %0,%1\;cmpdi 0,%0,%3"
+  "&& reload_completed
+   && (cc_reg_not_cr0_operand (operands[2], CCmode)
+   || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), DImode, 
NON_PREFIXED_DS))"
+  [(set (match_dup 0) (match_dup 1))
+   (set (match_dup 2)
+(compare:CC (match_dup 0)
+   (match_dup 3)))]
+  ""
+  [(set_attr "type" "load")
+   (set_attr "cost" "8")
+   (set_attr "length" "8")])
+
+;; load-cmpi fusion pattern