Re: [PATCH] Enable GCC support for AMX
Thanks! I'll ask my colleague to help check in the patch. Kirill Yukhin 于2020年9月28日周一 下午7:38写道： > Hello, > > On 12 сен 01:00, Hongyu Wang wrote: > > Hi > > > > Thanks for your review, and sorry for the late reply. It took a while > > to finish the runtime test. > > Thanks for your fixes! The patch is OK for trunk. > > -- > Thanks, K > -- Regards, Hongyu, Wang
Re: [PATCH] Enable GCC support for AMX
Hello, On 12 сен 01:00, Hongyu Wang wrote: > Hi > > Thanks for your review, and sorry for the late reply. It took a while > to finish the runtime test. Thanks for your fixes! The patch is OK for trunk. -- Thanks, K
Re: [PATCH] Enable GCC support for AMX
rin.h
> > > -tsxldtrkintrin.h"
> > > +tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h
> amxbf16intrin.h"
> >
> > Line more than 80 chars.
> >
> > > ;;
> > > x86_64-*-*)
> > > cpu_type=i386
> > > @@ -447,7 +447,7 @@ x86_64-*-*)
> > > waitpkgintrin.h cldemoteintrin.h
> avx512bf16vlintrin.h
> > > avx512bf16intrin.h enqcmdintrin.h
> serializeintrin.h
> > > avx512vp2intersectintrin.h
> avx512vp2intersectvlintrin.h
> > > -tsxldtrkintrin.h"
> > > +tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h
> amxbf16intrin.h"
> >
> > Ditto.
> >
> > > diff --git a/gcc/config/i386/amxbf16intrin.h
> b/gcc/config/i386/amxbf16intrin.h
> > > new file mode 100644
> > > index 000..df0e2262d50
> > > --- /dev/null
> > > +++ b/gcc/config/i386/amxbf16intrin.h
> > > @@ -0,0 +1,25 @@
> > > +#if !defined _IMMINTRIN_H_INCLUDED
> > > +#error "Never use directly; include
> instead."
> > > +#endif
> > > +
> > > +#ifndef _AMXBF16INTRIN_H_INCLUDED
> > > +#define _AMXBF16INTRIN_H_INCLUDED
> > > +
> > > +#if !defined(__AMX_BF16__)
> > > +#pragma GCC push_options
> > > +#pragma GCC target("amx-bf16")
> > > +#define __DISABLE_AMX_BF16__
> > > +#endif /* __AMX_BF16__ */
> > > +
> > > +#if defined(__x86_64__) && defined(__AMX_BF16__)
> > > +#define _tile_dpbf16ps(dst,src1,src2)
> \
> > > + __asm__ volatile\
> > > + ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1",
> %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
> > > +#endif
> >
> > I hope in future we'll replace it with unspecs at least...
> >
> > > diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> > > index c9f7195d423..9389dc24948 100644
> > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> > > index bca8c856dc8..a46e31f5862 100644
> > > --- a/gcc/doc/invoke.texi
> > > +++ b/gcc/doc/invoke.texi
> > > @@ -1357,6 +1357,7 @@ See RS/6000 and PowerPC Options.
> > > -mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b
> -mavx512vpopcntdq @gol
> > > -mavx5124fmaps -mavx512vnni -mavx5124vnniw -mprfchw -mrdpid @gol
> > > -mrdseed -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol
> > > +-mamx-tile -mamx-int8 -mamx-bf16@gol
> >
> > Add space please.
> >
> > > diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-2.c
> b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-2.c
> > > new file mode 100644
> > > index 000..605a44df3f8
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-2.c
> > > @@ -0,0 +1,4 @@
> > > +/* { dg-do assemble { target { ! ia32 } } } */
> > > +/* { dg-options "-O2 -mamx-bf16 -masm=intel" } */
> > > +/* { dg-require-effective-target amx_bf16 } */
> > > +#include"amxbf16-asmintel-1.c"
> >
> > I didn't get it. We ususally use second tescase to actually execute
> > it and (well, a little) verify that semantics is ok. E.g. that
> > operands order is correct. Could you please do that?
> > This applies to all *-2.c cases.
> > I've checked and looks like public SDE simulator supports AMX.
> >
> > --
> > K
>
--
Regards,
Hongyu, Wang
From f8d7df2fa959662f883ce03a05ffce08274e2d42 Mon Sep 17 00:00:00 2001
From: liuhongt
Date: Thu, 25 Jul 2019 16:49:36 +0800
Subject: [PATCH] Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16.
AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease
AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud
AMX-BF16:tdpbf16ps
gcc/ChangeLog
* common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET,
OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET,
OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET,
OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET):
New marcos.
(ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16.
* common/config/i386/i386-cpuinfo.h (processor_types): Add
FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16.
* common/config/i386/cpuinfo.h (XSTATE_TILECFG,
XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro.
(get_available_features): Enable AMX features only if
their states are suoorited by OSXSAVE.
* common/config/i386/i386-isas.h: Add ISA
Re: [PATCH] Enable GCC support for AMX
Hi
Thanks for your review, and sorry for the late reply. It took a while
to finish the runtime test.
> > diff --git a/gcc/config.gcc b/gcc/config.gcc
> > index 797f0ad5edd..d0e59e86a5c 100644
> > --- a/gcc/config.gcc
> > +++ b/gcc/config.gcc
> > @@ -412,7 +412,7 @@ i[34567]86-*-*)
> > waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h
> > avx512bf16intrin.h enqcmdintrin.h serializeintrin.h
> > avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
> > -tsxldtrkintrin.h"
> > +tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h
> > amxbf16intrin.h"
>
> Line more than 80 chars.
>
> > ;;
> > x86_64-*-*)
> > cpu_type=i386
> > @@ -447,7 +447,7 @@ x86_64-*-*)
> > waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h
> > avx512bf16intrin.h enqcmdintrin.h serializeintrin.h
> > avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
> > -tsxldtrkintrin.h"
> > +tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h
> > amxbf16intrin.h"
>
> Ditto.
Changed.
>
> > diff --git a/gcc/config/i386/amxbf16intrin.h
> > b/gcc/config/i386/amxbf16intrin.h
> > new file mode 100644
> > index 000..df0e2262d50
> > --- /dev/null
> > +++ b/gcc/config/i386/amxbf16intrin.h
> > @@ -0,0 +1,25 @@
> > +#if !defined _IMMINTRIN_H_INCLUDED
> > +#error "Never use directly; include
> > instead."
> > +#endif
> > +
> > +#ifndef _AMXBF16INTRIN_H_INCLUDED
> > +#define _AMXBF16INTRIN_H_INCLUDED
> > +
> > +#if !defined(__AMX_BF16__)
> > +#pragma GCC push_options
> > +#pragma GCC target("amx-bf16")
> > +#define __DISABLE_AMX_BF16__
> > +#endif /* __AMX_BF16__ */
> > +
> > +#if defined(__x86_64__) && defined(__AMX_BF16__)
> > +#define _tile_dpbf16ps(dst,src1,src2)
> > \
> > + __asm__ volatile\
> > + ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1",
> > %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
> > +#endif
>
> I hope in future we'll replace it with unspecs at least...
Currently we think it is redundant to add builtins with just const int
parameters, which are supposed to be replaced in the future.
>
> > diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> > index c9f7195d423..9389dc24948 100644
> > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> > index bca8c856dc8..a46e31f5862 100644
> > --- a/gcc/doc/invoke.texi
> > +++ b/gcc/doc/invoke.texi
> > @@ -1357,6 +1357,7 @@ See RS/6000 and PowerPC Options.
> > -mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq
> > @gol
> > -mavx5124fmaps -mavx512vnni -mavx5124vnniw -mprfchw -mrdpid @gol
> > -mrdseed -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol
> > +-mamx-tile -mamx-int8 -mamx-bf16@gol
>
> Add space please.
Changed.
>
> > diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-2.c
> > b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-2.c
> > new file mode 100644
> > index 000..605a44df3f8
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-2.c
> > @@ -0,0 +1,4 @@
> > +/* { dg-do assemble { target { ! ia32 } } } */
> > +/* { dg-options "-O2 -mamx-bf16 -masm=intel" } */
> > +/* { dg-require-effective-target amx_bf16 } */
> > +#include"amxbf16-asmintel-1.c"
>
> I didn't get it. We ususally use second tescase to actually execute
> it and (well, a little) verify that semantics is ok. E.g. that
> operands order is correct. Could you please do that?
> This applies to all *-2.c cases.
> I've checked and looks like public SDE simulator supports AMX.
>
Added runtime test. Tested and passed under SDE.
Also, we adjust the intrinsic call to accept macro parameters.
Updated patch.
> --
> K
> Hello,
>
> On 03 сен 08:17, H.J. Lu wrote:
> > On Thu, Sep 3, 2020 at 8:08 AM Kirill Yukhin via Gcc-patches
> > wrote:
> > >
> > > Hello,
> > >
> > > On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote:
> > > > Hi:
> > > >
> > > > This patch is about to support Intel Advanced Matrix Extensions (AMX)
> > > > which will be enabled in GLC.
> > > >
> > > > AMX is a new 64-bit programming paradigm consisting of two
> > > > compo nents: a set of 2-dimensional registers (tiles) representing
> > > > sub-arrays from a larger 2-dimensional memory image,
> > > > and an accelerator able to operate on tiles
> > > >
> > > > Supported instructions are
> > > >
> > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease
> > > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud
> > > > AMX-BF16:tdpbf16ps
> > > >
> > > > The intrinsics adopts constant tile register number as its input
> > > > parameters.
> > > >
> > > > For detailed information, please refer to
> > > > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> > > >
> > > > Bootstrap ok, regression test on
Re: [PATCH] Enable GCC support for AMX
Hello,
On 03 сен 08:17, H.J. Lu wrote:
> On Thu, Sep 3, 2020 at 8:08 AM Kirill Yukhin via Gcc-patches
> wrote:
> >
> > Hello,
> >
> > On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote:
> > > Hi:
> > >
> > > This patch is about to support Intel Advanced Matrix Extensions (AMX)
> > > which will be enabled in GLC.
> > >
> > > AMX is a new 64-bit programming paradigm consisting of two
> > > compo nents: a set of 2-dimensional registers (tiles) representing
> > > sub-arrays from a larger 2-dimensional memory image,
> > > and an accelerator able to operate on tiles
> > >
> > > Supported instructions are
> > >
> > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease
> > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud
> > > AMX-BF16:tdpbf16ps
> > >
> > > The intrinsics adopts constant tile register number as its input
> > > parameters.
> > >
> > > For detailed information, please refer to
> > > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> > >
> > > Bootstrap ok, regression test on i386/x86 backend is ok.
> > >
> > > OK for master?
> >
> > I was trying to apply your patch to recent master and got
> > compilation error:
> >
> > g++ -std=gnu++11 -fno-PIE -c -g -O2 -DIN_GCC -fno-exceptions
> > -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowi
> > ng -Wwrite-strings -Wcast-qual -Wmissing-format-attribute
> > -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wn
> > o-overlength-strings -fno-common -DHAVE_CONFIG_H -I. -I.
> > -I/export/kyukhin/gcc/src/gcc -I/export/kyukhin/gcc/src/gcc/. -I/expor
> > t/kyukhin/gcc/src/gcc/../include
> > -I/export/kyukhin/gcc/src/gcc/../libcpp/include
> > -I/export/kyukhin/gcc/src/gcc/../libdecnumber
> > -I/export/kyukhin/gcc/src/gcc/../libdecnumber/bid -I../libdecnumber
> > -I/export/kyukhin/gcc/src/gcc/../libbacktrace -o i386-opti
> > ons.o -MT i386-options.o -MMD -MP -MF ./.deps/i386-options.TPo
> > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c
> > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c: In function ‘bool
> > ix86_option_override_internal(bool, gcc_options*, gcc_
> > options*)’:
> > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2263:41: error:
> > ‘PTA_AMX_TILE’ was not declared in this scope
> > if (((processor_alias_table[i].flags & PTA_AMX_TILE) != 0)
> > ^
> > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2267:41: error:
> > ‘PTA_AMX_INT8’ was not declared in this scope
> > if (((processor_alias_table[i].flags & PTA_AMX_INT8) != 0)
> > ^
> > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2271:41: error:
> > ‘PTA_AMX_BF16’ was not declared in this scope
> > if (((processor_alias_table[i].flags & PTA_AMX_BF16) != 0)
> >
> > Could you please fix that?
>
> Here is the rebased patch against
>
> commit 3c219134152f645103f2fcd50735b177ccd76cde
> Author: Jonathan Wakely
> Date: Thu Sep 3 12:38:50 2020 +0100
>
> libstdc++: Optimise GCD algorithms
>
> Thanks.
>
> --
> H.J.
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index 797f0ad5edd..d0e59e86a5c 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -412,7 +412,7 @@ i[34567]86-*-*)
> waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h
> avx512bf16intrin.h enqcmdintrin.h serializeintrin.h
> avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
> -tsxldtrkintrin.h"
> +tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h
> amxbf16intrin.h"
Line more than 80 chars.
> ;;
> x86_64-*-*)
> cpu_type=i386
> @@ -447,7 +447,7 @@ x86_64-*-*)
> waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h
> avx512bf16intrin.h enqcmdintrin.h serializeintrin.h
> avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
> -tsxldtrkintrin.h"
> +tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h
> amxbf16intrin.h"
Ditto.
> diff --git a/gcc/config/i386/amxbf16intrin.h b/gcc/config/i386/amxbf16intrin.h
> new file mode 100644
> index 000..df0e2262d50
> --- /dev/null
> +++ b/gcc/config/i386/amxbf16intrin.h
> @@ -0,0 +1,25 @@
> +#if !defined _IMMINTRIN_H_INCLUDED
> +#error "Never use directly; include instead."
> +#endif
> +
> +#ifndef _AMXBF16INTRIN_H_INCLUDED
> +#define _AMXBF16INTRIN_H_INCLUDED
> +
> +#if !defined(__AMX_BF16__)
> +#pragma GCC push_options
> +#pragma GCC target("amx-bf16")
> +#define __DISABLE_AMX_BF16__
> +#endif /* __AMX_BF16__ */
> +
> +#if defined(__x86_64__) && defined(__AMX_BF16__)
> +#define _tile_dpbf16ps(dst,src1,src2)
> \
> + __asm__ volatile\
> + ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1",
> %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}"
Re: [PATCH] Enable GCC support for AMX
On Thu, Sep 3, 2020 at 8:08 AM Kirill Yukhin via Gcc-patches wrote: > > Hello, > > On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote: > > Hi: > > > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > > which will be enabled in GLC. > > > > AMX is a new 64-bit programming paradigm consisting of two > > compo nents: a set of 2-dimensional registers (tiles) representing > > sub-arrays from a larger 2-dimensional memory image, > > and an accelerator able to operate on tiles > > > > Supported instructions are > > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > > AMX-BF16:tdpbf16ps > > > > The intrinsics adopts constant tile register number as its input parameters. > > > > For detailed information, please refer to > > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf > > > > Bootstrap ok, regression test on i386/x86 backend is ok. > > > > OK for master? > > I was trying to apply your patch to recent master and got > compilation error: > > g++ -std=gnu++11 -fno-PIE -c -g -O2 -DIN_GCC -fno-exceptions -fno-rtti > -fasynchronous-unwind-tables -W -Wall -Wno-narrowi > ng -Wwrite-strings -Wcast-qual -Wmissing-format-attribute > -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wn > o-overlength-strings -fno-common -DHAVE_CONFIG_H -I. -I. > -I/export/kyukhin/gcc/src/gcc -I/export/kyukhin/gcc/src/gcc/. -I/expor > t/kyukhin/gcc/src/gcc/../include > -I/export/kyukhin/gcc/src/gcc/../libcpp/include > -I/export/kyukhin/gcc/src/gcc/../libdecnumber > -I/export/kyukhin/gcc/src/gcc/../libdecnumber/bid -I../libdecnumber > -I/export/kyukhin/gcc/src/gcc/../libbacktrace -o i386-opti > ons.o -MT i386-options.o -MMD -MP -MF ./.deps/i386-options.TPo > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c: In function ‘bool > ix86_option_override_internal(bool, gcc_options*, gcc_ > options*)’: > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2263:41: error: > ‘PTA_AMX_TILE’ was not declared in this scope > if (((processor_alias_table[i].flags & PTA_AMX_TILE) != 0) > ^ > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2267:41: error: > ‘PTA_AMX_INT8’ was not declared in this scope > if (((processor_alias_table[i].flags & PTA_AMX_INT8) != 0) > ^ > /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2271:41: error: > ‘PTA_AMX_BF16’ was not declared in this scope > if (((processor_alias_table[i].flags & PTA_AMX_BF16) != 0) > > Could you please fix that? Here is the rebased patch against commit 3c219134152f645103f2fcd50735b177ccd76cde Author: Jonathan Wakely Date: Thu Sep 3 12:38:50 2020 +0100 libstdc++: Optimise GCD algorithms Thanks. -- H.J. From 713cafb77a16331620af3eb2c2384a7c388ecd90 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Thu, 25 Jul 2019 16:49:36 +0800 Subject: [PATCH] Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16. AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud AMX-BF16:tdpbf16ps gcc/ChangeLog * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): New marcos. (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. * common/config/i386/cpuinfo.h (XSTATE_TILECFG, XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. (get_available_features): Enable AMX features only if their states are suoorited by OSXSAVE. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-tile, amx-int8, amx-bf16. * config.gcc: Add amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h to extra headers. * config/i386/amxbf16intrin.h: New file. * config/i386/amxint8intrin.h: Ditto. * config/i386/amxtileintrin.h: Ditto. * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): New macro. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AMX_TILE__, __AMX_INT8__, AMX_BF16__. * config/i386/i386-options.c (ix86_target_string): Add -mamx-tile, -mamx-int8, -mamx-bf16. (ix86_option_override_internal): Handle AMX-TILE, AMX-INT8, AMX-BF16. * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16):
Re: [PATCH] Enable GCC support for AMX
Hello, On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote: > Hi: > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > which will be enabled in GLC. > > AMX is a new 64-bit programming paradigm consisting of two > compo nents: a set of 2-dimensional registers (tiles) representing > sub-arrays from a larger 2-dimensional memory image, > and an accelerator able to operate on tiles > > Supported instructions are > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > AMX-BF16:tdpbf16ps > > The intrinsics adopts constant tile register number as its input parameters. > > For detailed information, please refer to > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf > > Bootstrap ok, regression test on i386/x86 backend is ok. > > OK for master? I was trying to apply your patch to recent master and got compilation error: g++ -std=gnu++11 -fno-PIE -c -g -O2 -DIN_GCC -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowi ng -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wn o-overlength-strings -fno-common -DHAVE_CONFIG_H -I. -I. -I/export/kyukhin/gcc/src/gcc -I/export/kyukhin/gcc/src/gcc/. -I/expor t/kyukhin/gcc/src/gcc/../include -I/export/kyukhin/gcc/src/gcc/../libcpp/include -I/export/kyukhin/gcc/src/gcc/../libdecnumber -I/export/kyukhin/gcc/src/gcc/../libdecnumber/bid -I../libdecnumber -I/export/kyukhin/gcc/src/gcc/../libbacktrace -o i386-opti ons.o -MT i386-options.o -MMD -MP -MF ./.deps/i386-options.TPo /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c: In function ‘bool ix86_option_override_internal(bool, gcc_options*, gcc_ options*)’: /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2263:41: error: ‘PTA_AMX_TILE’ was not declared in this scope if (((processor_alias_table[i].flags & PTA_AMX_TILE) != 0) ^ /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2267:41: error: ‘PTA_AMX_INT8’ was not declared in this scope if (((processor_alias_table[i].flags & PTA_AMX_INT8) != 0) ^ /export/kyukhin/gcc/src/gcc/config/i386/i386-options.c:2271:41: error: ‘PTA_AMX_BF16’ was not declared in this scope if (((processor_alias_table[i].flags & PTA_AMX_BF16) != 0) Could you please fix that? -- K PS: Please excuse me for late response.
Re: [PATCH] Enable GCC support for AMX
PING^3 Hongyu Wang 于2020年8月4日周二 下午11:40写道： > > Kirill Yukhin 于2020年8月4日周二 下午10:47写道： > > > > Hello, > > > > On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote: > > > Hi: > > > > > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > > > which will be enabled in GLC. > > > > > > AMX is a new 64-bit programming paradigm consisting of two > > > compo nents: a set of 2-dimensional registers (tiles) representing > > > sub-arrays from a larger 2-dimensional memory image, > > > and an accelerator able to operate on tiles > > > > > > Supported instructions are > > > > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > > > AMX-BF16:tdpbf16ps > > > > > > The intrinsics adopts constant tile register number as its input > > > parameters. > > > > I didn't go into the patch deeply, but why did you use inline asm for > > intrinsics > > definition? Are you going to introduce register classes for thouse new tmm > > registers and new instruction definitions for new insns in machine > > description? > > In this version of patch, we just align our implementation to what > have been submitted > to llvm community. Since AMX allows variant register size in runtime > configuration, > the implementation of register allocation is still under discussion. > We will introduce > new register class and new insns in the future patch. > > > > > -- > > K
Re: [PATCH] Enable GCC support for AMX
Kirill Yukhin 于2020年8月4日周二 下午10:47写道： > > Hello, > > On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote: > > Hi: > > > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > > which will be enabled in GLC. > > > > AMX is a new 64-bit programming paradigm consisting of two > > compo nents: a set of 2-dimensional registers (tiles) representing > > sub-arrays from a larger 2-dimensional memory image, > > and an accelerator able to operate on tiles > > > > Supported instructions are > > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > > AMX-BF16:tdpbf16ps > > > > The intrinsics adopts constant tile register number as its input parameters. > > I didn't go into the patch deeply, but why did you use inline asm for > intrinsics > definition? Are you going to introduce register classes for thouse new tmm > registers and new instruction definitions for new insns in machine > description? In this version of patch, we just align our implementation to what have been submitted to llvm community. Since AMX allows variant register size in runtime configuration, the implementation of register allocation is still under discussion. We will introduce new register class and new insns in the future patch. > > -- > K
Re: [PATCH] Enable GCC support for AMX
Hello, On 06 июл 09:58, Hongyu Wang via Gcc-patches wrote: > Hi: > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > which will be enabled in GLC. > > AMX is a new 64-bit programming paradigm consisting of two > compo nents: a set of 2-dimensional registers (tiles) representing > sub-arrays from a larger 2-dimensional memory image, > and an accelerator able to operate on tiles > > Supported instructions are > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > AMX-BF16:tdpbf16ps > > The intrinsics adopts constant tile register number as its input parameters. I didn't go into the patch deeply, but why did you use inline asm for intrinsics definition? Are you going to introduce register classes for thouse new tmm registers and new instruction definitions for new insns in machine description? -- K
Re: [PATCH] Enable GCC support for AMX
PING^3 Hongyu Wang 于2020年7月24日周五 下午1:41写道： > > PING^2 > > Hongyu Wang 于2020年7月17日周五 下午1:40写道： > > > > Update for SAPPHIRERAPIDS and PING > > > > Hongyu Wang 于2020年7月7日周二 上午11:24写道： > > > > > > > > Hi Kirill, could you help review this patch? > > > > > > Hongyu Wang 于2020年7月6日周一 上午9:58写道： > > > > > > > > Hi: > > > > > > > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > > > > which will be enabled in GLC. > > > > > > > > AMX is a new 64-bit programming paradigm consisting of two > > > > compo nents: a set of 2-dimensional registers (tiles) representing > > > > sub-arrays from a larger 2-dimensional memory image, > > > > and an accelerator able to operate on tiles > > > > > > > > Supported instructions are > > > > > > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > > > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > > > > AMX-BF16:tdpbf16ps > > > > > > > > The intrinsics adopts constant tile register number as its input > > > > parameters. > > > > > > > > For detailed information, please refer to > > > > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf > > > > > > > > Bootstrap ok, regression test on i386/x86 backend is ok. > > > > > > > > OK for master? > > > > > > > > gcc/ChangeLog > > > > > > > > * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, > > > > OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, > > > > OPTION_MASK_ISA2_AMX_TILE_UNSET, > > > > OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): > > > > New marcos. > > > > (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. > > > > * common/config/i386/i386-cpuinfo.h (processor_types): Add > > > > FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. > > > > * common/config/i386/cpuinfo.h (XSTATE_TILECFG, > > > > XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. > > > > (get_available_features): Enable AMX features only if > > > > their states are suoorited by OSXSAVE. > > > > * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY > > > > for amx-tile, amx-int8, amx-bf16. > > > > * config.gcc: Add amxtileintrin.h, amxint8intrin.h, > > > > amxbf16intrin.h to extra headers. > > > > * config/i386/amxbf16intrin.h: New file. > > > > * config/i386/amxint8intrin.h: Ditto. > > > > * config/i386/amxtileintrin.h: Ditto. > > > > * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): > > > > New macro. > > > > * config/i386/i386-c.c (ix86_target_macros_internal): Define > > > > __AMX_TILE__, __AMX_INT8__, AMX_BF16__. > > > > * config/i386/i386-options.c (ix86_target_string): Add > > > > -mamx-tile, -mamx-int8, -mamx-bf16. > > > > (ix86_option_override_internal): Handle AMX-TILE, > > > > AMX-INT8, AMX-BF16. > > > > * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, > > > > TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, > > > > PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. > > > > * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. > > > > * config/i386/immintrin.h: Include amxtileintrin.h, > > > > amxint8intrin.h, amxbf16intrin.h. > > > > * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. > > > > * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. > > > > * doc/sourcebuild.texi ((Effective-Target Keywords, Other > > > > hardware attributes): Document amx_int8, amx_tile, amx_bf16. > > > > > > > > gcc/testsuite/ChangeLog > > > > > > > > * lib/target-supports.exp (check_effective_target_amx_tile, > > > > check_effective_target_amx_int8, > > > > check_effective_target_amx_bf16): New proc. > > > > * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. > > > > * g++.dg/other/i386-3.C: Ditto. > > > > * gcc.target/i386/sse-12.c: Ditto. > > > > * gcc.target/i386/sse-13.c: Ditto. > > > > * gcc.target/i386/sse-14.c: Ditto. > > > > * gcc.target/i386/sse-22.c: Ditto. > > > > * gcc.target/i386/sse-23.c: Ditto. > > > > * gcc.target/i386/funcspec-56.inc: Add new target attribute. > > > > * gcc.target/i386/amxbf16-asmatt-1.c: New test. > > > > * gcc.target/i386/amxint8-asmatt-1.c: Ditto. > > > > * gcc.target/i386/amxtile-asmatt-1.c: Ditto. > > > > * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. > > > > * gcc.target/i386/amxint8-asmintel-1.c: Ditto. > > > > * gcc.target/i386/amxtile-asmintel-1.c: Ditto. > > > > * gcc.target/i386/amxbf16-asmatt-2.c: Ditto. > > > > * gcc.target/i386/amxint8-asmatt-2.c: Ditto. > > > > * gcc.target/i386/amxtile-asmatt-2.c: Ditto. > > > > * gcc.target/i386/amxbf16-asmintel-2.c: Ditto. > > > > * gcc.target/i386/amxint8-asmintel-2.c: Ditto. > > > > * gcc.target/i386/amxtile-asmintel-2.c: Ditto.
Re: [PATCH] Enable GCC support for AMX
PING^2 Hongyu Wang 于2020年7月17日周五 下午1:40写道： > > Update for SAPPHIRERAPIDS and PING > > Hongyu Wang 于2020年7月7日周二 上午11:24写道： > > > > > Hi Kirill, could you help review this patch? > > > > Hongyu Wang 于2020年7月6日周一 上午9:58写道： > > > > > > Hi: > > > > > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > > > which will be enabled in GLC. > > > > > > AMX is a new 64-bit programming paradigm consisting of two > > > compo nents: a set of 2-dimensional registers (tiles) representing > > > sub-arrays from a larger 2-dimensional memory image, > > > and an accelerator able to operate on tiles > > > > > > Supported instructions are > > > > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > > > AMX-BF16:tdpbf16ps > > > > > > The intrinsics adopts constant tile register number as its input > > > parameters. > > > > > > For detailed information, please refer to > > > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf > > > > > > Bootstrap ok, regression test on i386/x86 backend is ok. > > > > > > OK for master? > > > > > > gcc/ChangeLog > > > > > > * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, > > > OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, > > > OPTION_MASK_ISA2_AMX_TILE_UNSET, > > > OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): > > > New marcos. > > > (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. > > > * common/config/i386/i386-cpuinfo.h (processor_types): Add > > > FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. > > > * common/config/i386/cpuinfo.h (XSTATE_TILECFG, > > > XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. > > > (get_available_features): Enable AMX features only if > > > their states are suoorited by OSXSAVE. > > > * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY > > > for amx-tile, amx-int8, amx-bf16. > > > * config.gcc: Add amxtileintrin.h, amxint8intrin.h, > > > amxbf16intrin.h to extra headers. > > > * config/i386/amxbf16intrin.h: New file. > > > * config/i386/amxint8intrin.h: Ditto. > > > * config/i386/amxtileintrin.h: Ditto. > > > * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): > > > New macro. > > > * config/i386/i386-c.c (ix86_target_macros_internal): Define > > > __AMX_TILE__, __AMX_INT8__, AMX_BF16__. > > > * config/i386/i386-options.c (ix86_target_string): Add > > > -mamx-tile, -mamx-int8, -mamx-bf16. > > > (ix86_option_override_internal): Handle AMX-TILE, > > > AMX-INT8, AMX-BF16. > > > * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, > > > TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, > > > PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. > > > * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. > > > * config/i386/immintrin.h: Include amxtileintrin.h, > > > amxint8intrin.h, amxbf16intrin.h. > > > * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. > > > * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. > > > * doc/sourcebuild.texi ((Effective-Target Keywords, Other > > > hardware attributes): Document amx_int8, amx_tile, amx_bf16. > > > > > > gcc/testsuite/ChangeLog > > > > > > * lib/target-supports.exp (check_effective_target_amx_tile, > > > check_effective_target_amx_int8, > > > check_effective_target_amx_bf16): New proc. > > > * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. > > > * g++.dg/other/i386-3.C: Ditto. > > > * gcc.target/i386/sse-12.c: Ditto. > > > * gcc.target/i386/sse-13.c: Ditto. > > > * gcc.target/i386/sse-14.c: Ditto. > > > * gcc.target/i386/sse-22.c: Ditto. > > > * gcc.target/i386/sse-23.c: Ditto. > > > * gcc.target/i386/funcspec-56.inc: Add new target attribute. > > > * gcc.target/i386/amxbf16-asmatt-1.c: New test. > > > * gcc.target/i386/amxint8-asmatt-1.c: Ditto. > > > * gcc.target/i386/amxtile-asmatt-1.c: Ditto. > > > * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. > > > * gcc.target/i386/amxint8-asmintel-1.c: Ditto. > > > * gcc.target/i386/amxtile-asmintel-1.c: Ditto. > > > * gcc.target/i386/amxbf16-asmatt-2.c: Ditto. > > > * gcc.target/i386/amxint8-asmatt-2.c: Ditto. > > > * gcc.target/i386/amxtile-asmatt-2.c: Ditto. > > > * gcc.target/i386/amxbf16-asmintel-2.c: Ditto. > > > * gcc.target/i386/amxint8-asmintel-2.c: Ditto. > > > * gcc.target/i386/amxtile-asmintel-2.c: Ditto.
Re: [PATCH] Enable GCC support for AMX
Update for SAPPHIRERAPIDS and PING Hongyu Wang 于2020年7月7日周二 上午11:24写道： > > Hi Kirill, could you help review this patch? > > Hongyu Wang 于2020年7月6日周一 上午9:58写道： > > > > Hi: > > > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > > which will be enabled in GLC. > > > > AMX is a new 64-bit programming paradigm consisting of two > > compo nents: a set of 2-dimensional registers (tiles) representing > > sub-arrays from a larger 2-dimensional memory image, > > and an accelerator able to operate on tiles > > > > Supported instructions are > > > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > > AMX-BF16:tdpbf16ps > > > > The intrinsics adopts constant tile register number as its input parameters. > > > > For detailed information, please refer to > > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf > > > > Bootstrap ok, regression test on i386/x86 backend is ok. > > > > OK for master? > > > > gcc/ChangeLog > > > > * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, > > OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, > > OPTION_MASK_ISA2_AMX_TILE_UNSET, > > OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): > > New marcos. > > (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. > > * common/config/i386/i386-cpuinfo.h (processor_types): Add > > FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. > > * common/config/i386/cpuinfo.h (XSTATE_TILECFG, > > XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. > > (get_available_features): Enable AMX features only if > > their states are suoorited by OSXSAVE. > > * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY > > for amx-tile, amx-int8, amx-bf16. > > * config.gcc: Add amxtileintrin.h, amxint8intrin.h, > > amxbf16intrin.h to extra headers. > > * config/i386/amxbf16intrin.h: New file. > > * config/i386/amxint8intrin.h: Ditto. > > * config/i386/amxtileintrin.h: Ditto. > > * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): > > New macro. > > * config/i386/i386-c.c (ix86_target_macros_internal): Define > > __AMX_TILE__, __AMX_INT8__, AMX_BF16__. > > * config/i386/i386-options.c (ix86_target_string): Add > > -mamx-tile, -mamx-int8, -mamx-bf16. > > (ix86_option_override_internal): Handle AMX-TILE, > > AMX-INT8, AMX-BF16. > > * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, > > TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, > > PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. > > * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. > > * config/i386/immintrin.h: Include amxtileintrin.h, > > amxint8intrin.h, amxbf16intrin.h. > > * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. > > * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. > > * doc/sourcebuild.texi ((Effective-Target Keywords, Other > > hardware attributes): Document amx_int8, amx_tile, amx_bf16. > > > > gcc/testsuite/ChangeLog > > > > * lib/target-supports.exp (check_effective_target_amx_tile, > > check_effective_target_amx_int8, > > check_effective_target_amx_bf16): New proc. > > * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. > > * g++.dg/other/i386-3.C: Ditto. > > * gcc.target/i386/sse-12.c: Ditto. > > * gcc.target/i386/sse-13.c: Ditto. > > * gcc.target/i386/sse-14.c: Ditto. > > * gcc.target/i386/sse-22.c: Ditto. > > * gcc.target/i386/sse-23.c: Ditto. > > * gcc.target/i386/funcspec-56.inc: Add new target attribute. > > * gcc.target/i386/amxbf16-asmatt-1.c: New test. > > * gcc.target/i386/amxint8-asmatt-1.c: Ditto. > > * gcc.target/i386/amxtile-asmatt-1.c: Ditto. > > * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. > > * gcc.target/i386/amxint8-asmintel-1.c: Ditto. > > * gcc.target/i386/amxtile-asmintel-1.c: Ditto. > > * gcc.target/i386/amxbf16-asmatt-2.c: Ditto. > > * gcc.target/i386/amxint8-asmatt-2.c: Ditto. > > * gcc.target/i386/amxtile-asmatt-2.c: Ditto. > > * gcc.target/i386/amxbf16-asmintel-2.c: Ditto. > > * gcc.target/i386/amxint8-asmintel-2.c: Ditto. > > * gcc.target/i386/amxtile-as
Re: [PATCH] Enable GCC support for AMX
Hi Kirill, could you help review this patch? Hongyu Wang 于2020年7月6日周一 上午9:58写道： > > Hi: > > This patch is about to support Intel Advanced Matrix Extensions (AMX) > which will be enabled in GLC. > > AMX is a new 64-bit programming paradigm consisting of two > compo nents: a set of 2-dimensional registers (tiles) representing > sub-arrays from a larger 2-dimensional memory image, > and an accelerator able to operate on tiles > > Supported instructions are > > AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease > AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud > AMX-BF16:tdpbf16ps > > The intrinsics adopts constant tile register number as its input parameters. > > For detailed information, please refer to > https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf > > Bootstrap ok, regression test on i386/x86 backend is ok. > > OK for master? > > gcc/ChangeLog > > * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, > OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, > OPTION_MASK_ISA2_AMX_TILE_UNSET, > OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): > New marcos. > (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. > * common/config/i386/i386-cpuinfo.h (processor_types): Add > FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. > * common/config/i386/cpuinfo.h (XSTATE_TILECFG, > XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. > (get_available_features): Enable AMX features only if > their states are suoorited by OSXSAVE. > * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY > for amx-tile, amx-int8, amx-bf16. > * config.gcc: Add amxtileintrin.h, amxint8intrin.h, > amxbf16intrin.h to extra headers. > * config/i386/amxbf16intrin.h: New file. > * config/i386/amxint8intrin.h: Ditto. > * config/i386/amxtileintrin.h: Ditto. > * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): > New macro. > * config/i386/i386-c.c (ix86_target_macros_internal): Define > __AMX_TILE__, __AMX_INT8__, AMX_BF16__. > * config/i386/i386-options.c (ix86_target_string): Add > -mamx-tile, -mamx-int8, -mamx-bf16. > (ix86_option_override_internal): Handle AMX-TILE, > AMX-INT8, AMX-BF16. > * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, > TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, > PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. > * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. > * config/i386/immintrin.h: Include amxtileintrin.h, > amxint8intrin.h, amxbf16intrin.h. > * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. > * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. > * doc/sourcebuild.texi ((Effective-Target Keywords, Other > hardware attributes): Document amx_int8, amx_tile, amx_bf16. > > gcc/testsuite/ChangeLog > > * lib/target-supports.exp (check_effective_target_amx_tile, > check_effective_target_amx_int8, > check_effective_target_amx_bf16): New proc. > * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. > * g++.dg/other/i386-3.C: Ditto. > * gcc.target/i386/sse-12.c: Ditto. > * gcc.target/i386/sse-13.c: Ditto. > * gcc.target/i386/sse-14.c: Ditto. > * gcc.target/i386/sse-22.c: Ditto. > * gcc.target/i386/sse-23.c: Ditto. > * gcc.target/i386/funcspec-56.inc: Add new target attribute. > * gcc.target/i386/amxbf16-asmatt-1.c: New test. > * gcc.target/i386/amxint8-asmatt-1.c: Ditto. > * gcc.target/i386/amxtile-asmatt-1.c: Ditto. > * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. > * gcc.target/i386/amxint8-asmintel-1.c: Ditto. > * gcc.target/i386/amxtile-asmintel-1.c: Ditto. > * gcc.target/i386/amxbf16-asmatt-2.c: Ditto. > * gcc.target/i386/amxint8-asmatt-2.c: Ditto. > * gcc.target/i386/amxtile-asmatt-2.c: Ditto. > * gcc.target/i386/amxbf16-asmintel-2.c: Ditto. > * gcc.target/i386/amxint8-asmintel-2.c: Ditto. > * gcc.target/i386/amxtile-asmintel-2.c: Ditto.
[PATCH] Enable GCC support for AMX
Hi: This patch is about to support Intel Advanced Matrix Extensions (AMX) which will be enabled in GLC. AMX is a new 64-bit programming paradigm consisting of two compo nents: a set of 2-dimensional registers (tiles) representing sub-arrays from a larger 2-dimensional memory image, and an accelerator able to operate on tiles Supported instructions are AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud AMX-BF16:tdpbf16ps The intrinsics adopts constant tile register number as its input parameters. For detailed information, please refer to https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf Bootstrap ok, regression test on i386/x86 backend is ok. OK for master? gcc/ChangeLog * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): New marcos. (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. * common/config/i386/cpuinfo.h (XSTATE_TILECFG, XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. (get_available_features): Enable AMX features only if their states are suoorited by OSXSAVE. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-tile, amx-int8, amx-bf16. * config.gcc: Add amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h to extra headers. * config/i386/amxbf16intrin.h: New file. * config/i386/amxint8intrin.h: Ditto. * config/i386/amxtileintrin.h: Ditto. * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): New macro. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AMX_TILE__, __AMX_INT8__, AMX_BF16__. * config/i386/i386-options.c (ix86_target_string): Add -mamx-tile, -mamx-int8, -mamx-bf16. (ix86_option_override_internal): Handle AMX-TILE, AMX-INT8, AMX-BF16. * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. * config/i386/immintrin.h: Include amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h. * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. * doc/sourcebuild.texi ((Effective-Target Keywords, Other hardware attributes): Document amx_int8, amx_tile, amx_bf16. gcc/testsuite/ChangeLog * lib/target-supports.exp (check_effective_target_amx_tile, check_effective_target_amx_int8, check_effective_target_amx_bf16): New proc. * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/amxbf16-asmatt-1.c: New test. * gcc.target/i386/amxint8-asmatt-1.c: Ditto. * gcc.target/i386/amxtile-asmatt-1.c: Ditto. * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. * gcc.target/i386/amxint8-asmintel-1.c: Ditto. * gcc.target/i386/amxtile-asmintel-1.c: Ditto. * gcc.target/i386/amxbf16-asmatt-2.c: Ditto. * gcc.target/i386/amxint8-asmatt-2.c: Ditto. * gcc.target/i386/amxtile-asmatt-2.c: Ditto. * gcc.target/i386/amxbf16-asmintel-2.c: Ditto. * gcc.target/i386/amxint8-asmintel-2.c: Ditto. * gcc.target/i386/amxtile-asmintel-2.c: Ditto. From 88a81d93c9d896cf67869f450905c2ea2b08be74 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Thu, 25 Jul 2019 16:49:36 +0800 Subject: [PATCH] Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16. AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud AMX-BF16:tdpbf16ps gcc/ChangeLog * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET): New marcos. (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. * common/config/i386/cpuinfo.h (XSTATE_TILECFG, XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. (get_available_features): Enable AMX features only if their states are suoorited by OSXSAVE. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-tile, amx-int8, amx-bf16
