Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
This is built with --disable-werror, so it doesn't fail, but the warning is there: https://build.opensuse.org/package/live_build_log/devel:gcc:next/gcc14/openSUSE_Factory_RISCV/riscv64 -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1 "And now for something completely different."
RE: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
Sorry to bother, just tried below build for the RISC-V but failed to
reproduce...
../configure \
--target=riscv64-unknown-elf \
--prefix=${INSTALL_DIR} \
--disable-shared \
--enable-threads \
--enable-tls \
--enable-languages=c,c++ \
--with-system-zlib \
--with-newlib \
--disable-libmudflap \
--disable-libssp \
--disable-libquadmath \
--disable-libgomp \
--enable-nls \
--disable-tm-clone-registry \
--enable-multilib \
--src=`pwd`/../ \
--with-abi=lp64d \
--with-arch=rv64imafdcv \
--with-tune=rocket \
--with-isa-spec=20191213 \
--enable-bootstrap \
make -j $(nproc) all-gcc && make install-gcc
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Li, Pan2 via Gcc-patches
Sent: Friday, May 19, 2023 8:29 PM
To: Andreas Schwab ; juzhe.zh...@rivai.ai
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; kito.ch...@sifive.com;
pal...@dabbelt.com; pal...@rivosinc.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: RE: [PATCH] RISC-V: Add mode switching target hook to insert rounding
mode config for fixed-point instructions
Hi Andreas,
Could you please help to share more information about how to trigger this
error? As you don't mentioned, I assume below error comes from X86 build. I
take below configuration but failed to reproduce.
mkdir __BUILD_X86 && cd __BUILD_X86
../configure --enable-language=c,c++ --enable-bootstrap --disable-multilib
--prefix=`pwd`/../__INSTALL_X86
make -j $(nproc) && make install
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Andreas Schwab
Sent: Friday, May 19, 2023 6:41 PM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; kito.ch...@sifive.com;
pal...@dabbelt.com; pal...@rivosinc.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding
mode config for fixed-point instructions
In function 'int optimize_mode_switching()',
inlined from 'virtual unsigned int
{anonymous}::pass_mode_switching::execute(function*)' at
../../gcc/mode-switching.cc:909:31:
../../gcc/mode-switching.cc:608:29: error: 'bb_info$' may be used uninitialized
[-Werror=maybe-uninitialized]
608 | add_seginfo (info + bb->index, ptr);
| ^~~
../../gcc/mode-switching.cc: In member function 'virtual unsigned int
{anonymous}::pass_mode_switching::execute(function*)':
../../gcc/mode-switching.cc:503:19: note: 'bb_info$' was declared here
503 | struct bb_info *bb_info[N_ENTITIES];
| ^~~
cc1plus: all warnings being treated as errors
make[3]: *** [Makefile:1174: mode-switching.o] Error 1
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1 "And
now for something completely different."
RE: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
Hi Andreas,
Could you please help to share more information about how to trigger this
error? As you don't mentioned, I assume below error comes from X86 build. I
take below configuration but failed to reproduce.
mkdir __BUILD_X86 && cd __BUILD_X86
../configure --enable-language=c,c++ --enable-bootstrap --disable-multilib
--prefix=`pwd`/../__INSTALL_X86
make -j $(nproc) && make install
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Andreas Schwab
Sent: Friday, May 19, 2023 6:41 PM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; kito.ch...@sifive.com;
pal...@dabbelt.com; pal...@rivosinc.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding
mode config for fixed-point instructions
In function 'int optimize_mode_switching()',
inlined from 'virtual unsigned int
{anonymous}::pass_mode_switching::execute(function*)' at
../../gcc/mode-switching.cc:909:31:
../../gcc/mode-switching.cc:608:29: error: 'bb_info$' may be used uninitialized
[-Werror=maybe-uninitialized]
608 | add_seginfo (info + bb->index, ptr);
| ^~~
../../gcc/mode-switching.cc: In member function 'virtual unsigned int
{anonymous}::pass_mode_switching::execute(function*)':
../../gcc/mode-switching.cc:503:19: note: 'bb_info$' was declared here
503 | struct bb_info *bb_info[N_ENTITIES];
| ^~~
cc1plus: all warnings being treated as errors
make[3]: *** [Makefile:1174: mode-switching.o] Error 1
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1 "And
now for something completely different."
Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
In function 'int optimize_mode_switching()',
inlined from 'virtual unsigned int
{anonymous}::pass_mode_switching::execute(function*)' at
../../gcc/mode-switching.cc:909:31:
../../gcc/mode-switching.cc:608:29: error: 'bb_info$' may be used uninitialized
[-Werror=maybe-uninitialized]
608 | add_seginfo (info + bb->index, ptr);
| ^~~
../../gcc/mode-switching.cc: In member function 'virtual unsigned int
{anonymous}::pass_mode_switching::execute(function*)':
../../gcc/mode-switching.cc:503:19: note: 'bb_info$' was declared here
503 | struct bb_info *bb_info[N_ENTITIES];
| ^~~
cc1plus: all warnings being treated as errors
make[3]: *** [Makefile:1174: mode-switching.o] Error 1
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
RE: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
Committed, thanks kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Wednesday, May 17, 2023 6:06 PM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; pal...@dabbelt.com;
pal...@rivosinc.com; jeffreya...@gmail.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding
mode config for fixed-point instructions
LGTM, it's really awesome, I know it's kind of blocking due to enum stuff, so
feel free to commit this once it unblock :)
On Wed, May 17, 2023 at 5:58 PM wrote:
>
> From: Juzhe-Zhong
>
> Hi, this patch support the new coming fixed-point intrinsics:
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
>
> Insert fixed-point rounding mode configuration by mode switching target hook.
>
> Mode switching target hook is implemented applying LCM (Lazy code Motion).
>
> So the performance && correctness can be well trusted.
>
> Here is the example:
>
> void f (void * in, void *out, int32_t x, int n, int m) {
> for (int i = 0; i < n; i++) {
> vint32m1_t v = __riscv_vle32_v_i32m1 (in + i, 4);
> vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i, 4);
> vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
> v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
> __riscv_vse32_v_i32m1 (out + 100 + i, v3, 4);
> }
>
> for (int i = 0; i < n; i++) {
> vint32m1_t v = __riscv_vle32_v_i32m1 (in + i + 1000, 4);
> vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i + 1000, 4);
> vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
> v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
> __riscv_vse32_v_i32m1 (out + 100 + i + 1000, v3, 4);
> }
> }
>
> ASM:
>
> ...
> csrwi vxrm,2
> vsetivlizero,4,e32,m1,tu,ma
> ...
> Loop 1
> ...
> Loop 2
>
> mode switching can global recognize both Loop 1 and Loop 2 are using
> RDN rounding mode and hoist such single "csrwi vxrm,2" to dominate
> both Loop 1 and Loop 2.
>
> Besides, I have add correctness check sanity tests in this patch too.
>
> Ok for trunk ?
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
> * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
> (riscv_mode_needed): Ditto.
> (riscv_mode_after): Ditto.
> (riscv_mode_entry): Ditto.
> (riscv_mode_exit): Ditto.
> (riscv_mode_priority): Ditto.
> (TARGET_MODE_EMIT): New target hook.
> (TARGET_MODE_NEEDED): Ditto.
> (TARGET_MODE_AFTER): Ditto.
> (TARGET_MODE_ENTRY): Ditto.
> (TARGET_MODE_EXIT): Ditto.
> (TARGET_MODE_PRIORITY): Ditto.
> * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
> (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
> * config/riscv/riscv.md: Add csrwvxrm.
> * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
> (vxrmsi): New pattern.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/vxrm-10.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-6.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-7.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-8.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-9.c: New test.
>
> ---
> gcc/config/riscv/riscv-opts.h | 8 ++
> gcc/config/riscv/riscv.cc | 104 ++
> gcc/config/riscv/riscv.h | 6 +-
> gcc/config/riscv/riscv.md | 3 +-
> gcc/config/riscv/vector.md| 29 +
> .../gcc.target/riscv/rvv/base/vxrm-10.c | 26 +
> .../gcc.target/riscv/rvv/base/vxrm-6.c| 15 +++
> .../gcc.target/riscv/rvv/base/vxrm-7.c| 16 +++
> .../gcc.target/riscv/rvv/base/vxrm-8.c| 18 +++
> .../gcc.target/riscv/rvv/base/vxrm-9.c| 26 +
> 10 files changed, 249 insertions(+), 2 deletions(-) create mode
> 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-10.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-6.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-7.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-8.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-9.c
>
> diff --git a/gcc/config/riscv/riscv-opts.h
> b/gcc/config/riscv/riscv-opts.h index 1b2e6de5e1b..2a16402265a 100644
> --- a/gcc/config/riscv/riscv-opts.h
> +++ b/gcc/config/riscv/riscv-opts.h
> @@ -91,6 +91,14 @@ enum riscv_multilib_select_kind {
>select_by_abi,
> };
>
> +/* ENTITIES in mode switchin
Re: Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
Hi, Kito. The intrinsic doc has updated fixed point enum.
This patch (You have LGTM) should be merged after this patch:
https://patchwork.sourceware.org/project/gcc/patch/20230517052521.405836-1-juzhe.zh...@rivai.ai/
Can you respond this patch ?
Thanks.
juzhe.zh...@rivai.ai
From: Kito Cheng
Date: 2023-05-17 18:05
To: juzhe.zhong
CC: gcc-patches; kito.cheng; palmer; palmer; jeffreyalaw; rdapp.gcc
Subject: Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding
mode config for fixed-point instructions
LGTM, it's really awesome, I know it's kind of blocking due to enum
stuff, so feel free to commit this once it unblock :)
On Wed, May 17, 2023 at 5:58 PM wrote:
>
> From: Juzhe-Zhong
>
> Hi, this patch support the new coming fixed-point intrinsics:
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
>
> Insert fixed-point rounding mode configuration by mode switching target hook.
>
> Mode switching target hook is implemented applying LCM (Lazy code Motion).
>
> So the performance && correctness can be well trusted.
>
> Here is the example:
>
> void f (void * in, void *out, int32_t x, int n, int m)
> {
> for (int i = 0; i < n; i++) {
> vint32m1_t v = __riscv_vle32_v_i32m1 (in + i, 4);
> vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i, 4);
> vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
> v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
> __riscv_vse32_v_i32m1 (out + 100 + i, v3, 4);
> }
>
> for (int i = 0; i < n; i++) {
> vint32m1_t v = __riscv_vle32_v_i32m1 (in + i + 1000, 4);
> vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i + 1000, 4);
> vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
> v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
> __riscv_vse32_v_i32m1 (out + 100 + i + 1000, v3, 4);
> }
> }
>
> ASM:
>
> ...
> csrwi vxrm,2
> vsetivlizero,4,e32,m1,tu,ma
> ...
> Loop 1
> ...
> Loop 2
>
> mode switching can global recognize both Loop 1 and Loop 2 are using RDN
> rounding mode and hoist such single "csrwi vxrm,2" to dominate both Loop 1
> and Loop 2.
>
> Besides, I have add correctness check sanity tests in this patch too.
>
> Ok for trunk ?
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
> * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
> (riscv_mode_needed): Ditto.
> (riscv_mode_after): Ditto.
> (riscv_mode_entry): Ditto.
> (riscv_mode_exit): Ditto.
> (riscv_mode_priority): Ditto.
> (TARGET_MODE_EMIT): New target hook.
> (TARGET_MODE_NEEDED): Ditto.
> (TARGET_MODE_AFTER): Ditto.
> (TARGET_MODE_ENTRY): Ditto.
> (TARGET_MODE_EXIT): Ditto.
> (TARGET_MODE_PRIORITY): Ditto.
> * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
> (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
> * config/riscv/riscv.md: Add csrwvxrm.
> * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
> (vxrmsi): New pattern.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/vxrm-10.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-6.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-7.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-8.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-9.c: New test.
>
> ---
> gcc/config/riscv/riscv-opts.h | 8 ++
> gcc/config/riscv/riscv.cc | 104 ++
> gcc/config/riscv/riscv.h | 6 +-
> gcc/config/riscv/riscv.md | 3 +-
> gcc/config/riscv/vector.md| 29 +
> .../gcc.target/riscv/rvv/base/vxrm-10.c | 26 +
> .../gcc.target/riscv/rvv/base/vxrm-6.c| 15 +++
> .../gcc.target/riscv/rvv/base/vxrm-7.c| 16 +++
> .../gcc.target/riscv/rvv/base/vxrm-8.c| 18 +++
> .../gcc.target/riscv/rvv/base/vxrm-9.c| 26 +
> 10 files changed, 249 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-10.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-6.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-7.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-8.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-9.c
>
> diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
> index 1b2e6de5e1b..2a16402265a 100644
> --- a/gcc/config/riscv/riscv-opts.h
> +++ b/gcc/config/riscv/riscv-opts.h
> @@ -91,6 +91,14 @@ enum riscv
Re: [PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
LGTM, it's really awesome, I know it's kind of blocking due to enum
stuff, so feel free to commit this once it unblock :)
On Wed, May 17, 2023 at 5:58 PM wrote:
>
> From: Juzhe-Zhong
>
> Hi, this patch support the new coming fixed-point intrinsics:
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
>
> Insert fixed-point rounding mode configuration by mode switching target hook.
>
> Mode switching target hook is implemented applying LCM (Lazy code Motion).
>
> So the performance && correctness can be well trusted.
>
> Here is the example:
>
> void f (void * in, void *out, int32_t x, int n, int m)
> {
> for (int i = 0; i < n; i++) {
> vint32m1_t v = __riscv_vle32_v_i32m1 (in + i, 4);
> vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i, 4);
> vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
> v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
> __riscv_vse32_v_i32m1 (out + 100 + i, v3, 4);
> }
>
> for (int i = 0; i < n; i++) {
> vint32m1_t v = __riscv_vle32_v_i32m1 (in + i + 1000, 4);
> vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i + 1000, 4);
> vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
> v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
> __riscv_vse32_v_i32m1 (out + 100 + i + 1000, v3, 4);
> }
> }
>
> ASM:
>
> ...
> csrwi vxrm,2
> vsetivlizero,4,e32,m1,tu,ma
> ...
> Loop 1
> ...
> Loop 2
>
> mode switching can global recognize both Loop 1 and Loop 2 are using RDN
> rounding mode and hoist such single "csrwi vxrm,2" to dominate both Loop 1
> and Loop 2.
>
> Besides, I have add correctness check sanity tests in this patch too.
>
> Ok for trunk ?
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
> * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
> (riscv_mode_needed): Ditto.
> (riscv_mode_after): Ditto.
> (riscv_mode_entry): Ditto.
> (riscv_mode_exit): Ditto.
> (riscv_mode_priority): Ditto.
> (TARGET_MODE_EMIT): New target hook.
> (TARGET_MODE_NEEDED): Ditto.
> (TARGET_MODE_AFTER): Ditto.
> (TARGET_MODE_ENTRY): Ditto.
> (TARGET_MODE_EXIT): Ditto.
> (TARGET_MODE_PRIORITY): Ditto.
> * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
> (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
> * config/riscv/riscv.md: Add csrwvxrm.
> * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
> (vxrmsi): New pattern.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/vxrm-10.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-6.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-7.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-8.c: New test.
> * gcc.target/riscv/rvv/base/vxrm-9.c: New test.
>
> ---
> gcc/config/riscv/riscv-opts.h | 8 ++
> gcc/config/riscv/riscv.cc | 104 ++
> gcc/config/riscv/riscv.h | 6 +-
> gcc/config/riscv/riscv.md | 3 +-
> gcc/config/riscv/vector.md| 29 +
> .../gcc.target/riscv/rvv/base/vxrm-10.c | 26 +
> .../gcc.target/riscv/rvv/base/vxrm-6.c| 15 +++
> .../gcc.target/riscv/rvv/base/vxrm-7.c| 16 +++
> .../gcc.target/riscv/rvv/base/vxrm-8.c| 18 +++
> .../gcc.target/riscv/rvv/base/vxrm-9.c| 26 +
> 10 files changed, 249 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-10.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-6.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-7.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-8.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-9.c
>
> diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
> index 1b2e6de5e1b..2a16402265a 100644
> --- a/gcc/config/riscv/riscv-opts.h
> +++ b/gcc/config/riscv/riscv-opts.h
> @@ -91,6 +91,14 @@ enum riscv_multilib_select_kind {
>select_by_abi,
> };
>
> +/* ENTITIES in mode switching. */
> +enum riscv_entity
> +{
> + RISCV_VXRM = 0,
> + RISCV_FRM,
> + MAX_RISCV_ENTITIES
> +};
> +
> #define MASK_ZICSR(1 << 0)
> #define MASK_ZIFENCEI (1 << 1)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index de5b87b1a87..0d1b83f4315 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -7513,6 +7513,95 @@ riscv_vectorize_preferred_vector_alignment (const_tree
> type)
>return TYPE_ALIGN (type);
> }
>
> +/* Implement Mode switching. */
> +
> +static void
> +riscv_emit_mode_set (int entity, int mode, int prev_mode,
> +HARD_REG_SET regs_live ATTRIBUTE_UNUSED)
> +{
> + switch (entity)
> +{
> +case RISCV_VXRM:
> + if (mode != VXRM_MODE_NONE && mode != prev_mode)
> +
[PATCH] RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions
From: Juzhe-Zhong
Hi, this patch support the new coming fixed-point intrinsics:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222
Insert fixed-point rounding mode configuration by mode switching target hook.
Mode switching target hook is implemented applying LCM (Lazy code Motion).
So the performance && correctness can be well trusted.
Here is the example:
void f (void * in, void *out, int32_t x, int n, int m)
{
for (int i = 0; i < n; i++) {
vint32m1_t v = __riscv_vle32_v_i32m1 (in + i, 4);
vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i, 4);
vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
__riscv_vse32_v_i32m1 (out + 100 + i, v3, 4);
}
for (int i = 0; i < n; i++) {
vint32m1_t v = __riscv_vle32_v_i32m1 (in + i + 1000, 4);
vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in + 100 + i + 1000, 4);
vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, VXRM_RDN, 4);
v3 = __riscv_vaadd_vx_i32m1 (v3, 3, VXRM_RDN, 4);
__riscv_vse32_v_i32m1 (out + 100 + i + 1000, v3, 4);
}
}
ASM:
...
csrwi vxrm,2
vsetivlizero,4,e32,m1,tu,ma
...
Loop 1
...
Loop 2
mode switching can global recognize both Loop 1 and Loop 2 are using RDN
rounding mode and hoist such single "csrwi vxrm,2" to dominate both Loop 1
and Loop 2.
Besides, I have add correctness check sanity tests in this patch too.
Ok for trunk ?
gcc/ChangeLog:
* config/riscv/riscv-opts.h (enum riscv_entity): New enum.
* config/riscv/riscv.cc (riscv_emit_mode_set): New function.
(riscv_mode_needed): Ditto.
(riscv_mode_after): Ditto.
(riscv_mode_entry): Ditto.
(riscv_mode_exit): Ditto.
(riscv_mode_priority): Ditto.
(TARGET_MODE_EMIT): New target hook.
(TARGET_MODE_NEEDED): Ditto.
(TARGET_MODE_AFTER): Ditto.
(TARGET_MODE_ENTRY): Ditto.
(TARGET_MODE_EXIT): Ditto.
(TARGET_MODE_PRIORITY): Ditto.
* config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
(NUM_MODES_FOR_MODE_SWITCHING): Ditto.
* config/riscv/riscv.md: Add csrwvxrm.
* config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
(vxrmsi): New pattern.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vxrm-10.c: New test.
* gcc.target/riscv/rvv/base/vxrm-6.c: New test.
* gcc.target/riscv/rvv/base/vxrm-7.c: New test.
* gcc.target/riscv/rvv/base/vxrm-8.c: New test.
* gcc.target/riscv/rvv/base/vxrm-9.c: New test.
---
gcc/config/riscv/riscv-opts.h | 8 ++
gcc/config/riscv/riscv.cc | 104 ++
gcc/config/riscv/riscv.h | 6 +-
gcc/config/riscv/riscv.md | 3 +-
gcc/config/riscv/vector.md| 29 +
.../gcc.target/riscv/rvv/base/vxrm-10.c | 26 +
.../gcc.target/riscv/rvv/base/vxrm-6.c| 15 +++
.../gcc.target/riscv/rvv/base/vxrm-7.c| 16 +++
.../gcc.target/riscv/rvv/base/vxrm-8.c| 18 +++
.../gcc.target/riscv/rvv/base/vxrm-9.c| 26 +
10 files changed, 249 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-10.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-9.c
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 1b2e6de5e1b..2a16402265a 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -91,6 +91,14 @@ enum riscv_multilib_select_kind {
select_by_abi,
};
+/* ENTITIES in mode switching. */
+enum riscv_entity
+{
+ RISCV_VXRM = 0,
+ RISCV_FRM,
+ MAX_RISCV_ENTITIES
+};
+
#define MASK_ZICSR(1 << 0)
#define MASK_ZIFENCEI (1 << 1)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index de5b87b1a87..0d1b83f4315 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -7513,6 +7513,95 @@ riscv_vectorize_preferred_vector_alignment (const_tree
type)
return TYPE_ALIGN (type);
}
+/* Implement Mode switching. */
+
+static void
+riscv_emit_mode_set (int entity, int mode, int prev_mode,
+HARD_REG_SET regs_live ATTRIBUTE_UNUSED)
+{
+ switch (entity)
+{
+case RISCV_VXRM:
+ if (mode != VXRM_MODE_NONE && mode != prev_mode)
+ emit_insn (gen_vxrmsi (gen_int_mode (mode, SImode)));
+ break;
+default:
+ gcc_unreachable ();
+}
+}
+
+/* Return mode that entity must be switched into
+ prior to the execution of insn. */
+
+static int
+riscv_mode_needed (int entity, rtx_insn *insn)
+{
+ switch (entity)
+{
+case RISCV_VXRM:
+ return recog_memoized (insn) >= 0 ? get_attr_vxrm_mode (insn)
+
