Re: [PATCH 3/6 ver 3] rs6000, Add vector replace builtin support

2020-06-24 Thread Segher Boessenkool 
Hi!

On Thu, Jun 18, 2020 at 03:20:10PM -0700, Carl Love wrote:
> +The programmer is responsible for understanding the endianness issues 
> involved
> +with the first argument and the result.

:-)

> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c
> @@ -0,0 +1,289 @@
> +/* { dg-do run } */
> +/* { dg-require-effective-target powerpc_future_hw } */

This now is "power10_hw".  Similarly, "power10_ok" in other testcases.

> +/* { dg-options "-mdejagnu-cpu=future" } */

And this "-mdejagnu-cpu=power10".

Okay for trunk with those changes.  Thanks!


Segher

[PATCH 3/6 ver 3] rs6000, Add vector replace builtin support

2020-06-18 Thread Carl Love via Gcc-patches 
V3 fixes:
   Fixed bad word breaks in ChangLog.
   Replace spaces with tabs in ChangeLog.


v2 fixes:

change log entries config/rs6000/vsx.md, config/rs6000/rs6000-builtin.def,
config/rs6000/rs6000-call.c.

gcc/config/rs6000/rs6000-call.c: fixed if check for 3rd arg between 0 and 3
 fixed if check for 3rd arg between 0 and 12

gcc/config/rs6000/vsx.md: removed REPLACE_ELT_atr definition and used
  VS_scalar instead.
  removed REPLACE_ELT_inst definition and used
   instead
  fixed spelling mistake on Endianness.
  fixed indenting for vreplace_elt_

---

GCC maintainers:

The following patch adds support for builtins vec_replace_elt and
vec_replace_unaligned.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 9 LE)

and mambo with no regression errors.

Please let me know if this patch is acceptable for the mainline
branch.  Thanks.

 Carl Love

---

gcc/ChangeLog

2020-06-18 Carl Love  

* config/rs6000/altivec.h: Add define for vec_replace_elt and
vec_replace_unaligned.
* config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New.
(REPLACE_ELT): New mode iterator.
(REPLACE_ELT_atr, REPLACE_ELT_inst, REPLACE_ELT_char,
REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
(vreplace_un_, vreplace_elt__inst): New.
* config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI, 
VREPLACE_ELT_UV4SI,
VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI, VREPLACE_ELT_V2DF,
VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF,
VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI, VREPLACE_UN_V2DF): New.
(REPLACE_ELT, REPLACE_UN): New.
* config/rs6000/rs6000-call.c (FUTURE_BUILTIN_VEC_REPLACE_ELT,
FUTURE_BUILTIN_VEC_REPLACE_UN): New.
(rs6000_expand_ternop_builtin): Add 3rd argument checks for
CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
(builtin_function_type) [FUTURE_BUILTIN_VREPLACE_ELT_UV4SI,
FUTURE_BUILTIN_VREPLACE_ELT_UV2DI, FUTURE_BUILTIN_VREPLACE_UN_UV4SI,
FUTURE_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
* doc/extend.texi: Add description for vec_replace_elt and
vec_replace_unaligned builtins.

gcc/testsuite/ChangeLog

2020-06-18 Carl Love  

* gcc.target/powerpc/vec-replace-word.c: Add new test.
---
 gcc/config/rs6000/altivec.h   |   2 +
 gcc/config/rs6000/rs6000-builtin.def  |  16 +
 gcc/config/rs6000/rs6000-call.c   |  61 
 gcc/config/rs6000/vsx.md  |  60 
 gcc/doc/extend.texi   |  50 +++
 .../powerpc/vec-replace-word-runnable.c   | 289 ++
 6 files changed, 478 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 936aeb1ee09..435ffb8158f 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -701,6 +701,8 @@ __altivec_scalar_pred(vec_any_nle,
 #define vec_extracth(a, b, c)  __builtin_vec_extracth (a, b, c)
 #define vec_insertl(a, b, c)   __builtin_vec_insertl (a, b, c)
 #define vec_inserth(a, b, c)   __builtin_vec_inserth (a, b, c)
+#define vec_replace_elt(a, b, c)   __builtin_vec_replace_elt (a, b, c)
+#define vec_replace_unaligned(a, b, c) __builtin_vec_replace_un (a, b, c)
 
 #define vec_gnb(a, b)  __builtin_vec_gnb (a, b)
 #define vec_clrl(a, b) __builtin_vec_clrl (a, b)
diff --git a/gcc/config/rs6000/rs6000-builtin.def 
b/gcc/config/rs6000/rs6000-builtin.def
index c5bd4f86555..91821f29a6f 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2643,6 +2643,20 @@ BU_FUTURE_V_3 (VINSERTVPRBR, "vinsvubvrx", CONST, 
vinsertvr_v16qi)
 BU_FUTURE_V_3 (VINSERTVPRHR, "vinsvuhvrx", CONST, vinsertvr_v8hi)
 BU_FUTURE_V_3 (VINSERTVPRWR, "vinsvuwvrx", CONST, vinsertvr_v4si)
 
+BU_FUTURE_V_3 (VREPLACE_ELT_V4SI, "vreplace_v4si", CONST, vreplace_elt_v4si)
+BU_FUTURE_V_3 (VREPLACE_ELT_UV4SI, "vreplace_uv4si", CONST, vreplace_elt_v4si)
+BU_FUTURE_V_3 (VREPLACE_ELT_V4SF, "vreplace_v4sf", CONST, vreplace_elt_v4sf)
+BU_FUTURE_V_3 (VREPLACE_ELT_V2DI, "vreplace_v2di", CONST, vreplace_elt_v2di)
+BU_FUTURE_V_3 (VREPLACE_ELT_UV2DI, "vreplace_uv2di", CONST, vreplace_elt_v2di)
+BU_FUTURE_V_3 (VREPLACE_ELT_V2DF, "vreplace_v2df", CONST, vreplace_elt_v2df)
+
+BU_FUTURE_V_3 (VREPLACE_UN_V4SI, "vreplace_un_v4si", CONST, vreplace_un_v4si)
+BU_FUTURE_V_3 (VREPLACE_UN_UV4SI, "vreplace_un_uv4si", CONST, vreplace_un_v4si)
+BU_FUTURE_V_3 (VREPLACE_UN_V4SF, "vreplace_un_v4sf", CONST, vreplace_un_v4sf)
+BU_FUTURE_V_3