On Wed, 3 Aug 2016, Ramana Radhakrishnan wrote:
> Joseph, do you have any opinions on whether we should be extending the
> standard pattern names or not for btrunc, ceil, round, floor,
> nearbyint, rint, lround, lfloor and lceil optabs for the HFmode
> quantities ?
If the semantics match a
On Wed, Aug 03, 2016 at 12:52:42PM +0100, Ramana Radhakrishnan wrote:
> On Thu, Jul 28, 2016 at 12:37 PM, Ramana Radhakrishnan
> wrote:
> > On Mon, Jul 4, 2016 at 3:02 PM, Matthew Wahab
> > wrote:
> >> On 19/05/16 15:54, Matthew Wahab wrote:
On 03/08/16 12:52, Ramana Radhakrishnan wrote:
On Thu, Jul 28, 2016 at 12:37 PM, Ramana Radhakrishnan
wrote:
On Mon, Jul 4, 2016 at 3:02 PM, Matthew Wahab
wrote:
On 19/05/16 15:54, Matthew Wahab wrote:
On 18/05/16 16:20, Joseph Myers
On Thu, Jul 28, 2016 at 12:37 PM, Ramana Radhakrishnan
wrote:
> On Mon, Jul 4, 2016 at 3:02 PM, Matthew Wahab
> wrote:
>> On 19/05/16 15:54, Matthew Wahab wrote:
>>> On 18/05/16 16:20, Joseph Myers wrote:
On Wed, 18 May 2016, Matthew
On Mon, Jul 4, 2016 at 3:02 PM, Matthew Wahab
wrote:
> On 19/05/16 15:54, Matthew Wahab wrote:
>> On 18/05/16 16:20, Joseph Myers wrote:
>>> On Wed, 18 May 2016, Matthew Wahab wrote:
>>>
>>> In short: instructions for direct HFmode arithmetic should be described
>>>
Matthew Wahab <matthew.wa...@arm.com>
Date: Thu, 7 Apr 2016 14:49:17 +0100
Subject: [PATCH 08/17] [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.
2016-07-04 Matthew Wahab <matthew.wa...@arm.com>
* config/arm/iterators.md (Code iterators): Fix some white-space
in the com
On 18/05/16 16:20, Joseph Myers wrote:
On Wed, 18 May 2016, Matthew Wahab wrote:
AArch64 follows IEEE-754 but ARM (AArch32) adds restrictions like
flush-to-zero that could affect the outcome of a calculation.
The result of a float computation on two values immediately promoted from
fp16
On Wed, 18 May 2016, Matthew Wahab wrote:
> AArch64 follows IEEE-754 but ARM (AArch32) adds restrictions like
> flush-to-zero that could affect the outcome of a calculation.
The result of a float computation on two values immediately promoted from
fp16 cannot be within the subnormal range for
On 18/05/16 01:51, Joseph Myers wrote:
On Tue, 17 May 2016, Matthew Wahab wrote:
In most cases the instructions are added using non-standard pattern
names. This is to force operations on __fp16 values to be done, by
conversion, using the single-precision instructions. The exceptions are
the
On Wed, 18 May 2016, Joseph Myers wrote:
> But why do you need to force that? If the instructions follow IEEE
> semantics including for exceptions and rounding modes, then X OP Y
> computed directly with binary16 arithmetic has the same value as results
> from promoting to binary32, doing
On Tue, 17 May 2016, Matthew Wahab wrote:
> In most cases the instructions are added using non-standard pattern
> names. This is to force operations on __fp16 values to be done, by
> conversion, using the single-precision instructions. The exceptions are
> the precision preserving operations ABS
r 2016 14:49:17 +0100
Subject: [PATCH 08/17] [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.
2016-05-17 Matthew Wahab <matthew.wa...@arm.com>
* config/arm/iterators.md (Code iterators): Fix some white-space
in the comments.
(GLTE): New.
(ABSNEG): New
(FCVT): Moved from v
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