Re: [PATCH v3] PR92398: Fix testcase failure of pr72804.c
Hi Xiong Hu,
On Mon, Nov 25, 2019 at 10:24:35AM +0800, luoxhu wrote:
> P9LE generated instruction is not worse than P8LE.
> mtvsrdd;xxlnot;stxv vs. not;not;std;std.
To be clear: it can have longer latency, but latency via memory is not
so critical, and this does save decode and other resources. It's hard
to choose which is best :-)
> * gcc.target/powerpc/pr72804.c: Split the store function to...
> * gcc.target/powerpc/pr92398.h: ... this one. New.
I wanted to say that splitting one single function to a header file is a
bit overkill, but it gives a nice place to discuss the differences in
generated code on different CPUs, so okay, it's useful :-)
> + store generates difference instructions as below:
> + P9+: mtvsrdd;xxlnot;stxv.
> + P8/P7/P6 LE: not;not;std;std.
> + P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
> + P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x.
> + P9+ and P9- LE are expected, P6/P7/P8 BE are unexpected. */
Great overview, thanks.
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
> b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
> new file mode 100644
> index 000..2ebe2025cef
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile { target { lp64 && p9+ } } } */
> +/* { dg-require-effective-target powerpc_vsx_ok } */
> +/* { dg-options "-O2 -mvsx" } */
> +
> +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
> +/* { dg-final { scan-assembler-times {\mstxv\M} 1 } } */
Maybe add scan-assembler-not for "not" and "std", and in the < p9 testcase
for these three?
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile { target { lp64 && {! p9+} } } } */
> +/* { dg-require-effective-target powerpc_vsx_ok } */
> +/* { dg-options "-O2 -mvsx" } */
> +
> +/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail be } } } */
> +/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { {p8} && {be} } }
> } } */
I think you can write that as just
/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { p8 && be } } } } */
Okay for trunk with or without such tweaks. Thanks, and sorry the review
took a while!
Segher
Re: [PATCH v3] PR92398: Fix testcase failure of pr72804.c
Hi,
>> +++ b/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
>
>> +/* store generates difference instructions as below:
>> + P9: mtvsrdd;xxlnot;stxv.
>> + P8/P7/P6 LE: not;not;std;std.
>> + P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
>> + P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x. */
>
> But it should generate just the first or second. So just document that,
> and base the tests around that as well?
check_effective_target_p8 is needed as P7/P6 BE has two unexpected std?
Also I split the store to new head file and rename it to pr92398.h.
Others are updated as below patch, Thanks:
P9LE generated instruction is not worse than P8LE.
mtvsrdd;xxlnot;stxv vs. not;not;std;std.
Update the test case to fix failures.
gcc/testsuite/ChangeLog:
2019-11-25 Luo Xiong Hu
testsuite/pr92398
* gcc.target/powerpc/pr72804.c: Split the store function to...
* gcc.target/powerpc/pr92398.h: ... this one. New.
* gcc.target/powerpc/pr92398.p9+.c: New.
* gcc.target/powerpc/pr92398.p9-.c: New.
* lib/target-supports.exp (check_effective_target_p8): New.
(check_effective_target_p9+): New.
---
gcc/testsuite/gcc.target/powerpc/pr72804.c| 19 --
gcc/testsuite/gcc.target/powerpc/pr92398.h| 17
.../gcc.target/powerpc/pr92398.p9+.c | 10 ++
.../gcc.target/powerpc/pr92398.p9-.c | 10 ++
gcc/testsuite/lib/target-supports.exp | 20 +++
5 files changed, 61 insertions(+), 15 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92398.h
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804.c
b/gcc/testsuite/gcc.target/powerpc/pr72804.c
index 10e37caed6b..0b083a44ede 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr72804.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c
@@ -1,7 +1,6 @@
/* { dg-do compile { target { lp64 } } } */
-/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx -fno-inline-functions --param
max-inline-insns-single-O2=200" } */
+/* { dg-options "-O2 -mvsx" } */
__int128_t
foo (__int128_t *src)
@@ -9,17 +8,7 @@ foo (__int128_t *src)
return ~*src;
}
-void
-bar (__int128_t *dst, __int128_t src)
-{
- *dst = ~src;
-}
-/* { dg-final { scan-assembler-times "not " 4 } } */
-/* { dg-final { scan-assembler-times "std " 2 } } */
-/* { dg-final { scan-assembler-times "ld " 2 } } */
-/* { dg-final { scan-assembler-not "lxvd2x" } } */
-/* { dg-final { scan-assembler-not "stxvd2x" } } */
-/* { dg-final { scan-assembler-not "xxpermdi" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
+/* { dg-final { scan-assembler-times {\mld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mnot\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mlxvd2x\M} } }*/
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.h
b/gcc/testsuite/gcc.target/powerpc/pr92398.h
new file mode 100644
index 000..184d02d3521
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92398.h
@@ -0,0 +1,17 @@
+/* This test code is included into pr92398.p9-.c and pr92398.p9+.c.
+ The two files have the tests for the number of instructions generated for
+ P9- versus P9+.
+
+ store generates difference instructions as below:
+ P9+: mtvsrdd;xxlnot;stxv.
+ P8/P7/P6 LE: not;not;std;std.
+ P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
+ P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x.
+ P9+ and P9- LE are expected, P6/P7/P8 BE are unexpected. */
+
+void
+bar (__int128_t *dst, __int128_t src)
+{
+ *dst = ~src;
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
new file mode 100644
index 000..2ebe2025cef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { lp64 && p9+ } } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstxv\M} 1 } } */
+
+/* Source code for the test in pr92398.h */
+#include "pr92398.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
new file mode 100644
index 000..eaf0ddb86eb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { lp64 && {! p9+} } } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail be } } } */
+/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { {p8} && {be} } } }
} */
+
+/*
Re: [PATCH v3] PR92398: Fix testcase failure of pr72804.c
Hi!
On Fri, Nov 22, 2019 at 01:26:39PM +0800, luoxhu wrote:
> Update the code as you wish, Thanks:
The point is to make this interface easy and clear to use. So please
tell me what *you* think about that, don't just do what I think may be
a good solution!
> * gcc.target/powerpc/pr72804.c: Split the store function to...
> * gcc.target/powerpc/pr72804-1.c: ... this one. New.
Ah, good idea.
> +++ b/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
> +/* store generates difference instructions as below:
> + P9: mtvsrdd;xxlnot;stxv.
> + P8/P7/P6 LE: not;not;std;std.
> + P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
> + P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x. */
But it should generate just the first or second. So just document that,
and base the tests around that as well?
> +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 { target power9+ } } }
> */
> +/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 { target power9+ } } } */
> +/* { dg-final { scan-assembler-times {\mstxv\M} 1 { target power9+ } } } */
> +
> +/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail {! { {! power9+} &&
> {le} } } } } } */
> +
> +/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { { {power8} &&
> {be} } || {power9+} } } } } */
These shouldn't xfail for p9 and later: it is an *unexpected* failure there.
Maybe it is easier to duplicate this test? One for p9+ and one for ! p9+?
> +# Return 1 if we're generating code for only power8 platforms.
> +
> +proc check_effective_target_power8 { } {
> + return [check_no_compiler_messages_nocache power8 assembly {
> + #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
> + #error NO
> + #endif
> + } ""]
> +}
Do we need this?
> +# Return 1 if we're generating code for power9 and future platforms.
> +
> +proc check_effective_target_power9+ { } {
> + return [check_no_compiler_messages_nocache power9+ assembly {
> + #if !(defined(_ARCH_PWR9))
> + #error NO
> + #endif
> + } ""]
> +}
Maybe it is useful to have even shorter names, p9+, since room is scarce
where it is used (just like le and be). But maybe it doesn't matter?
Segher
Re: [PATCH v3] PR92398: Fix testcase failure of pr72804.c
Hi Segher,
Update the code as you wish, Thanks:
P9LE generated instruction is not worse than P8LE.
mtvsrdd;xxlnot;stxv vs. not;not;std;std.
Update the test case to fix failures.
v4:
Define and use check_effective_target_xxx etc.
power9+: power9, power10 ...
power8: power8 only.
gcc/testsuite/ChangeLog:
2019-11-22 Luo Xiong Hu
testsuite/pr92398
* gcc.target/powerpc/pr72804.c: Split the store function to...
* gcc.target/powerpc/pr72804-1.c: ... this one. New.
* lib/target-supports.exp (check_effective_target_power8): New.
(check_effective_target_power9+): New.
---
gcc/testsuite/gcc.target/powerpc/pr72804-1.c | 23
gcc/testsuite/gcc.target/powerpc/pr72804.c | 19
gcc/testsuite/lib/target-supports.exp| 20 +
3 files changed, 47 insertions(+), 15 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr72804-1.c
diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
b/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
new file mode 100644
index 000..fce08079bd3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+void
+bar (__int128_t *dst, __int128_t src)
+{
+ *dst = ~src;
+}
+
+/* store generates difference instructions as below:
+ P9: mtvsrdd;xxlnot;stxv.
+ P8/P7/P6 LE: not;not;std;std.
+ P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
+ P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x. */
+
+/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 { target power9+ } } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 { target power9+ } } } */
+/* { dg-final { scan-assembler-times {\mstxv\M} 1 { target power9+ } } } */
+
+/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail {! { {! power9+} &&
{le} } } } } } */
+
+/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { { {power8} && {be}
} || {power9+} } } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804.c
b/gcc/testsuite/gcc.target/powerpc/pr72804.c
index 10e37caed6b..0b083a44ede 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr72804.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c
@@ -1,7 +1,6 @@
/* { dg-do compile { target { lp64 } } } */
-/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx -fno-inline-functions --param
max-inline-insns-single-O2=200" } */
+/* { dg-options "-O2 -mvsx" } */
__int128_t
foo (__int128_t *src)
@@ -9,17 +8,7 @@ foo (__int128_t *src)
return ~*src;
}
-void
-bar (__int128_t *dst, __int128_t src)
-{
- *dst = ~src;
-}
-/* { dg-final { scan-assembler-times "not " 4 } } */
-/* { dg-final { scan-assembler-times "std " 2 } } */
-/* { dg-final { scan-assembler-times "ld " 2 } } */
-/* { dg-final { scan-assembler-not "lxvd2x" } } */
-/* { dg-final { scan-assembler-not "stxvd2x" } } */
-/* { dg-final { scan-assembler-not "xxpermdi" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
+/* { dg-final { scan-assembler-times {\mld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mnot\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mlxvd2x\M} } }*/
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 751045d4744..d2e54c57e96 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2585,6 +2585,26 @@ proc check_effective_target_le { } {
}]
}
+# Return 1 if we're generating code for only power8 platforms.
+
+proc check_effective_target_power8 { } {
+ return [check_no_compiler_messages_nocache power8 assembly {
+ #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
+ #error NO
+ #endif
+ } ""]
+}
+
+# Return 1 if we're generating code for power9 and future platforms.
+
+proc check_effective_target_power9+ { } {
+ return [check_no_compiler_messages_nocache power9+ assembly {
+ #if !(defined(_ARCH_PWR9))
+ #error NO
+ #endif
+ } ""]
+}
+
# Return 1 if we're generating 32-bit code using default options, 0
# otherwise.
--
2.21.0.777.g83232e3864
Re: [PATCH v3] PR92398: Fix testcase failure of pr72804.c
Hi!
On Wed, Nov 20, 2019 at 02:58:33PM +0800, luoxhu wrote:
> v3:
> Define and use check_effective_target_xxx etc.
> pre_power8: ... power6, power7.
> power8: power8 only.
> post_power8: power8, power9 ...
> post_power9: power9, power10 ...
"post_xxx" does not include "xxx", normally.
Maybe was can call it "power8+"? Nice and short. Of course there have
been CPUs called "power5+" etc. as well, but GCC does not support those
as separate -mcpu= (well, except power5+, but that won't give confusion
hopefully).
Or can you come up with some other short name for it?
{pre-power8} is the same as {!power8+} btw.
The only one we need here is p9+ btw. "at-least-p9"? "p9-or-better"?
Or even just "p9", and have an "exactly-p9" if we need that (but that can
also be written {p9 && !p10} then).
> --- a/gcc/testsuite/gcc.target/powerpc/pr72804.c
> +++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c
> @@ -1,7 +1,6 @@
> /* { dg-do compile { target { lp64 } } } */
> -/* { dg-skip-if "" { powerpc*-*-darwin* } } */
> -/* { dg-require-effective-target powerpc_vsx_ok } */
> -/* { dg-options "-O2 -mvsx -fno-inline-functions --param
> max-inline-insns-single-O2=200" } */
> +/* { dg-require-effective-target powerpc_vsx_ok } */
> +/* { dg-options "-O2 -mvsx" } */
>
> __int128_t
> foo (__int128_t *src)
> @@ -15,11 +14,35 @@ bar (__int128_t *dst, __int128_t src)
>*dst = ~src;
> }
>
> -/* { dg-final { scan-assembler-times "not " 4 } } */
> -/* { dg-final { scan-assembler-times "std " 2 } } */
> +/* { dg-final { scan-assembler-times "not " 2 { target post_power9 } } } */
> +/* { dg-final { scan-assembler-not "std " { target post_power9 } } } */
{\mnot\M} etc.?
> +/* { dg-final { scan-assembler-not "stxvd2x" { target post_power9 } } } */
> +/* { dg-final { scan-assembler-not "xxpermdi" { target post_power9 } } } */
So p9 does ld;ld;not;not and mtvsrdd;xxlnor;stxv (both BE and LE). Can
you test all those, and all those we should *not* generate?
> +/* { dg-final { scan-assembler-times "not " 2 { target { {power8} && {be} }
> } } } */
> +/* { dg-final { scan-assembler-not "std " { target { {power8} && {be} } } }
> } */
> +/* { dg-final { scan-assembler-times "stxvd2x" 1 { target { {power8} && {be}
> } } } } */
> +/* { dg-final { scan-assembler-times "xxpermdi" 1 { target { {power8} &&
> {be} } } } } */
> +/* { dg-final { scan-assembler-times "not " 4 { target { {power8} && {le} }
> } } } */
> +/* { dg-final { scan-assembler-times "std " 2 { target { {power8} && {le} }
> } } } */
> +/* { dg-final { scan-assembler-not "stxvd2x" { target { {power8} && {le} } }
> } } */
> +/* { dg-final { scan-assembler-not "xxpermdi" { target { {power8} && {le} }
> } } } */
And p8 BE does ld;ld;not;not and mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x .
That store is bad, should do not;not;std;std just like on LE. Can you check
for the same things for both BE and LE, but xfail those you need to for BE?
> +/* { dg-final { scan-assembler-not "lxvd2x" { target post_power8 } } } */
Ah okay.
> +/* { dg-final { scan-assembler-times "not " 2 { target { {pre_power8} &&
> {be} } } } } */
> +/* { dg-final { scan-assembler-not "std " { target { {pre_power8} && {be} }
> } } } */
> +/* { dg-final { scan-assembler-times "lxvd2x" 1 { target { {pre_power8} &&
> {be} } } } } */
> +/* { dg-final { scan-assembler-times "stxvd2x" 1 { target { {pre_power8} &&
> {be} } } } } */
p7 BE does ld;ld;not;not just fine, but bounces something off the stack
for the store: std;std;addi;lxvd2x;xxlnor;stxvd2x.
> +/* { dg-final { scan-assembler-times "not " 4 { target { {pre_power8} &&
> {le} } } } } */
> +/* { dg-final { scan-assembler-times "std " 2 { target { {pre_power8} &&
> {le} } } } } */
> +/* { dg-final { scan-assembler-not "lxvd2x" { target { {pre_power8} && {le}
> } } } } */
> +/* { dg-final { scan-assembler-not "stxvd2x" { target { {pre_power8} && {le}
> } } } } */
> +
> +/* { dg-final { scan-assembler-not "xxpermdi" { target pre_power8 } } } */
While p7 LE is just fine (all integer).
> /* { dg-final { scan-assembler-times "ld " 2 } } */
> -/* { dg-final { scan-assembler-not "lxvd2x" } } */
> -/* { dg-final { scan-assembler-not "stxvd2x" } } */
> -/* { dg-final { scan-assembler-not "xxpermdi" } } */
> /* { dg-final { scan-assembler-not "mfvsrd" } } */
> /* { dg-final { scan-assembler-not "mfvsrd" } } */
So, for all targets, the read case should be ld;ld;not;not. And for
p9+ the write case should be mtvsrdd;xxlnor;stxv while for pre-p9 it
should be not;not;std;std.
Could you write it like that? And then add xfails where we currently
fail, maybe?
> +# Return 1 if we're generating code for post-power9 platforms.
> +# Power9 is included.
> +
> +proc check_effective_target_post_power9 { } {
> + return [check_no_compiler_messages_nocache post_power9 assembly {
> + #if !(defined(_ARCH_PWR9))
> + #error NO
> + #endif
> + } ""]
> +}
The code for these tests is fine btw, it's just the names that I'm not
sure about.
Segher
Re: [PATCH v3] PR92398: Fix testcase failure of pr72804.c
P9LE generated instruction is not worse than P8LE.
mtvsrdd;xxlnot;stxv vs. not;not;std;std.
Update the test case to fix failures.
v3:
Define and use check_effective_target_xxx etc.
pre_power8: ... power6, power7.
power8: power8 only.
post_power8: power8, power9 ...
post_power9: power9, power10 ...
gcc/testsuite/ChangeLog:
2019-11-15 Luo Xiong Hu
testsuite/pr92398
* gcc.target/powerpc/pr72804.c: Update instruction count per
platform.
* lib/target-supports.exp (check_effective_target_pre_power8): New.
(check_effective_target_power8): New.
(check_effective_target_post_power8): New.
(check_effective_target_post_power9): New.
---
gcc/testsuite/gcc.target/powerpc/pr72804.c | 39
gcc/testsuite/lib/target-supports.exp | 43 ++
2 files changed, 74 insertions(+), 8 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804.c
b/gcc/testsuite/gcc.target/powerpc/pr72804.c
index 10e37caed6b..69da8942ddd 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr72804.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c
@@ -1,7 +1,6 @@
/* { dg-do compile { target { lp64 } } } */
-/* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx -fno-inline-functions --param
max-inline-insns-single-O2=200" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
__int128_t
foo (__int128_t *src)
@@ -15,11 +14,35 @@ bar (__int128_t *dst, __int128_t src)
*dst = ~src;
}
-/* { dg-final { scan-assembler-times "not " 4 } } */
-/* { dg-final { scan-assembler-times "std " 2 } } */
+/* { dg-final { scan-assembler-times "not " 2 { target post_power9 } } } */
+/* { dg-final { scan-assembler-not "std " { target post_power9 } } } */
+/* { dg-final { scan-assembler-not "stxvd2x" { target post_power9 } } } */
+/* { dg-final { scan-assembler-not "xxpermdi" { target post_power9 } } } */
+
+/* { dg-final { scan-assembler-times "not " 2 { target { {power8} && {be} } }
} } */
+/* { dg-final { scan-assembler-not "std " { target { {power8} && {be} } } } }
*/
+/* { dg-final { scan-assembler-times "stxvd2x" 1 { target { {power8} && {be} }
} } } */
+/* { dg-final { scan-assembler-times "xxpermdi" 1 { target { {power8} && {be}
} } } } */
+
+/* { dg-final { scan-assembler-times "not " 4 { target { {power8} && {le} } }
} } */
+/* { dg-final { scan-assembler-times "std " 2 { target { {power8} && {le} } }
} } */
+/* { dg-final { scan-assembler-not "stxvd2x" { target { {power8} && {le} } } }
} */
+/* { dg-final { scan-assembler-not "xxpermdi" { target { {power8} && {le} } }
} } */
+
+/* { dg-final { scan-assembler-not "lxvd2x" { target post_power8 } } } */
+
+/* { dg-final { scan-assembler-times "not " 2 { target { {pre_power8} && {be}
} } } } */
+/* { dg-final { scan-assembler-not "std " { target { {pre_power8} && {be} } }
} } */
+/* { dg-final { scan-assembler-times "lxvd2x" 1 { target { {pre_power8} &&
{be} } } } } */
+/* { dg-final { scan-assembler-times "stxvd2x" 1 { target { {pre_power8} &&
{be} } } } } */
+
+/* { dg-final { scan-assembler-times "not " 4 { target { {pre_power8} && {le}
} } } } */
+/* { dg-final { scan-assembler-times "std " 2 { target { {pre_power8} && {le}
} } } } */
+/* { dg-final { scan-assembler-not "lxvd2x" { target { {pre_power8} && {le} }
} } } */
+/* { dg-final { scan-assembler-not "stxvd2x" { target { {pre_power8} && {le} }
} } } */
+
+/* { dg-final { scan-assembler-not "xxpermdi" { target pre_power8 } } } */
+
/* { dg-final { scan-assembler-times "ld " 2 } } */
-/* { dg-final { scan-assembler-not "lxvd2x" } } */
-/* { dg-final { scan-assembler-not "stxvd2x" } } */
-/* { dg-final { scan-assembler-not "xxpermdi" } } */
/* { dg-final { scan-assembler-not "mfvsrd" } } */
/* { dg-final { scan-assembler-not "mfvsrd" } } */
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 751045d4744..324ec152544 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2585,6 +2585,49 @@ proc check_effective_target_le { } {
}]
}
+# Return 1 if we're generating code for pre-power8 platforms.
+# Power8 is NOT included.
+
+proc check_effective_target_pre_power8 { } {
+ return [check_no_compiler_messages_nocache pre_power8 assembly {
+ #if defined(_ARCH_PWR8)
+ #error NO
+ #endif
+ } ""]
+}
+
+# Return 1 if we're generating code for power8 platforms.
+
+proc check_effective_target_power8 { } {
+ return [check_no_compiler_messages_nocache power8 assembly {
+ #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
+ #error NO
+ #endif
+ } ""]
+}
+
+# Return 1 if we're generating code for post-power8 platforms.
+# Power8 is included.
+
+proc check_effective_target_post_power8 { } {
+ return [check_no_compiler_messages_nocache post_power8 assembly {
+ #if
