After Segher's recent combine change, these tests now use a single instruction to do the "and" and "lsl 10". This is a good thing, so the patch updates the expected output accordingly.
Tested on aarch64-linux-gnu and applied. Richard 2018-08-01 Richard Sandiford <richard.sandif...@arm.com> gcc/testsuite/ * gcc.target/aarch64/sve/var_stride_2.c: Update expected form of range check. * gcc.target/aarch64/sve/var_stride_4.c: Likewise. Index: gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c =================================================================== --- gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c 2018-05-02 08:37:35.613731163 +0100 +++ gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c 2018-08-01 17:00:46.831168822 +0100 @@ -16,7 +16,8 @@ f (TYPE *x, TYPE *y, unsigned short n, u /* { dg-final { scan-assembler {\tldr\tw[0-9]+} } } */ /* { dg-final { scan-assembler {\tstr\tw[0-9]+} } } */ /* Should multiply by (257-1)*4 rather than (VF-1)*4. */ -/* { dg-final { scan-assembler-times {\tadd\tx[0-9]+, x[0-9]+, x[0-9]+, lsl 10\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tubfiz\tx[0-9]+, x2, 10, 16\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tubfiz\tx[0-9]+, x3, 10, 16\n} 1 } } */ /* { dg-final { scan-assembler-not {\tcmp\tx[0-9]+, 0} } } */ /* { dg-final { scan-assembler-not {\tcmp\tw[0-9]+, 0} } } */ /* { dg-final { scan-assembler-not {\tcsel\tx[0-9]+} } } */ Index: gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c =================================================================== --- gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c 2018-05-02 08:37:35.629731011 +0100 +++ gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c 2018-08-01 17:00:46.831168822 +0100 @@ -16,7 +16,8 @@ f (TYPE *x, TYPE *y, int n, int m) /* { dg-final { scan-assembler {\tldr\tw[0-9]+} } } */ /* { dg-final { scan-assembler {\tstr\tw[0-9]+} } } */ /* Should multiply by (257-1)*4 rather than (VF-1)*4. */ -/* { dg-final { scan-assembler-times {\tlsl\tx[0-9]+, x[0-9]+, 10\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tsbfiz\tx[0-9]+, x2, 10, 32\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tsbfiz\tx[0-9]+, x3, 10, 32\n} 1 } } */ /* { dg-final { scan-assembler {\tcmp\tw2, 0} } } */ /* { dg-final { scan-assembler {\tcmp\tw3, 0} } } */ /* { dg-final { scan-assembler-times {\tcsel\tx[0-9]+} 4 } } */