Re: Add IFN_COND_FMA functions

2018-07-12 Thread Richard Sandiford 
Richard Biener  writes:
> On Thu, May 24, 2018 at 2:08 PM Richard Sandiford <
> richard.sandif...@linaro.org> wrote:
>
>> This patch adds conditional equivalents of the IFN_FMA built-in functions.
>> Most of it is just a mechanical extension of the binary stuff.
>
>> Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
>> and x86_64-linux-gnu.  OK for the non-AArch64 bits?
>
> OK.

Thanks.  For the record, here's what I installed after updating
the SVE patterns in line with rth's recent MOVPRFX changes.

Richard

2018-07-12  Richard Sandiford  

gcc/
* doc/md.texi (cond_fma, cond_fms, cond_fnma, cond_fnms): Document.
* optabs.def (cond_fma_optab, cond_fms_optab, cond_fnma_optab)
(cond_fnms_optab): New optabs.
* internal-fn.def (COND_FMA, COND_FMS, COND_FNMA, COND_FNMS): New
internal functions.
(FMA): Use DEF_INTERNAL_FLT_FN rather than DEF_INTERNAL_FLT_FLOATN_FN.
* internal-fn.h (get_conditional_internal_fn): Declare.
(get_unconditional_internal_fn): Likewise.
* internal-fn.c (cond_ternary_direct): New macro.
(expand_cond_ternary_optab_fn): Likewise.
(direct_cond_ternary_optab_supported_p): Likewise.
(FOR_EACH_COND_FN_PAIR): Likewise.
(get_conditional_internal_fn): New function.
(get_unconditional_internal_fn): Likewise.
* gimple-match.h (gimple_match_op::MAX_NUM_OPS): Bump to 5.
(gimple_match_op::gimple_match_op): Add a new overload for 5
operands.
(gimple_match_op::set_op): Likewise.
(gimple_resimplify5): Declare.
* genmatch.c (decision_tree::gen): Generate simplifications for
5 operands.
* gimple-match-head.c (gimple_simplify): Define an overload for
5 operands.  Handle calls with 5 arguments in the top-level overload.
(convert_conditional_op): Handle conversions from unconditional
internal functions to conditional ones.
(gimple_resimplify5): New function.
(build_call_internal): Pass a fifth operand.
(maybe_push_res_to_seq): Likewise.
(try_conditional_simplification): Try converting conditional
internal functions to unconditional internal functions.
Handle 3-operand unconditional forms.
* match.pd (UNCOND_TERNARY, COND_TERNARY): Operator lists.
Define ternary equivalents of the current rules for binary conditional
internal functions.
* config/aarch64/aarch64.c (aarch64_preferred_else_value): Handle
ternary operations.
* config/aarch64/iterators.md (UNSPEC_COND_FMLA, UNSPEC_COND_FMLS)
(UNSPEC_COND_FNMLA, UNSPEC_COND_FNMLS): New unspecs.
(optab): Handle them.
(SVE_COND_FP_TERNARY): New int iterator.
(sve_fmla_op, sve_fmad_op): New int attributes.
* config/aarch64/aarch64-sve.md (cond_)
(*cond__2, *cond__any): New SVE_COND_FP_TERNARY patterns.

gcc/testsuite/
* gcc.dg/vect/vect-cond-arith-3.c: New test.
* gcc.target/aarch64/sve/vcond_13.c: Likewise.
* gcc.target/aarch64/sve/vcond_13_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_14.c: Likewise.
* gcc.target/aarch64/sve/vcond_14_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_15.c: Likewise.
* gcc.target/aarch64/sve/vcond_15_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_16.c: Likewise.
* gcc.target/aarch64/sve/vcond_16_run.c: Likewise.

Index: gcc/doc/md.texi
===
--- gcc/doc/md.texi 2018-07-12 12:39:27.789323671 +0100
+++ gcc/doc/md.texi 2018-07-12 12:42:44.366933190 +0100
@@ -6438,6 +6438,23 @@ Operands 0, 2, 3 and 4 all have mode @va
 integer if @var{m} is scalar, otherwise it has the mode returned by
 @code{TARGET_VECTORIZE_GET_MASK_MODE}.
 
+@cindex @code{cond_fma@var{mode}} instruction pattern
+@cindex @code{cond_fms@var{mode}} instruction pattern
+@cindex @code{cond_fnma@var{mode}} instruction pattern
+@cindex @code{cond_fnms@var{mode}} instruction pattern
+@item @samp{cond_fma@var{mode}}
+@itemx @samp{cond_fms@var{mode}}
+@itemx @samp{cond_fnma@var{mode}}
+@itemx @samp{cond_fnms@var{mode}}
+Like @samp{cond_add@var{m}}, except that the conditional operation
+takes 3 operands rather than two.  For example, the vector form of
+@samp{cond_fma@var{mode}} is equivalent to:
+
+@smallexample
+for (i = 0; i < GET_MODE_NUNITS (@var{m}); i++)
+  op0[i] = op1[i] ? fma (op2[i], op3[i], op4[i]) : op5[i];
+@end smallexample
+
 @cindex @code{neg@var{mode}cc} instruction pattern
 @item @samp{neg@var{mode}cc}
 Similar to @samp{mov@var{mode}cc} but for conditional negation.  Conditionally
Index: gcc/optabs.def
===
--- gcc/optabs.def  2018-07-12 12:39:27.976869878 +0100
+++ gcc/optabs.def  2018-07-12 12:42:44.368856626 +0100
@@ -234,6 +234,10 @@ OPTAB_D (cond_smin_optab, "cond_smin$a")
 OPTAB_D

Re: Add IFN_COND_FMA functions

2018-05-25 Thread Richard Biener 
On Thu, May 24, 2018 at 2:08 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> This patch adds conditional equivalents of the IFN_FMA built-in functions.
> Most of it is just a mechanical extension of the binary stuff.

> Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
> and x86_64-linux-gnu.  OK for the non-AArch64 bits?

OK.

Richard.

> Richard


> 2018-05-24  Richard Sandiford  

> gcc/
>  * doc/md.texi (cond_fma, cond_fms, cond_fnma, cond_fnms):
Document.
>  * optabs.def (cond_fma_optab, cond_fms_optab, cond_fnma_optab)
>  (cond_fnms_optab): New optabs.
>  * internal-fn.def (COND_FMA, COND_FMS, COND_FNMA, COND_FNMS): New
>  internal functions.
>  (FMA): Use DEF_INTERNAL_FLT_FN rather than
DEF_INTERNAL_FLT_FLOATN_FN.
>  * internal-fn.h (get_conditional_internal_fn): Declare.
>  (get_unconditional_internal_fn): Likewise.
>  * internal-fn.c (cond_ternary_direct): New macro.
>  (expand_cond_ternary_optab_fn): Likewise.
>  (direct_cond_ternary_optab_supported_p): Likewise.
>  (FOR_EACH_COND_FN_PAIR): Likewise.
>  (get_conditional_internal_fn): New function.
>  (get_unconditional_internal_fn): Likewise.
>  * gimple-match.h (gimple_match_op::MAX_NUM_OPS): Bump to 5.
>  (gimple_match_op::gimple_match_op): Add a new overload for 5
>  operands.
>  (gimple_match_op::set_op): Likewise.
>  (gimple_resimplify5): Declare.
>  * genmatch.c (decision_tree::gen): Generate simplifications for
>  5 operands.
>  * gimple-match-head.c (gimple_simplify): Define an overload for
>  5 operands.  Handle calls with 5 arguments in the top-level
overload.
>  (convert_conditional_op): Handle conversions from unconditional
>  internal functions to conditional ones.
>  (gimple_resimplify5): New function.
>  (build_call_internal): Pass a fifth operand.
>  (maybe_push_res_to_seq): Likewise.
>  (try_conditional_simplification): Try converting conditional
>  internal functions to unconditional internal functions.
>  Handle 3-operand unconditional forms.
>  * match.pd (UNCOND_TERNARY, COND_TERNARY): Operator lists.
>  Define ternary equivalents of the current rules for binary
conditional
>  internal functions.
>  * config/aarch64/aarch64.c (aarch64_preferred_else_value): Handle
>  ternary operations.
>  * config/aarch64/aarch64-sve.md (cond_)
>  (*cond_, *cond__acc): New
>  SVE_COND_FP_TERNARY patterns.
>  * config/aarch64/iterators.md (UNSPEC_COND_FMLA, UNSPEC_COND_FMLS)
>  (UNSPEC_COND_FNMLA, UNSPEC_COND_FNMLS): New unspecs.
>  (optab): Handle them.
>  (SVE_COND_FP_TERNARY): New int iterator.
>  (sve_fmla_op, sve_fmad_op): New int attributes.

> gcc/testsuite/
>  * gcc.dg/vect/vect-cond-arith-3.c: New test.
>  * gcc.target/aarch64/sve/vcond_13.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_13_run.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_14.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_14_run.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_15.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_15_run.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_16.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_16_run.c: Likewise.

> Index: gcc/doc/md.texi
> ===
> --- gcc/doc/md.texi 2018-05-24 10:12:10.142352315 +0100
> +++ gcc/doc/md.texi 2018-05-24 13:05:46.047607587 +0100
> @@ -6386,6 +6386,23 @@ Operands 0, 2, 3 and 4 all have mode @va
>   integer if @var{m} is scalar, otherwise it has the mode returned by
>   @code{TARGET_VECTORIZE_GET_MASK_MODE}.

> +@cindex @code{cond_fma@var{mode}} instruction pattern
> +@cindex @code{cond_fms@var{mode}} instruction pattern
> +@cindex @code{cond_fnma@var{mode}} instruction pattern
> +@cindex @code{cond_fnms@var{mode}} instruction pattern
> +@item @samp{cond_fma@var{mode}}
> +@itemx @samp{cond_fms@var{mode}}
> +@itemx @samp{cond_fnma@var{mode}}
> +@itemx @samp{cond_fnms@var{mode}}
> +Like @samp{cond_add@var{m}}, except that the conditional operation
> +takes 3 operands rather than two.  For example, the vector form of
> +@samp{cond_fma@var{mode}} is equivalent to:
> +
> +@smallexample
> +for (i = 0; i < GET_MODE_NUNITS (@var{m}); i++)
> +  op0[i] = op1[i] ? fma (op2[i], op3[i], op4[i]) : op5[i];
> +@end smallexample
> +
>   @cindex @code{neg@var{mode}cc} instruction pattern
>   @item @samp{neg@var{mode}cc}
>   Similar to @samp{mov@var{mode}cc} but for conditional negation.
Conditionally
> Index: gcc/optabs.def
> ===
> --- gcc/optabs.def  2018-05-24 10:12:10.146352152 +0100
> +++ gcc/optabs.def

Add IFN_COND_FMA functions

2018-05-24 Thread Richard Sandiford 
This patch adds conditional equivalents of the IFN_FMA built-in functions.
Most of it is just a mechanical extension of the binary stuff.

Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
and x86_64-linux-gnu.  OK for the non-AArch64 bits?

Richard


2018-05-24  Richard Sandiford  

gcc/
* doc/md.texi (cond_fma, cond_fms, cond_fnma, cond_fnms): Document.
* optabs.def (cond_fma_optab, cond_fms_optab, cond_fnma_optab)
(cond_fnms_optab): New optabs.
* internal-fn.def (COND_FMA, COND_FMS, COND_FNMA, COND_FNMS): New
internal functions.
(FMA): Use DEF_INTERNAL_FLT_FN rather than DEF_INTERNAL_FLT_FLOATN_FN.
* internal-fn.h (get_conditional_internal_fn): Declare.
(get_unconditional_internal_fn): Likewise.
* internal-fn.c (cond_ternary_direct): New macro.
(expand_cond_ternary_optab_fn): Likewise.
(direct_cond_ternary_optab_supported_p): Likewise.
(FOR_EACH_COND_FN_PAIR): Likewise.
(get_conditional_internal_fn): New function.
(get_unconditional_internal_fn): Likewise.
* gimple-match.h (gimple_match_op::MAX_NUM_OPS): Bump to 5.
(gimple_match_op::gimple_match_op): Add a new overload for 5
operands.
(gimple_match_op::set_op): Likewise.
(gimple_resimplify5): Declare.
* genmatch.c (decision_tree::gen): Generate simplifications for
5 operands.
* gimple-match-head.c (gimple_simplify): Define an overload for
5 operands.  Handle calls with 5 arguments in the top-level overload.
(convert_conditional_op): Handle conversions from unconditional
internal functions to conditional ones.
(gimple_resimplify5): New function.
(build_call_internal): Pass a fifth operand.
(maybe_push_res_to_seq): Likewise.
(try_conditional_simplification): Try converting conditional
internal functions to unconditional internal functions.
Handle 3-operand unconditional forms.
* match.pd (UNCOND_TERNARY, COND_TERNARY): Operator lists.
Define ternary equivalents of the current rules for binary conditional
internal functions.
* config/aarch64/aarch64.c (aarch64_preferred_else_value): Handle
ternary operations.
* config/aarch64/aarch64-sve.md (cond_)
(*cond_, *cond__acc): New
SVE_COND_FP_TERNARY patterns.
* config/aarch64/iterators.md (UNSPEC_COND_FMLA, UNSPEC_COND_FMLS)
(UNSPEC_COND_FNMLA, UNSPEC_COND_FNMLS): New unspecs.
(optab): Handle them.
(SVE_COND_FP_TERNARY): New int iterator.
(sve_fmla_op, sve_fmad_op): New int attributes.

gcc/testsuite/
* gcc.dg/vect/vect-cond-arith-3.c: New test.
* gcc.target/aarch64/sve/vcond_13.c: Likewise.
* gcc.target/aarch64/sve/vcond_13_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_14.c: Likewise.
* gcc.target/aarch64/sve/vcond_14_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_15.c: Likewise.
* gcc.target/aarch64/sve/vcond_15_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_16.c: Likewise.
* gcc.target/aarch64/sve/vcond_16_run.c: Likewise.

Index: gcc/doc/md.texi
===
--- gcc/doc/md.texi 2018-05-24 10:12:10.142352315 +0100
+++ gcc/doc/md.texi 2018-05-24 13:05:46.047607587 +0100
@@ -6386,6 +6386,23 @@ Operands 0, 2, 3 and 4 all have mode @va
 integer if @var{m} is scalar, otherwise it has the mode returned by
 @code{TARGET_VECTORIZE_GET_MASK_MODE}.
 
+@cindex @code{cond_fma@var{mode}} instruction pattern
+@cindex @code{cond_fms@var{mode}} instruction pattern
+@cindex @code{cond_fnma@var{mode}} instruction pattern
+@cindex @code{cond_fnms@var{mode}} instruction pattern
+@item @samp{cond_fma@var{mode}}
+@itemx @samp{cond_fms@var{mode}}
+@itemx @samp{cond_fnma@var{mode}}
+@itemx @samp{cond_fnms@var{mode}}
+Like @samp{cond_add@var{m}}, except that the conditional operation
+takes 3 operands rather than two.  For example, the vector form of
+@samp{cond_fma@var{mode}} is equivalent to:
+
+@smallexample
+for (i = 0; i < GET_MODE_NUNITS (@var{m}); i++)
+  op0[i] = op1[i] ? fma (op2[i], op3[i], op4[i]) : op5[i];
+@end smallexample
+
 @cindex @code{neg@var{mode}cc} instruction pattern
 @item @samp{neg@var{mode}cc}
 Similar to @samp{mov@var{mode}cc} but for conditional negation.  Conditionally
Index: gcc/optabs.def
===
--- gcc/optabs.def  2018-05-24 10:12:10.146352152 +0100
+++ gcc/optabs.def  2018-05-24 13:05:46.049605128 +0100
@@ -234,6 +234,10 @@ OPTAB_D (cond_smin_optab, "cond_smin$a")
 OPTAB_D (cond_smax_optab, "cond_smax$a")
 OPTAB_D (cond_umin_optab, "cond_umin$a")
 OPTAB_D (cond_umax_optab, "cond_umax$a")
+OPTAB_D (cond_fma_optab, "cond_fma$a")
+OPTAB_D (cond_fms_optab, "cond_fms$a")
+OPTAB_D (cond_fnma_optab,