Fix tilepro and tilegx WRT recent changes to extract_bit_field

[Jeff Law]

Joseph's tester as well as mine tripped over this nit over the weekend. 
Another argument was recently added to extract_bit_field, but the calls 
in the tilegx and tilepro backends were not fixed.

This was enough to get the ports building again, including target-libgcc 
and glibc.


Installing on the trunk.

Jeff
        * config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Add
        missing argument to extract_bit_field call.
        * config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Likewise.

diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index d8ca14b..e070e7e 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -1959,7 +1959,7 @@ tilegx_expand_unaligned_load (rtx dest_reg, rtx mem, 
HOST_WIDE_INT bitsize,
        extract_bit_field (gen_lowpart (DImode, wide_result),
                           bitsize, bit_offset % BITS_PER_UNIT,
                           !sign, gen_lowpart (DImode, dest_reg),
-                          DImode, DImode, false);
+                          DImode, DImode, false, NULL);
 
       if (extracted != dest_reg)
        emit_move_insn (dest_reg, gen_lowpart (DImode, extracted));
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index aa1bb1c..81019c1 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -1688,7 +1688,7 @@ tilepro_expand_unaligned_load (rtx dest_reg, rtx mem, 
HOST_WIDE_INT bitsize,
        extract_bit_field (gen_lowpart (SImode, wide_result),
                           bitsize, bit_offset % BITS_PER_UNIT,
                           !sign, gen_lowpart (SImode, dest_reg),
-                          SImode, SImode, false);
+                          SImode, SImode, false, NULL);
 
       if (extracted != dest_reg)
        emit_move_insn (dest_reg, gen_lowpart (SImode, extracted));