On 6/14/23 15:15, 钟居哲 wrote:
Hi, Jeff. Thanks for quick approval.
When I reviewed the patch:
(define_expand "2"
[(set (match_operand:VF 0 "register_operand")
(any_float_unop_nofrm:VF
(match_operand:VF 1 "register_operand")))]
"TARGET_VECTOR"
{
insn_code icode =
> Btw. I'm currently running the testsuite with rv64gcv_zfhmin
> default march and see some additional FAILs. Will report back.
Reporting back - the FAILs are a combination of an older qemu
version and not fully comprehensive target selectors. I'm going
to send a V2 for the testsuite patch as
Hi Juzhe,
I like the iterator solution better, I added it to the
binops V2 patch with a comment and will post it in a while.
Also realized there is already a testcase and the "enabled"
attribute is set properly now but I hadn't rebased to the
current master branch in a while...
Btw. I'm
After several considerations, I think we may need to add VF_AUTO iterators
(with predicate TARGET_ZVFH for vector HF mode) for FP autovec.
Add add testcase of these unary operations with -march=rv64gc_zvfhmin to make
sure they don't
cause any ICE and vectorizations.
like
ZVFH.
Then it also works now. -march=zvfhmin no auto-vectorization , -march=zvfh has
auto-vectorization.
Feel free to comments more solutions.
Thanks.
juzhe.zh...@rivai.ai
From: 钟居哲
Date: 2023-06-15 05:15
To: Jeff Law; rdapp.gcc; gcc-patches; palmer; kito.cheng
Subject: Re: Re: [PATCH]
, I think adding !(GET_MODE_INNER (mode) == HFmode && !TARGET_ZVFH)
is an ugly implementation and not easy to maintain since we will need add this
condition to each floating-point patterns.
So, give me some time to figure out an elegant way to support
auto-vectorization.
Thanks.
On 6/14/23 09:31, Robin Dapp wrote:
Hi,
this patch adds floating-point autovec expanders for vfneg, vfabs as well as
vfsqrt and the accompanying tests. vfrsqrt7 will be added at a later time.
So with vrsqrt7 I think the question turns into will we be able to use
it effectively. With its
