Re: Phone call (was Re: Armhf dynamic linker path)

2012-04-12 Thread Jakub Jelinek
On Thu, Apr 12, 2012 at 11:22:13AM +1200, Michael Hope wrote: All good. My vote is for /lib/ld-arm-linux-gnueabihf.so.3 as it: The directory should be /libhf/ or /libhfp/ for that for consistency with all the other architectures. Note e.g. x86_64 dynamic linker is /lib64/ld-linux-x86-64.so.2,

[PATCH] Option to build bare-metal ARM cross-compiler for arm-none-eabi target without libunwind

2012-04-12 Thread Fredrik Hederstierna
We've been using a bare-metal 'arm-elf' cross-compiler toolchain over the years since GCC 2.95.x/GCC3/GCC4, and it has worked fine. Now it seems though like the 'arm-elf' target seems obsolete, and we are trying to switch to 'arm-none-eabi'. Though we use no standard-libs at all, we are really

Re: Phone call (was Re: Armhf dynamic linker path)

2012-04-12 Thread Jakub Jelinek
On Thu, Apr 12, 2012 at 10:33:08AM +0300, Riku Voipio wrote: On 12 April 2012 09:05, Jakub Jelinek ja...@redhat.com wrote: On Thu, Apr 12, 2012 at 11:22:13AM +1200, Michael Hope wrote: All good.  My vote is for /lib/ld-arm-linux-gnueabihf.so.3 as it: The directory should be /libhf/ or

Re: [C++ Patch] for c++/52465

2012-04-12 Thread Fabien Chêne
2012/4/11 Jason Merrill ja...@redhat.com: [...] Your ChangeLog needs to be adjusted.  :) I did write an updated ChangeLog, but I pasted here the wrong one... I committed it to trunk yesterday, hopefully with the correct ChangeLog . I'll be backporting it to 4.7 after a relaxing weekend :-) --

Re: [cxx-conversion] Switch default to build in C++

2012-04-12 Thread Richard Guenther
On Wed, Apr 11, 2012 at 6:37 PM, Diego Novillo dnovi...@google.com wrote: This patch makes the branch to build in C++ mode by default. Tested on x86_64.  Committed. Note that for merging the branch the support to build with a C host compiler should be removed (and docs updated). Richard.

Re: [IA-64] Fix PR target/48496

2012-04-12 Thread Richard Guenther
On Wed, Apr 11, 2012 at 11:01 PM, Eric Botcazou ebotca...@adacore.com wrote: Hi, this is the spurious error on asm statements of the form:  error: 'asm' operand requires impossible reload present for IA-64 on mainline and 4.7 branch.  As diagnosed by Ulrich, the code responsible for the

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Kirill Yukhin
Perhaps HLE_ACQUIRE / HLE_RELEASE should be something like HLE_START / HLE_END instead?  Not particularly great names, but at least it avoids overloading ACQUIRE/RELEASE and thus should make it clearer that you still need to specify a memory order. IMHO, this is also not as good, since

Re: [IA-64] Fix PR target/48496

2012-04-12 Thread Jakub Jelinek
On Wed, Apr 11, 2012 at 11:01:40PM +0200, Eric Botcazou wrote: 2012-04-11 Eric Botcazou ebotca...@adacore.com PR target/48496 * config/ia64/constraints.md (Q): Only accept non-volatile MEMs and also pseudo-registers during reload. 2012-04-11 Eric Botcazou

[Patch, Fortran] PR52864 - Fix pointer-intent regresssion

2012-04-12 Thread Tobias Burnus
That's a GCC 4.6-4.8 regression. Pointer intents apply to the association status and not to the value. Thus, assigning to an intent(in) pointer is fine. The problem was that the LHS is no pointer due to the array access (dt%ptr(1) =) thus, the check got triggered. Build and regtested on

Re: [PATCH] [ARM] thumb1 imm move 256-510

2012-04-12 Thread Richard Earnshaw
On 12/04/12 02:48, Joey Ye wrote: For thumb1 use move + add instructions for immediate move [256-510]. Following is a complete range if combine an imm mov with listed instructions. Among them, lsls and neg have already been implemented. The only missing opportunity is add, in which I

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Kirill Yukhin
Folks, Here is patch with removed implied atomic ACQUIRE/RELEASE. Could you please have a look? ChangeLog entry: 2012-04-12 Kirill Yukhin kirill.yuk...@intel.com * builtins.c (get_memmodel): Remove check of upper bound. (expand_builtin_atomic_compare_exchange): Mask memmodel

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Jakub Jelinek
On Thu, Apr 12, 2012 at 01:37:24PM +0400, Kirill Yukhin wrote: Folks, Here is patch with removed implied atomic ACQUIRE/RELEASE. Could you please have a look? +

strengthen protection against REG_EQUIV/EQUAL on !REG set

2012-04-12 Thread Olivier Hainque
Hello, This is a followup on a suggestion made along the thread at http://gcc.gnu.org/ml/gcc-patches/2010-09/msg00967.html where we were observing the middle-end setting invalid REG_EQUIV notes on set(mem) insns. At the time we had fixed specific locations where this was happening via

Re: strengthen protection against REG_EQUIV/EQUAL on !REG set

2012-04-12 Thread Olivier Hainque
Clarifying: On Apr 12, 2012, at 11:54 , Olivier Hainque wrote: At the time we had fixed specific locations where this was happening via explicit calls to set_unique_reg_note. We had fixed the problems observable at the time by preventing calls to set_unique_reg_notes when they would lead to

[PATCH] Also use max-iteration knowledge for cost consideration

2012-04-12 Thread Richard Guenther
This makes us also use max-iteration knowledge when considering costs for prefetching and parallelization instead of only relying on iteration estimates which are sometimes not available. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2012-04-11 Richard Guenther

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Igor Zamyatin
On Wed, Apr 11, 2012 at 5:38 PM, Andi Kleen a...@firstfloor.org wrote: Igor Zamyatin izamya...@gmail.com writes: Hi All! It is known that imul placement is rather critical for Atom processors and changes try to improve imul scheduling for Atom. This gives +5% performance on several tests

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Igor Zamyatin
On Wed, Apr 11, 2012 at 6:10 PM, Richard Guenther richard.guent...@gmail.com wrote: On Wed, Apr 11, 2012 at 3:38 PM, Andi Kleen a...@firstfloor.org wrote: Igor Zamyatin izamya...@gmail.com writes: Hi All! It is known that imul placement is rather critical for Atom processors and changes try

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Richard Guenther
On Thu, Apr 12, 2012 at 12:20 PM, Igor Zamyatin izamya...@gmail.com wrote: On Wed, Apr 11, 2012 at 6:10 PM, Richard Guenther richard.guent...@gmail.com wrote: On Wed, Apr 11, 2012 at 3:38 PM, Andi Kleen a...@firstfloor.org wrote: Igor Zamyatin izamya...@gmail.com writes: Hi All! It is

Re: [PATCH] Atom: Enabling unroll at O2 optimization level

2012-04-12 Thread Igor Zamyatin
On Wed, Apr 11, 2012 at 5:34 PM, Andi Kleen a...@firstfloor.org wrote: Richard Guenther richard.guent...@gmail.com writes: 5% is not moderate.  Your patch does enable unrolling at -O2 but not -O3, why? Why do you disable register renaming?  check_imull requires a function comment. This

Re: [PATCH] Atom: Enabling unroll at O2 optimization level

2012-04-12 Thread Igor Zamyatin
On Wed, Apr 11, 2012 at 12:39 PM, Richard Guenther richard.guent...@gmail.com wrote: On Tue, Apr 10, 2012 at 8:43 PM, Igor Zamyatin izamya...@gmail.com wrote: Hi All! Here is a patch that enables unroll at O2 for Atom. This gives good performance boost on EEMBC 2.0 (~+8% in Geomean for 32

Re: [PATCH] Atom: Enabling unroll at O2 optimization level

2012-04-12 Thread Richard Guenther
On Thu, Apr 12, 2012 at 1:05 PM, Igor Zamyatin izamya...@gmail.com wrote: On Wed, Apr 11, 2012 at 12:39 PM, Richard Guenther richard.guent...@gmail.com wrote: On Tue, Apr 10, 2012 at 8:43 PM, Igor Zamyatin izamya...@gmail.com wrote: Hi All! Here is a patch that enables unroll at O2 for Atom.

Re: [PATCH, i386, Android] -mandroid support for i386 target

2012-04-12 Thread Ilya Enkovich
This is a big change.  Maybe it is better to break it into 2 parts: 1. Introduce gnu-user32.h only, which can be reviewed by x86 backend maintainers.   Another possibility is to add gnu-user-common.h instead of gnu-user32.h so that no changes to config.gcc are needed. 2. Add Android

[PATCH] Fix PR52943

2012-04-12 Thread Richard Guenther
Data-dependence analysis gets analyzing a[3] vs. a[{3, +, -1}_1] wrong where it claims there is no dependence. That is because analyze_siv_subscript_cst_affine uses chrec_is_positive to distinguish cases but that returns always negative for zero (zero, in this case being the distance between 3

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Andi Kleen
On Thu, Apr 12, 2012 at 12:38:44AM +0200, Torvald Riegel wrote: On Wed, 2012-04-11 at 15:06 +0200, Andi Kleen wrote: Tests passing, bootstrap in progress. Comments? Do you really imply ACQUIRE/RELEASE with HLE_ACQUIRE/RELEASE now? I don't see that in the code. I think that's

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Alexander Monakov
Can atom execute two IMUL in parallel? Or what exactly is the pipeline behavior? As I understand from Intel's optimization reference manual, the behavior is as follows: if the instruction immediately following IMUL has shorter latency, execution is stalled for 4 cycles (which is IMUL's

Re: [IA-64] Fix PR target/48496

2012-04-12 Thread Eric Botcazou
Is the standard condition for define_memory_constraint here /* Likewise if the address will be reloaded because reg_equiv_address is nonzero. For reg_equiv_mem we have to check. */ else if

[v3] libstdc++/52942

2012-04-12 Thread Paolo Carlini
Hi, this is what I'm going to commit to mainline and 4_7-branch to fix the regression. Tested x86_64-linux, debug-mode too. Thanks, Paolo. 2012-04-12 Paolo Carlini paolo.carl...@oracle.com PR libstdc++/52942 * include/bits/stl_function.h

Re: [cxx-conversion] Switch default to build in C++

2012-04-12 Thread Diego Novillo
On 4/12/12 4:31 AM, Richard Guenther wrote: On Wed, Apr 11, 2012 at 6:37 PM, Diego Novillodnovi...@google.com wrote: This patch makes the branch to build in C++ mode by default. Tested on x86_64. Committed. Note that for merging the branch the support to build with a C host compiler should

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Andrew MacLeod
On 04/11/2012 06:38 PM, Torvald Riegel wrote: On Wed, 2012-04-11 at 15:06 +0200, Andi Kleen wrote: Perhaps HLE_ACQUIRE / HLE_RELEASE should be something like HLE_START / HLE_END instead? Not particularly great names, but at least it avoids overloading ACQUIRE/RELEASE and thus should make it

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Richard Guenther
On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov amona...@ispras.ru wrote: Can atom execute two IMUL in parallel?  Or what exactly is the pipeline behavior? As I understand from Intel's optimization reference manual, the behavior is as follows: if the instruction immediately following IMUL

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Jakub Jelinek
On Thu, Apr 12, 2012 at 08:21:47AM -0400, Andrew MacLeod wrote: On 04/11/2012 06:38 PM, Torvald Riegel wrote: On Wed, 2012-04-11 at 15:06 +0200, Andi Kleen wrote: Perhaps HLE_ACQUIRE / HLE_RELEASE should be something like HLE_START / HLE_END instead? Not particularly great names, but at least

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Torvald Riegel
On Thu, 2012-04-12 at 13:36 +0200, Andi Kleen wrote: On Thu, Apr 12, 2012 at 12:38:44AM +0200, Torvald Riegel wrote: On Wed, 2012-04-11 at 15:06 +0200, Andi Kleen wrote: Tests passing, bootstrap in progress. Comments? Do you really imply ACQUIRE/RELEASE with

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Igor Zamyatin
On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther richard.guent...@gmail.com wrote: On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov amona...@ispras.ru wrote: Can atom execute two IMUL in parallel?  Or what exactly is the pipeline behavior? As I understand from Intel's optimization

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Richard Guenther
On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatin izamya...@gmail.com wrote: On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther richard.guent...@gmail.com wrote: On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakov amona...@ispras.ru wrote: Can atom execute two IMUL in parallel?  Or what exactly

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Andi Kleen
Hi Andrew, Does it make any sense to simply predefine the possible valid combinations with the HLE bit already set? it at least removes any possible invalid combinations and forces the programmer to consciously choose their memory model. ie, __ATOMIC_HLE_XACQ_CONSUME

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Andi Kleen
What if another vendor shows up, perhaps on another architecture? HLE code is currently usually x86 specific. e.g. for practical spin locks you have to include a __builtin_ia32_pause() on lock locked to stop speculation, otherwise the lock path will speculate too, which is very inefficient. So

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Andi Kleen
__ATOMIC_HLE_XACQ_CONSUME __ATOMIC_HLE_XACQ_ACQUIRE __ATOMIC_HLE_XACQ_ACQ_REL __ATOMIC_HLE_XACQ_SEQ_CST __ATOMIC_HLE_XREL_RELEASE __ATOMIC_HLE_XREL_ACQ_REL __ATOMIC_HLE_XREL_SEQ_CST or whatever happens to be valid... Doesn't really scale to adding more new bits later, but

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Andrey Belevantsev
On 12.04.2012 16:38, Richard Guenther wrote: On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatinizamya...@gmail.com wrote: On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther richard.guent...@gmail.com wrote: On Thu, Apr 12, 2012 at 2:00 PM, Alexander Monakovamona...@ispras.ru wrote: Can atom

Re: [patch optimization]: Add some basic folding for ==/!= comparison

2012-04-12 Thread Richard Guenther
On Thu, Apr 5, 2012 at 6:15 PM, Kai Tietz ktiet...@googlemail.com wrote: Hello, this patch adds some basic folding capabilities to fold-const for equal and none-equal comparisons on integer typed argument. ChangeLog 2012-04-05  Kai Tietz  kti...@redhat.com        * fold-const.c

Re: [RS6000] Stack tie fix.

2012-04-12 Thread Alan Modra
On Wed, Apr 11, 2012 at 11:00:04AM +0200, Richard Guenther wrote: On Wed, Apr 11, 2012 at 6:15 AM, Alan Modra amo...@gmail.com wrote: Well - you are expecting generic code to understand your arch-specific UNSPEC. It of course cannot. Right. (USE (mem:BLK (reg 1))) (CLOBBER (mem:BLK (reg

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Torvald Riegel
On Thu, 2012-04-12 at 08:21 -0400, Andrew MacLeod wrote: On 04/11/2012 06:38 PM, Torvald Riegel wrote: On Wed, 2012-04-11 at 15:06 +0200, Andi Kleen wrote: Perhaps HLE_ACQUIRE / HLE_RELEASE should be something like HLE_START / HLE_END instead? Not particularly great names, but at least

Re: [PATCH] Atom: Enabling unroll at O2 optimization level

2012-04-12 Thread Andi Kleen
So would need much more benchmarking on macro workloads first at least. Like what, for example? I believe in this case everything also strongly depends on test usage model (e.g. it usually compiled with Os not O2) and, let's say, internal test structure - whether there are hot loops that

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Andi Kleen
Would that be an acceptable option for everyone? Andi, would proper documentation resolve your ease-of-use concerns? Proper documentation is needed in any case, but I would strongly prefer an inherently hard-to-misuse interface. I think Andrew's proposal is the best for that so far. -Andi

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Richard Guenther
2012/4/12 Andrey Belevantsev a...@ispras.ru: On 12.04.2012 16:38, Richard Guenther wrote: On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatinizamya...@gmail.com  wrote: On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther richard.guent...@gmail.com  wrote: On Thu, Apr 12, 2012 at 2:00 PM,

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Andrey Belevantsev
On 12.04.2012 17:54, Richard Guenther wrote: 2012/4/12 Andrey Belevantseva...@ispras.ru: On 12.04.2012 16:38, Richard Guenther wrote: On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatinizamya...@gmail.com wrote: On Thu, Apr 12, 2012 at 4:24 PM, Richard Guenther richard.guent...@gmail.com

Re: [PATCH, ARM] PR49448 incorrectly detecting big-endian arm-linux triplets

2012-04-12 Thread Richard Earnshaw
On 28/02/12 15:27, Richard Earnshaw wrote: The pattern to match a big-endian machine for linux is ambiguous as reported by the PR and can cause some little-endian triplets to be confused as big-endian. This patch makes the string unambiguous. R. * config.gcc (arm*-*-linux*): Use

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Kirill Yukhin
I would suggest that we keep the HLE acq/rel bits independent of the memory order bits.  Both are independent on a conceptual level.  And we should add documentation that tells programmers that memory orders need always be specified. Sorry, I didn't get your point. You propose to separate

[PATCH] More code refactoring

2012-04-12 Thread Richard Guenther
Eventually I'll succeed in making tree-optimize.c empty. At least the pass stuff I'm interested in get's better now. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. Richard. 2012-04-12 Richard Guenther rguent...@suse.de * Makefile.in (cgraphunit.o): Add $(EXCEPT_H)

Re: [PATCH] Atom: Scheduler improvements for better imul placement

2012-04-12 Thread Richard Guenther
2012/4/12 Andrey Belevantsev a...@ispras.ru: On 12.04.2012 17:54, Richard Guenther wrote: 2012/4/12 Andrey Belevantseva...@ispras.ru: On 12.04.2012 16:38, Richard Guenther wrote: On Thu, Apr 12, 2012 at 2:36 PM, Igor Zamyatinizamya...@gmail.com  wrote: On Thu, Apr 12, 2012 at 4:24 PM,

Re: [PATCH] Fix ICE in expand_cse_reciprocals (PR tree-optimization/42078)

2012-04-12 Thread Richard Guenther
On Mon, Apr 9, 2012 at 8:37 AM, Alexandre Oliva aol...@redhat.com wrote: On Jun  3, 2011, Alexandre Oliva aol...@redhat.com wrote: According to http://gcc.gnu.org/ml/gcc-patches/2009-11/msg01082.html on Nov 20, 2009, Alexandre Oliva aol...@redhat.com wrote: On Nov 19, 2009, Richard Guenther

Re: [PATCH] Fix PR18589

2012-04-12 Thread Richard Guenther
On Thu, Apr 5, 2012 at 3:49 PM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: On Thu, 2012-04-05 at 11:23 +0200, Richard Guenther wrote: On Wed, Apr 4, 2012 at 9:15 PM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: Unfortunately this seems to be necessary if I name the two

Re: [PATCH][ARM] NEON DImode neg

2012-04-12 Thread Andrew Stubbs
Ping. On 26/03/12 11:14, Andrew Stubbs wrote: On 28/02/12 17:45, Andrew Stubbs wrote: Hi all, This patch adds a DImode negate pattern for NEON. Unfortunately, the NEON vneg instruction only supports vectors, not singletons, so there's no direct way to do it in DImode, and the compiler ends

[PATCH][C] Fix PR52549

2012-04-12 Thread Richard Guenther
This fixes PR52549 - we are running into an overzealous assert that wants to make sure we don't have PLUS_EXPR on pointers. But that code does not really check this and falls foul of the conversion removal code right before it that transforms (void *)(a + b) to a + b. Fixed as follows.

[PATCH] Fix PR52862

2012-04-12 Thread Richard Guenther
This removes the special casing of zero from convert_to_pointer (why would only that need overflow flag handling? and why would the generic code below not properly handle it ...) That sounds better than papering over the issue with noting that integer_zerop can return true for non-INTEGER_CSTs

Re: [PATCH, powerpc] Fix PR52775, enable FCFID on power4

2012-04-12 Thread David Edelsohn
On Wed, Apr 11, 2012 at 4:12 PM, Michael Meissner meiss...@linux.vnet.ibm.com wrote: It was brought to my attention that when I rewrote the floating point conversion operations for power7, I did not notice that the power4 and 970 powerpc's actually support the FCFID (floating point convert)

[Patch, Fortran] PR52864 - fix actual/formal checks

2012-04-12 Thread Tobias Burnus
This patch is a kind of follow up to the other one for the same PR - though this one is for a separate test case, it is not a regression and it's about actual/formal checks. When trying to fix the rejects-valid bug, I realized that one function was never accessed as a call to expr.c's

Re: [RS6000] Stack tie fix.

2012-04-12 Thread David Edelsohn
On Thu, Apr 12, 2012 at 9:22 AM, Alan Modra amo...@gmail.com wrote: I tried that.  It doesn't work without something else in the insn to stop rtl-dce deleting it, so you may as well use SETs.  But thanks for the prod in the right direction.  We do get slightly better results when the regs are

Re: [PATCH] Dissociate store_expr's temp from exp so that it is not marked as addressable

2012-04-12 Thread Martin Jambor
Hi, On Fri, Apr 06, 2012 at 06:13:20PM +0200, Eric Botcazou wrote: 2012-04-03 Martin Jambor mjam...@suse.cz * expr.c (expand_expr_real_1): Pass type, not the expression, to set_mem_attributes for a memory temporary. Do not call the function for temporaries with a

Re: [PATCH][ARM] NEON DImode neg

2012-04-12 Thread Richard Earnshaw
On 26/03/12 11:14, Andrew Stubbs wrote: On 28/02/12 17:45, Andrew Stubbs wrote: Hi all, This patch adds a DImode negate pattern for NEON. Unfortunately, the NEON vneg instruction only supports vectors, not singletons, so there's no direct way to do it in DImode, and the compiler ends up

Re: [RS6000] Stack tie fix.

2012-04-12 Thread Richard Guenther
On Thu, Apr 12, 2012 at 5:34 PM, David Edelsohn dje@gmail.com wrote: On Thu, Apr 12, 2012 at 9:22 AM, Alan Modra amo...@gmail.com wrote: I tried that.  It doesn't work without something else in the insn to stop rtl-dce deleting it, so you may as well use SETs.  But thanks for the prod in

Re: [RFC] Should SRA stop producing COMPONENT_REF for non-bit-fields (again)?

2012-04-12 Thread Martin Jambor
Hi, On Wed, Apr 04, 2012 at 04:42:05PM +0200, Richard Guenther wrote: On Wed, 4 Apr 2012, Martin Jambor wrote: Hi everyone, especially Richi and Eric, I'd like to know what is your attitude to changing SRA's build_ref_for_model to what it once looked like, so that it produces

Re: [RS6000] Stack tie fix.

2012-04-12 Thread Olivier Hainque
On Apr 12, 2012, at 17:34 , David Edelsohn wrote: This version is okay, but I also want to give Richi and Olivier an opportunity to comment if they still have any concerns. Thanks :) I'm rebuilding our old compiler with the patch and will double check how things go on our original failing

Re: [PATCH][ARM] NEON DImode neg

2012-04-12 Thread Andrew Stubbs
On 12/04/12 16:48, Richard Earnshaw wrote: If negation in Neon needs a scratch register, it seems to me to be somewhat odd that we're disparaging the ARM version. Good point, I'm really meaning to provide missing functionality in NEON to prevent unnecessary moves, rather than cause them, so I

Re: [PATCH][ARM] NEON DImode neg

2012-04-12 Thread Richard Earnshaw
On 12/04/12 17:16, Andrew Stubbs wrote: On 12/04/12 16:48, Richard Earnshaw wrote: If negation in Neon needs a scratch register, it seems to me to be somewhat odd that we're disparaging the ARM version. Good point, I'm really meaning to provide missing functionality in NEON to prevent

Re: [PATCH] Fix PR18589

2012-04-12 Thread H.J. Lu
On Thu, Apr 5, 2012 at 6:49 AM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: On Thu, 2012-04-05 at 11:23 +0200, Richard Guenther wrote: On Wed, Apr 4, 2012 at 9:15 PM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: Unfortunately this seems to be necessary if I name the two

Re: [PATCH] Caret diagnostics

2012-04-12 Thread Tom Tromey
Gaby == Gabriel Dos Reis g...@integrable-solutions.net writes: Manuel So, in fact, libcpp is buggy for not implementing this (as can be seen Manuel in emacs). If/When libcpp is fixed, the column info will be correct Manuel for tabs. And then, one may care about printing tabs as anything Manuel

Re: [PATCH] Caret diagnostics

2012-04-12 Thread Gabriel Dos Reis
On Thu, Apr 12, 2012 at 11:53 AM, Tom Tromey tro...@redhat.com wrote: Gaby == Gabriel Dos Reis g...@integrable-solutions.net writes: Manuel So, in fact, libcpp is buggy for not implementing this (as can be seen Manuel in emacs). If/When libcpp is fixed, the column info will be correct Manuel

Re: [PATCH] Fix PR18589

2012-04-12 Thread William J. Schmidt
On Thu, 2012-04-12 at 09:50 -0700, H.J. Lu wrote: On Thu, Apr 5, 2012 at 6:49 AM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: On Thu, 2012-04-05 at 11:23 +0200, Richard Guenther wrote: On Wed, Apr 4, 2012 at 9:15 PM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote:

Re: [RS6000] Stack tie fix.

2012-04-12 Thread Olivier Hainque
On Apr 12, 2012, at 18:07 , Olivier Hainque wrote: I'm rebuilding our old compiler with the patch and will double check how things go on our original failing case. All is well :) Thanks Alan!

Re: [PATCH] Dissociate store_expr's temp from exp so that it is not marked as addressable

2012-04-12 Thread Eric Botcazou
Well, the commit did not add a testcase and when I looked up the patch in the mailing list archive (http://gcc.gnu.org/ml/gcc-patches/2006-11/msg01449.html) it said it was fixing problems not reproducible on trunk so it's basically impossible for me to evaluate whether it is still necessary

Re: Phone call (was Re: Armhf dynamic linker path)

2012-04-12 Thread Mike Frysinger
On Thursday 12 April 2012 02:05:23 Jakub Jelinek wrote: On Thu, Apr 12, 2012 at 11:22:13AM +1200, Michael Hope wrote: All good. My vote is for /lib/ld-arm-linux-gnueabihf.so.3 as it: The directory should be /libhf/ or /libhfp/ for that for consistency with all the other architectures. i

Re: Phone call (was Re: Armhf dynamic linker path)

2012-04-12 Thread Mike Frysinger
On Thursday 12 April 2012 03:47:29 Jakub Jelinek wrote: On Thu, Apr 12, 2012 at 10:33:08AM +0300, Riku Voipio wrote: On 12 April 2012 09:05, Jakub Jelinek ja...@redhat.com wrote: On Thu, Apr 12, 2012 at 11:22:13AM +1200, Michael Hope wrote: All good. My vote is for

Re: Phone call (was Re: Armhf dynamic linker path)

2012-04-12 Thread Jakub Jelinek
On Thu, Apr 12, 2012 at 01:49:16PM -0400, Mike Frysinger wrote: ia64 installs in /lib, because it isn't a multilibbed architecture. because distros choose not to support it. in first gen chips, there was hardware support for running x86. so if we were to be strict, there should have

Re: [i386, patch, RFC] HLE support in GCC

2012-04-12 Thread Torvald Riegel
On Thu, 2012-04-12 at 18:13 +0400, Kirill Yukhin wrote: I would suggest that we keep the HLE acq/rel bits independent of the memory order bits. Both are independent on a conceptual level. And we should add documentation that tells programmers that memory orders need always be specified.

[steve.mcint...@linaro.org: Phone call (was Re: Armhf dynamic linker path)]

2012-04-12 Thread Steve McIntyre
Getting bounces from this message. Let's try again. - Forwarded message from Steve McIntyre steve.mcint...@linaro.org - From: Steve McIntyre steve.mcint...@linaro.org Date: Wed, 11 Apr 2012 23:37:55 +0100 To: cross-dis...@lists.linaro.org Cc: Adam Conrad adcon...@debian.org,

[PATCH, i386]: Fix PR 52932 - _mm256_permutevar8x32_ps and _mm256_permutevar8x32_ps

2012-04-12 Thread Uros Bizjak
Hello! Attached patch fixes issues around AVX2 vpermps and vpermd instructions. 1. Changes second argument of _mm256_permutevar8x32_ps to __m256i type and consequently changes second argument of __builtin_ia32_permvarsf256 argument to __v8si type. 2. Changes avx2_permvarv2sf pattern to accept

libstdc++-v3: Run prettyprinters.exp

2012-04-12 Thread Andreas Schwab
prettyprinters.exp is never run except in non-parallel check or when requested explicitly. Tested on powerpc-linux and checked in as obvious. Andreas. 2012-04-12 Andreas Schwab sch...@linux-m68k.org * testsuite/Makefile.am (check_DEJAGNUnormal0): Run prettyprinters.exp.

Re: libstdc++-v3: Run prettyprinters.exp

2012-04-12 Thread Paolo Carlini
Hi, prettyprinters.exp is never run except in non-parallel check or when requested explicitly. Tested on powerpc-linux and checked in as obvious. Thanks Andreas. Since you seem to pay good attention to these testing details, I wonder if you could also help with the issue I noticed again

Re: [PATCH] PR c++/50852 - loose template parameter comparison

2012-04-12 Thread Jason Merrill
Sorry for the delay in getting back to you on this; I just keep thinking there has to be a better way to deal with this issue than this increasingly complex fixup machinery. The basic problem we're dealing with is that two typedefs from different contexts are considered identical for the

[google/google-main] Fix regression - SUBTARGET_EXTRA_SPECS overridden by LINUX_GRTE_EXTRA_SPECS (issue 6016047)

2012-04-12 Thread shenhan
Reviewers: asharif1, jingyu, Diego Novillo, Message: Hi, the newest chrome gcc (from google-main) fails to linking anything, by looking into specs file, it seems that 'link_emulation' section is missing in specs. The problem I found is that SUBTARGET_EXTRA_SPECS, which is not empty for

Re: [PATCH] Fix PR18589

2012-04-12 Thread William J. Schmidt
On Thu, 2012-04-12 at 09:50 -0700, H.J. Lu wrote: On Thu, Apr 5, 2012 at 6:49 AM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: On Thu, 2012-04-05 at 11:23 +0200, Richard Guenther wrote: On Wed, Apr 4, 2012 at 9:15 PM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote:

Re: libstdc++-v3: Run prettyprinters.exp

2012-04-12 Thread Andreas Schwab
Paolo Carlini pcarl...@gmail.com writes: Since you seem to pay good attention to these testing details, I wonder if you could also help with the issue I noticed again over the last days with make check-performance not actually doing much if make check isn't run before. I bet a fix would turn

[PR tree-optimization/52558]: RFC: questions on store data race

2012-04-12 Thread Aldy Hernandez
Here we have a testcase that affects both the C++ memory model and transactional memory. [Hans, this is caused by the same problem that is causing the speculative register promotion issue you and Torvald pointed me at]. In the following testcase (adapted from the PR), the loop invariant

Re: libstdc++-v3: Run prettyprinters.exp

2012-04-12 Thread Paolo Carlini
On 04/12/2012 11:43 PM, Andreas Schwab wrote: Paolo Carlinipcarl...@gmail.com writes: Since you seem to pay good attention to these testing details, I wonder if you could also help with the issue I noticed again over the last days with make check-performance not actually doing much if make

Re: Support for Runtime CPU type detection via builtins (issue5754058)

2012-04-12 Thread Sriraman Tallam
Ping. On Tue, Apr 3, 2012 at 12:47 PM, Sriraman Tallam tmsri...@google.com wrote: Hi, i386 maintainers -  Is this patch ok? Thanks, -Sri. On Mon, Apr 2, 2012 at 5:48 PM, Sriraman Tallam tmsri...@google.com wrote: On Mon, Apr 2, 2012 at 5:38 AM, Richard Guenther

[v3] hashtable aliases

2012-04-12 Thread Benjamin De Kosnik
, and necessitated the restructuring of type definitions in the _Hashtable. I think the current form allows some nice advantages in terms of nested types and expressiveness. tested x86/linux tested x86/linux -debug -benjamin 20120412-334.patch.bz2 Description: application/bzip