Re: [PATCH][GIMPLE FE] Split out parser into separate file

On Tue, Oct 25, 2016 at 03:33:36PM +0200, Richard Biener wrote: > > Hi, > > so I did the massaging to split out the GIMPLE parsing routines out > to a separate file (quite tricky to get the gengtype issues correctly > so I thought to help out here and get things started). actually it looks like

[PATCH] fix an uninitialized use of loc when parsing gimple switches

From: Trevor Saunders gcc/c/ChangeLog: 2016-10-27 Trevor Saunders * gimple-parser.c (c_parser_gimple_switch_stmt): Fix uninitialized use of loc. --- gcc/c/gimple-parser.c | 6 +++--- 1 file changed, 3 insertions(+), 3

[PATCH, Fortran] DEC Compatibility: Default missing exponents to 0 with -fdec

All, Attached is a patch to the GNU Fortran front-end and runtime library (libgfortran) which accepts real numbers with missing exponents as if '0' was given as the exponent when the compile flag -fdec is given, for further compatibility with legacy compilers. By default, GNU Fortran will reject

Re: [PATCH v2][AArch32][NEON] Implementing vmaxnmQ_ST and vminnmQ_ST intrinsincs.

Hi Christophe, Here's the updated patch. Cheers, Tamar From: Christophe Lyon Sent: Wednesday, October 19, 2016 11:23:56 AM To: Tamar Christina Cc: GCC Patches; Kyrylo Tkachov; nd Subject: Re: [PATCH v2][AArch32][NEON]

Fix stormy16 WRT sprintf warnings

[ There's at least one more port that has the exact same problem. ] stormy16's ctor/dtor output routines have this: char buf[16]; sprintf (buf, ".ctors.%.5u", /* Invert the numbering so the linker puts us in the proper order; constructors are run from

Fix microblaze port WRT fallthru

Just tweaking a fallthru comment. Installing on the trunk. Jeff commit b357502f77b0f6fbc79e216479bee47eab1741a8 Author: law Date: Wed Oct 26 15:52:41 2016 + * config/microblaze/microblaze.c (microblaze_function_arg): Adjust

Re: [PATCHv2 2/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

On 26/10/16 17:28, Andre Vieira (lists) wrote: On 26/10/16 10:33, Kyrill Tkachov wrote: +static tree +arm_handle_cmse_nonsecure_entry (tree *node, tree name, + tree /* args */, + int /* flags */, + bool *no_add_attrs) +{ + tree fndecl; + + if

Re: [PATCHv2 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

Hi Andre, On 25/10/16 17:29, Andre Vieira (lists) wrote: On 24/08/16 12:01, Andre Vieira (lists) wrote: On 25/07/16 14:23, Andre Vieira (lists) wrote: This patch extends support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute to safeguard against leak of information

[patch,testsuite] Support dg-require-effective-target label_offsets.

There are targets that support taking values of labels but where any arithmetic on such values might produce garbage. This patch introduces new dg-require-effective-target label_offsets which is a subset of label_values, and adjusts respective test cases to the more restricted predicate.

Re: [PATCH, ARM 3/7, ping3] Refactor atomic compare_and_swap to make it fit for ARMv8-M Baseline

Hi Thomas, On 24/10/16 09:05, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 14/10/16 14:50, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 03/10/16 17:44, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 22/09/16 14:44, Thomas Preudhomme wrote: Hi, This patch

[PATCH] DWARF5 - Emit DW_AT_rank and DW_TAG_generic_subrange for assumed-rank arrays

Hi! The following patch starts emitting another new DWARF5 feature - DW_AT_rank and DW_TAG_generic_subrange for Fortran assumed-rank arrays. Unlike DW_TAG_subrange_type, the expressions in DW_TAG_generic_subrange attributes have a magic 0 to rank-1 values pushed onto the DWARF stack first; rather

Re: [PATCH, wwwdocs] Add link to GCC 7 changes.html

On 10/25/16 12:50 PM, Peter Bergner wrote: > On 10/25/16 12:17 PM, Gerald Pfeifer wrote: >> Perhaps add a disclaimer at the top of changes.html that this >> is still work in progress as part of that commit? > > Do you mean like the following? If so, we'd have to remember to remove > the last

And now for the cr16

Clearly a desired fallthru in cr16_pritn_operand handling of 'g'. Shortly thereafter there's another fallthru, but AFAICT it shouldn't ever happen. I've added a gcc_unreachable in that case. Installing on the trunk. Jeff commit 24e65f049fd63325296b4172fc175633a2cde8d0 Author: law

Re: [PATCHv2 2/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

On 26/10/16 10:33, Kyrill Tkachov wrote: > > +static tree > +arm_handle_cmse_nonsecure_entry (tree *node, tree name, > + tree /* args */, > + int /* flags */, > + bool *no_add_attrs) > +{ > + tree fndecl; > + > + if (!use_cmse) > +{ > +

Fix ARC port WRT fallthru and sprintf warnings

The usuall fallthru and sprintf stuff. These required a bit more thought, but nothing terribly taxing. Installing on the trunk. jeff commit 7227c03164300c5f5188a1261b3c57f0b7072394 Author: law Date: Wed Oct 26 16:33:22 2016 + *

Re: [PATCH] Introduce class rtx_writer

On 10/26/2016 04:10 PM, David Malcolm wrote: The following patch moves various global state in print-rtl.c into a new "rtx_writer" class, giving us a place to stash additional state relating to dumping (and the possibility of putting extra setup/cleanup in ctor/dtor). I didn't bother renaming

Re: [PATCH GCC][1/4]Simplify (convert1 (minmax ((convert2 (x) c)))) into minmax (x c)

On Wed, 26 Oct 2016, Bin.Cheng wrote: On Wed, Oct 26, 2016 at 3:10 PM, Bin.Cheng wrote: On Wed, Oct 26, 2016 at 3:04 PM, Marc Glisse wrote: On Wed, 26 Oct 2016, Bin.Cheng wrote: Thanks for reviewing, updated patch attached. Is it OK? +/*

[PATCH] Add recursive_directory_iterator::pop(error_code&)

Another Filesystem TS change, implementing LWG 2706. * include/experimental/bits/fs_dir.h (recursive_directory_iterator): Overload pop (LWG 2706). * src/filesystem/dir.cc (recursive_directory_iterator::pop): Define new overload. *

Re: [PATCH] Add recursive_directory_iterator::pop(error_code&)

On 26/10/16 16:19 +0100, Jonathan Wakely wrote: Another Filesystem TS change, implementing LWG 2706. * include/experimental/bits/fs_dir.h (recursive_directory_iterator): Overload pop (LWG 2706). * src/filesystem/dir.cc (recursive_directory_iterator::pop): Define

Fix msp430 port WRT fallthru

This patch just tweaks a comment so that we no longer warn. Installing on the trunk. Jeff commit 7aa35b20124373889e039a054076dd8d5288c9e2 Author: law Date: Wed Oct 26 15:49:25 2016 + * config/msp430/msp430.c

Fix fr30 WRT fallthru

Exact same code as in another port. Just adjusting the comment so we don't warn on a desired fallthru. Installing on the trunk. Jeff commit f1203ee28fdad66269ad0d0b761629f50dc3449b Author: law Date: Wed Oct 26 16:19:55 2016 + *

Re: [PATCH, Fortran] DEC Compatibility: Logical operations on integers become bitwise ops with -fdec

On Okt 26 2016, Fritz Reese wrote: > I can't seem to reproduce this on x86-64. Did you fully apply the > patch? I don't have any patches. Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And

Fix rl78 port WRT fallthru and sprintf warnings

rl78_calclate_death_nodes, with one exception wants to treat JUMP_INSNs and CALL_INSNs the same. Naturally it's implemented with a case statement like case JUMP_INSN: case CALL_INSN: We're just missing the fallthru comment to silence the warning. Like the stormy16, rl78

Fix mcore WRT fallthru

And similarly for mcore. Installing on the trunk. Jeff commit 71ab5ec1fc6e513112580bfe9c14a6cc1a2ad649 Author: law Date: Wed Oct 26 15:59:34 2016 + * config/mcore/mcore.c (mcore_gen_compare): Adjust fallthru comments.

FIx m32r port WRT fallthru

And the same for m32r. Again, it's got the fallthru marked, just not in a way we handle. Installing on the trunk. Jeff commit 024d7f4c44ddf36bf76658937abf9da039228ce8 Author: law Date: Wed Oct 26 16:02:58 2016 + * config/m32r/m32r.c

FIx iq2000 WRT fallthru

So the comment change in iq2000_function_arg is trivial. expand_one_builtin is pretty obvious once you look at the code. We're currently falling through from the zero-operand case to the one operand case. That results in reading from op[0], which is almost certainly wrong. So rather than

Fix frv port WRT fallthru

We will return garbage from comparison_string in the event of an error in an ASM due to unintentional fallthru. My first through was to have output_operand_lossage declared as non-returning, but returning in the case of a user ASM is what it's designed to do AFAICT. So we just avoid the

Re: [PATCH, ARM 4/7, ping3] Adapt atomic compare and swap to ARMv8-M Baseline

Hi Thomas, On 24/10/16 09:05, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 14/10/16 14:50, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 03/10/16 17:45, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 22/09/16 14:46, Thomas Preudhomme wrote: Hi, This patch

[PATCH] Fix build problem with eCos/newlib (PR 78110)

Hi, this patch avoids including malloc.h in free standing builds with eCos/newlib, and declares the memalign directly. Successfully built a cross compiler for eCos. Is it OK for trunk? Thanks Bernd. 2016-10-26 Bernd Edlinger * libsupc++/new_opa.cc: Don't

Re: [PATCHv2 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 26/10/16 13:51, Kyrill Tkachov wrote: > Hi Andre, > > On 25/10/16 17:29, Andre Vieira (lists) wrote: >> On 24/08/16 12:01, Andre Vieira (lists) wrote: >>> On 25/07/16 14:23, Andre Vieira (lists) wrote: This patch extends support for the ARMv8-M Security Extensions

Re: [PATCH GCC][1/4]Simplify (convert1 (minmax ((convert2 (x) c)))) into minmax (x c)

On Wed, Oct 26, 2016 at 3:10 PM, Bin.Cheng wrote: > On Wed, Oct 26, 2016 at 3:04 PM, Marc Glisse wrote: >> On Wed, 26 Oct 2016, Bin.Cheng wrote: >> >>> Thanks for reviewing, updated patch attached. Is it OK? >> >> >> +/* (convert (minmax ((convert

Re: [RFA] Patch to allow SPU port to build with current trunk

On 10/26/2016 01:34 AM, Ulrich Weigand wrote: Jeff Law wrote: First, there's a missing fallthru comment in spu_sched_reorder for TYPE_LOAD/TYPE_STORE cases. If I'm reading the SPU docs properly a load/store insn is handled by pipe_1 and we're also trying to model some aspects of the

Re: Add uniform_inside_sphere_distribution

On 10/26/2016 05:01 AM, Jonathan Wakely wrote: On 25/10/16 08:20 -0400, Ed Smith-Rowland wrote: +explicit +param_type(_RealType __radius = _RealType(1)) +: _M_radius(__radius) +{ + _GLIBCXX_DEBUG_ASSERT(_M_radius > _RealType(0)); Nowadays we're able to do cheaper

[committed] Fix OpenMP implicit map fortran ICE (PR fortran/77973)

Hi! The Fortran omp_finish_clause langhook can add OMP_CLAUSE_MAP clauses with VAR_DECL OMP_CLAUSE_SIZE (or change one with constant into non-constant one), if that appears in another OpenMP region, we need to notice the variables there so that they can be properly shared/firstprivatized etc.

Fix epiphany WRT fallthru

And the same code again, this time in the epiphany port... Installing on the trunk. Jeff commit c4bc8d8761d31e34e26958bbc3c33f371690edf2 Author: law Date: Wed Oct 26 16:23:27 2016 + * config/epiphany/epiphany.c (epiphany_print_operand):

Re: [PATCH GCC][1/4]Simplify (convert1 (minmax ((convert2 (x) c)))) into minmax (x c)

On Wed, Oct 26, 2016 at 3:04 PM, Marc Glisse wrote: > On Wed, 26 Oct 2016, Bin.Cheng wrote: > >> Thanks for reviewing, updated patch attached. Is it OK? > > > +/* (convert (minmax ((convert (x) c -> minmax (x c) if x is promoted > + and the outer convert demotes the

Fix PA buglet with sprintf formatting

If we have enough thunks we could potentially overwrite the output buffer in pa_asm_output_mi_thunk: ASM_GENERATE_INTERNAL_LABEL (label, "LTHN", current_thunk_number); In reality we're unlikely to get enough thunks to cause a problem, but fixing this is easy by just increasing the

Fix m32c WRT fallthrus

In encode_pattern_1, we stuff the 'm' into the pattern for the memory operand, then want to recurse on the address. So A fallthru seems reasonable. In m32c_legitimate_address_p we have a special case for certain registers, but which does not apply to A0. So we've got case ... case

Re: [PATCHv2 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 26/10/16 17:26, Andre Vieira (lists) wrote: On 26/10/16 13:51, Kyrill Tkachov wrote: Hi Andre, On 25/10/16 17:29, Andre Vieira (lists) wrote: On 24/08/16 12:01, Andre Vieira (lists) wrote: On 25/07/16 14:23, Andre Vieira (lists) wrote: This patch extends support for the ARMv8-M Security

Re: [PATCH] Fix build problem with eCos/newlib (PR 78110)

On 26/10/16 16:26 +, Bernd Edlinger wrote: * libsupc++/new_opa.cc: Don't include in a free standing environmnet. Declare memalign directly in that case. Typo "environmnet". OK for trunk, thanks. We might actually want to avoid in other cases, as some systems have a

Re: [PATCH, Fortran] DEC Compatibility: Logical operations on integers become bitwise ops with -fdec

On Wed, Oct 26, 2016 at 10:32 AM, Andreas Schwab wrote: > On Okt 26 2016, Fritz Reese wrote: > >> I can't seem to reproduce this on x86-64. Did you fully apply the >> patch? > > I don't have any patches. > Sorry for the confusion, I meant the originally

Fix nios2 port WRT fallthru

Inserts a suitable return rather than falling through. Installing on the trunk. Jeff commit 7a2cc4bd5ebbc3133fa1c89320ca82bb4b3b4a71 Author: law Date: Wed Oct 26 15:47:48 2016 + * config/nios2/nios2.c (nios2_rtx_costs): Avoid

Re: [PATCH] PR78056: Fix build failure on Power7

On Wed, Oct 26, 2016 at 08:57:11AM -0500, Bill Schmidt wrote: > On Oct 26, 2016, at 8:29 AM, Segher Boessenkool > wrote: > > > > So, you do not want to create the builtins that we expand to machine insns > > that are not supported with the -mcpu= (or other flags) in

Re: [PATCH, Fortran] DEC Compatibility: Logical operations on integers become bitwise ops with -fdec

On Okt 26 2016, Fritz Reese wrote: > If so, I am not sure how to narrow down the issue without more debug > info like a traceback or memory dump at the point of error. Tell me more, I don't know anything about fortran. Andreas. -- Andreas Schwab, SUSE Labs,

Re: [PATCH GCC][1/4]Simplify (convert1 (minmax ((convert2 (x) c)))) into minmax (x c)

On Wed, Oct 26, 2016 at 4:05 PM, Marc Glisse wrote: > On Wed, 26 Oct 2016, Bin.Cheng wrote: > >> On Wed, Oct 26, 2016 at 3:10 PM, Bin.Cheng wrote: >>> >>> On Wed, Oct 26, 2016 at 3:04 PM, Marc Glisse >>> wrote: On Wed,

Trivial H8 fallthru comment fix

This fixes problems building the H8 port with the current trunk. Just a trivial fix to the format of a fallthru comment. Installed on the trunk. Jeff commit 356e50be8376f57e4f872ebc5a67b5ed41c98ab7 Author: law Date: Wed Oct 26 15:20:33 2016 +

Re: [PATCH], Allow SImode to go into VSX registers on PowerPC ISA 2.07 (power8) and above

I forgot to mention, I will be working on a follow-on patch to this that enables QImode and HImode to go in the vector registers for ISA 3.0, since ISA 3.0 now adds load (with zero extend) and store instructions for those types. I probably also will update vector extract for the case where the

[RFC PATCH] expand_strn_compare should attempt expansion even if neither string is constant

I'm currently working on a builtin expansion of strncmp for powerpc similar to the one for memcmp I checked recently. One thing I encountered is that the code in expand_strn_compare will not attempt to expand the cmpstrnsi pattern at all if neither string parameter is a constant string. This

[PATCH], Allow SImode to go into VSX registers on PowerPC ISA 2.07 (power8) and above

PowerPC GCC has traditionally only allowed DImode to go into FPR registers (and now VSX registers) in order to allow floating point conversions. Conversions to/from SImode have always had to deal with special UNSPECs to allow the generation of the LFIWAX, LXSIWAX, LFIWZX, LXSIWZX, STFIWX, and

Re: [PATCH 7/7] make targetm.gen_ccmp{first,next} take rtx_insn **

On Tue, Oct 18, 2016 at 01:25:55PM +0200, Bernd Schmidt wrote: > On 10/17/2016 09:46 PM, tbsaunde+...@tbsaunde.org wrote: > > From: Trevor Saunders > > > > gcc/ChangeLog: > > > > 2016-10-17 Trevor Saunders > > > > * ccmp.c

Re: [PATCH] sched: Do not reorder RTX_FRAME_RELATED_P insns (PR78029)

On 10/26/2016 07:27 PM, Segher Boessenkool wrote: On Wed, Oct 26, 2016 at 03:13:06PM +0200, Bernd Schmidt wrote: On 10/26/2016 03:05 PM, Segher Boessenkool wrote: 2) We do not necessarily have all notes yet, if the port lets dwarf2cfi create notes by itself. Most (or even all?) ports do.

Re: [PATCH, wwwdocs] Add link to GCC 7 changes.html

On Tue, 25 Oct 2016, Peter Bergner wrote: >> Perhaps add a disclaimer at the top of changes.html that this >> is still work in progress as part of that commit? > Do you mean like the following? If so, we'd have to remember to > remove the last hunk when GCC 7 is released. Yep, something like

[PATCH] Show INSN_UIDs in compact mode

On Thu, 2016-10-20 at 16:11 +0200, Bernd Schmidt wrote: > On 10/20/2016 03:55 PM, David Malcolm wrote: > > Currently the jump insn in question looks like this: > > > > (cjump_insn (set (pc) > > (label_ref 20)) > > (nil)) > > > > With explicit INSN_UIDs

Re: [PATCH] Show INSN_UIDs in compact mode

On 10/26/2016 08:50 PM, David Malcolm wrote: The following patch adds back in the INSN_UID for all insns. Successfully bootstrapped on x86_64-pc-linux-gnu. OK for trunk? Yes. Bernd

[PATCH, gcc/ARM] Add support for Cortex-M33

Hi, This patch adds support for the Cortex-M33 processor launched by ARM [1]. The patch adds support for the name and wires it up to the ARMv8-M Mainline with DSP extensions architecture and arm_v7m_tune tuning parameters for the time being. It also updates documentation to mention this new

[PATCH, gcc/ARM] Add support for Cortex-M23

Hi, This patch adds support for the Cortex-M23 processor launched by ARM [1]. The patch adds support for the name and wires it up to the ARMv8-M Baseline architecture and arm_v6m_tune tuning parameters for the time being. It also updates documentation to mention this new processor. [1]

Re: [patch,testsuite] Support dg-require-effective-target label_offsets.

On 10/26/2016 04:46 PM, Georg-Johann Lay wrote: +if { [istarget avr-*-*] } { + # If the value of a label does not fit into 16 bits, the linker + # will generate a stub (containing a direct jump) and we end up + # with the address of the stub instead of the address of the

Re: [PATCH] sched: Do not reorder RTX_FRAME_RELATED_P insns (PR78029)

On Wed, Oct 26, 2016 at 03:13:06PM +0200, Bernd Schmidt wrote: > On 10/26/2016 03:05 PM, Segher Boessenkool wrote: > >2) We do not necessarily have all notes yet, if the port lets dwarf2cfi > >create notes by itself. Most (or even all?) ports do. > > Hmm. Are you recording the insns in

[PATCH] PR target/78098: Properly handle interrupt/no_caller_saved_registers attributes

Functions with interrupt or no_caller_saved_registers attribute should have different function pointer types from those without the attribute since they require different prologue and epilogue. 2 functions with different interrupt or no_caller_saved_registers attribute, which are otherwise

[RFC PATCH] avoid printing type suffix with %E

When formatting an integer constant using the %E directive GCC includes a suffix that indicates its type. This can perhaps be useful in some situations but in my experience it's distracting and gets in the way when writing tests. Here's an example: $ cat b.c && gcc b.c constexpr

[PATCH VECT]Swap operands for cond_reduction when necessary

Hi, For stmt defining reduction, GCC vectorizer assumes that the reduction variable is always the last (second) operand. Another fact is that vectorizer doesn't swap operands for cond_reduction during analysis stage. The problem is GCC middle-end may canonicalize cond_expr into a form that

Missed hunk in microblaze.c changes

This should have been in the microblaze.c changes, but was missed. Essentially it had a fallthru path, but using fallthru didn't really simplify the code in a meaningful way. So I just added the return to avoid the fallthru path. Installed on the trunk. Jeff commit

Fix MIPS port WRT sprintf and fallthru warnings

The fallthrus in mips16_constant_cost are pretty obvious. One buffer overflow in mips16_build_call_stub and one obvious fallthru comment adjustment in mips16_build_call_stub. The usual stuff. Installing. jeff commit c03f0de027e1079edd02e3494601c6def50dbac1 Author: law

Re: [PATCH, wwwdocs] Add link to GCC 7 changes.html

On 10/26/16 1:10 PM, Gerald Pfeifer wrote: On Tue, 25 Oct 2016, Peter Bergner wrote: Perhaps add a disclaimer at the top of changes.html that this is still work in progress as part of that commit? Do you mean like the following? If so, we'd have to remember to remove the last hunk when GCC 7

Fix sh port WRT fallthru

This adjusts existing fallthru comments and adds some new ones. I couldn't convince myself the original code in movsicc was correct, It looks like we properly reverse the condition, but not the operands in the case of LT/LE/LEU/LTU. But then we do almost the same th ing in

[PR debug/77773] segfault when compiling __simd64_float16_t with -g

The following one-liner segfaults on arm-eabi when compiled with -mfloat-abi=hard -g: __simd64_float16_t usingit; The problem is that the pretty printer (in simple_type_specificer()) is dereferencing a NULL result from c_common_type_for_mode: int prec = TYPE_PRECISION (t);

Re: Add uniform_inside_sphere_distribution

On 25/10/16 08:20 -0400, Ed Smith-Rowland wrote: + explicit + param_type(_RealType __radius = _RealType(1)) + : _M_radius(__radius) + { + _GLIBCXX_DEBUG_ASSERT(_M_radius > _RealType(0)); Nowadays we're able to do cheaper assertions when _GLIBCXX_ASSERTIONS is

Re: [PATCHv2 1/7, GCC, ARM, V8M] Add support for ARMv8-M's Secure Extensions flag and intrinsics

Hi Andre, thanks for resending them. On 25/10/16 17:26, Andre Vieira (lists) wrote: On 24/08/16 12:00, Andre Vieira (lists) wrote: On 25/07/16 14:19, Andre Vieira (lists) wrote: This patch adds the support of the '-mcmse' option to enable ARMv8-M's Security Extensions and supports the

Re: [RFA] Patch to allow SPU port to build with current trunk

Jeff Law wrote: > First, there's a missing fallthru comment in spu_sched_reorder for > TYPE_LOAD/TYPE_STORE cases. If I'm reading the SPU docs properly a > load/store insn is handled by pipe_1 and we're also trying to model some > aspects of the load-store unit. So we should be setting

Re: [PATCH] 77864 Fix noexcept conditions for map/set default constructors

On 25/10/16 21:55 +0200, François Dumont wrote: Indeed, here is the simplified patch. But I will come back to this base type for the next patch to generalize the defaulted constructors and assignment operators. Tested under Linux x86_64, ok to commit ? OK for trunk, thanks.

[ping * 3] PR35503 - warn for restrict

Pinging patch: https://gcc.gnu.org/ml/gcc-patches/2016-10/msg01545.html Thanks, Prathamesh

Re: [RFC] Speed-up -fprofile-update=atomic

On Tue, Oct 25, 2016 at 4:31 PM, Martin Liška wrote: > On 10/24/2016 03:51 PM, Richard Biener wrote: > >> It's quite ad-hoc :/ The IFN will also be a memory optimization >> barrier unless you add special support >> for it in the alias oracle - so the performance measurement needs

[PATCH][GIMPLE FE] Simplify middle-end changes

The following patch removes the partial support present for "pass list", thereby simplifying the middle-end changes, isolating them to execute_one_pass plus a field in struct function (plus the SSA name allocation support). Tested on x86_64-unknown-linux-gnu, a bootstrap is in progress. Will

Re: [PATCHv2 2/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

Hi Andre, On 25/10/16 17:28, Andre Vieira (lists) wrote: On 24/08/16 12:00, Andre Vieira (lists) wrote: On 25/07/16 14:21, Andre Vieira (lists) wrote: This patch adds support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute. In this patch we implement the attribute

Re: RFC [1/3] divmod transform v2

On 25 October 2016 at 18:47, Richard Biener wrote: > On Tue, 25 Oct 2016, Prathamesh Kulkarni wrote: > >> On 25 October 2016 at 16:17, Richard Biener wrote: >> > On Tue, 25 Oct 2016, Prathamesh Kulkarni wrote: >> > >> >> On 25 October 2016 at 13:43, Richard

Re: [PATCH, Fortran] DEC Compatibility: Logical operations on integers become bitwise ops with -fdec

On Okt 25 2016, Fritz Reese <fritzore...@gmail.com> wrote: > * dec_bitwise_ops_1.f90, dec_bitwise_ops_2.f90: New testcases. I'm getting these errors on ia64: FAIL: gfortran.dg/dec_bitwise_ops_1.f90 -O0 (test for excess errors) Excess errors: /usr/local/gcc/gcc-20161026/gcc/

[PATCH][GIMPLE FE] Guard dump changes with TDF_GIMPLE (-gimple)

This adds a dump modifier, -gimple (TDF_GIMPLE) and guards the dumping changes with it (in the case of dump_function_header simply not calling it). It also adjusts label dumping in another place (when dumping switch statements which btw do not yet parse correctly it seems). Tested on

Re: RFC [1/3] divmod transform v2

On Wed, 26 Oct 2016, Prathamesh Kulkarni wrote: > On 25 October 2016 at 18:47, Richard Biener wrote: > > On Tue, 25 Oct 2016, Prathamesh Kulkarni wrote: > > > >> On 25 October 2016 at 16:17, Richard Biener wrote: > >> > On Tue, 25 Oct 2016, Prathamesh

Re: [PATCH] Five patches for std::experimental::filesystem

Hi Jonathan, On 25 October 2016 at 17:32, Jonathan Wakely wrote: > Two more fixes for the filesystem TS, and improved tests. > > Handle negative times in filesystem::last_write_time > * src/filesystem/ops.cc >(last_write_time(const path&, file_time_type,

[testsuite] Fix linker detection in check_gc_sections_available

When testing gcc on Solaris, configured to use /usr/ccs/bin/ld, but with /usr/gnu/bin/ld in PATH, the gcsec* tests are FAILing: FAIL: g++.dg/eh/gcsec1.C -std=gnu++11 (test for excess errors) WARNING: g++.dg/eh/gcsec1.C -std=gnu++11 compilation failed to produce executable FAIL:

Re: [RFC] Speed-up -fprofile-update=atomic

On Wed, Oct 26, 2016 at 11:28 AM, Richard Biener wrote: > On Tue, Oct 25, 2016 at 4:31 PM, Martin Liška wrote: >> On 10/24/2016 03:51 PM, Richard Biener wrote: >> >>> It's quite ad-hoc :/ The IFN will also be a memory optimization >>> barrier unless

[patch,committed] Work around problem in gen-pass-instances.awk

gen-pass-instances.awk is sensitive to the order in which directives are written down, e.g. in target-pass.def: If a pass that runs first is added first, then the last pass is skipped and not added to pass-instances.def. Work around is to add the 2nd pass before adding the 1st pass...

Re: [PATCH 3/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: __acle_se label and bxns return

Hi Andre, On 25/10/16 17:28, Andre Vieira (lists) wrote: On 25/07/16 14:23, Andre Vieira (lists) wrote: This patch extends support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute in two ways: 1) Generate two labels for the function, the regular function name and one with

Re: [patch,committed] Work around problem in gen-pass-instances.awk

On Wed, Oct 26, 2016 at 11:54:36AM +0200, Georg-Johann Lay wrote: > gen-pass-instances.awk is sensitive to the order in which directives are > written down, e.g. in target-pass.def: If a pass that runs first is added > first, then the last pass is skipped and not added to pass-instances.def. > >

Re: [PATCH] sched: Do not reorder RTX_FRAME_RELATED_P insns (PR78029)

On 10/25/2016 06:57 PM, Segher Boessenkool wrote: This patch makes scheduling not reorder any RTX_FRAME_RELATED_P insns (relative to each other), to fix PR78029. I originally was a bit worried that this would degrade code quality, but it seems to even improve it: more other insns are scheduled

[Patch, fortran] PR78108 Generic type-bound operator conflicts

Dear All, The comment in the patch more than adequately describes how this patch works. The first testcase checks that correctly functioning code is produced, when the spurious error is suppressed, and the second checks that genuine errors are caught. Bootstraps and regtests on FC21/x86_64 - OK

Re: [Patch, fortran] PR78108 Generic type-bound operator conflicts

Hi Paul, looks ok to me. At least I couldn't break it with the most devious codes I could fathom. Ok for trunk and if applicable to gcc-6. - Andre On Wed, 26 Oct 2016 13:28:15 +0200 Paul Richard Thomas wrote: > Dear All, > > The comment in the patch more than

Re: [PATCH] sched: Do not reorder RTX_FRAME_RELATED_P insns (PR78029)

On 10/26/2016 03:05 PM, Segher Boessenkool wrote: 2) We do not necessarily have all notes yet, if the port lets dwarf2cfi create notes by itself. Most (or even all?) ports do. Hmm. Are you recording the insns in prologue_contains etc.? You could add dependencies for a prologue insn following

[PATCH][GIMPLE FE] Fix parsing of switch stmts

This fixes parsing and dumping of switch stmts as well as dumping of PHI nodes in case a src BB has a label. It also fixes PHI lowering (the gsi_remove already does the gsi_next). Tested on x86_64-unknown-linux-gnu. New testcase is /* { dg-do run } */ /* { dg-options "-O -fgimple" } */ int

Re: RFC [2/3] divmod transform v2 - override expand_divmod_libfunc for ARM port

On 16/10/16 07:00, Prathamesh Kulkarni wrote: Hi, This patch overrides expand_divmod_libfunc hook for ARM port. I separated the SImode tests into separate file from DImode tests because certain arm configs (cortex-15) have hardware div insn for SImode but not for DImode, and for that config we

Re: [PATCH] PR78056: Fix build failure on Power7

Hi Kelvin, On Wed, Oct 26, 2016 at 02:41:43PM +0200, Segher Boessenkool wrote: > PR target/78056 > * config/rs6000/rs6000.c (spe_init_builtins): Modify loops to not > define builtin functions from the bdesc_spe_predicates or > bdesc_spe_evsel arrays if the builtin mask is

Re: [PATCH] Five patches for std::experimental::filesystem

On 24/10/16 17:50 +0100, Jonathan Wakely wrote: Make directory iterators become end iterator on error * src/filesystem/dir.cc (open_dir): Return same value for errors whether ignored or not. (_Dir::advance(error_code*, directory_options)): Return false on error.

Re: [C++ PATCH] RFC: implement P0386R2 - C++17 inline variables

On Tue, Oct 25, 2016 at 7:06 PM, Jakub Jelinek wrote: > > I think this patch should fix it, will bootstrap/regtest it now: > Yes, the fails in gdb.cp/member-ptr.exp go away with the patched g++. I run gdb.cp/member-ptr.exp with three different c++ variations, Schedule of

Re: [patch,committed] Work around problem in gen-pass-instances.awk

On Wed, 26 Oct 2016, Jakub Jelinek wrote: > On Wed, Oct 26, 2016 at 11:54:36AM +0200, Georg-Johann Lay wrote: > > gen-pass-instances.awk is sensitive to the order in which directives are > > written down, e.g. in target-pass.def: If a pass that runs first is added > > first, then the last pass is

[PATCH] libstdc++/78111 fix fallback code for filesystem::canonical

The configure test for realpath() is missing a header, and the fallback version of filesystem::canonical() that gets used if realpath() fails was not setting an error. Tested powerpc64le-linux, committed to trunk. commit f36dd7f817590c618884e14433dd70c03334c288 Author: Jonathan Wakely

Re: [PATCHv2 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

Hi Andre, On 25/10/16 17:29, Andre Vieira (lists) wrote: On 24/08/16 12:01, Andre Vieira (lists) wrote: On 25/07/16 14:23, Andre Vieira (lists) wrote: This patch extends support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute to safeguard against leak of information

Re: [PATCHv2 1/7, GCC, ARM, V8M] Add support for ARMv8-M's Secure Extensions flag and intrinsics

On 26/10/16 10:12, Kyrill Tkachov wrote: Hi Andre, thanks for resending them. On 25/10/16 17:26, Andre Vieira (lists) wrote: On 24/08/16 12:00, Andre Vieira (lists) wrote: On 25/07/16 14:19, Andre Vieira (lists) wrote: This patch adds the support of the '-mcmse' option to enable ARMv8-M's

Re: [PATCH][AArch64] Add a SHA1H pattern

On Wed, Oct 26, 2016 at 12:11:44PM +, Wilco Dijkstra wrote: > Add a SHA1H pattern with a V2SI input. This avoids unnecessary > DUPs when using intrinsics like vsha1h_u32 (vgetq_lane_u32 (x, 0)). I think this is incorrect for big endian - element 0 of a vec_select in big-endian for V4SImode

Re: [PATCH] sched: Do not reorder RTX_FRAME_RELATED_P insns (PR78029)

On Wed, Oct 26, 2016 at 02:30:04PM +0200, Bernd Schmidt wrote: > On 10/26/2016 01:19 PM, Segher Boessenkool wrote: > >Separate shrink-wrapping creates this not-all-that-smart code because > >the profile is quite messed up, and spread_components isn't super smart > >to begin with. I'll have a

Re: [PATCH] sched: Do not reorder RTX_FRAME_RELATED_P insns (PR78029)

On 10/26/2016 01:19 PM, Segher Boessenkool wrote: Separate shrink-wrapping creates this not-all-that-smart code because the profile is quite messed up, and spread_components isn't super smart to begin with. I'll have a patch for that soon, but even with it (and also without separate

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