Update profile in gimple-ssa-isolate-paths.c

Hi, while separating an impossible path, we shoud make sure it is seen as cold by profile. Bootstrapped/regtested x86_64-linux, will commit it later today. Honza * gimple-ssa-isolate-paths.c (isolate_path): Set edge leading to path as unlikely; update profile. Index:

[C++ PATCH] tsubst_baselink formatting

Before diving into pr15272 this patch cleans up tsubst_baselink's wonky formatting, and adds a bit of clarity. applied to trunk. nathan -- Nathan Sidwell 2017-06-16 Nathan Sidwell * pt.c (tsubst_baselink): Fix & clarify formatting. Index: pt.c

Re: [PATCH 1/7] [ARC] Add support for naked functions.

* Claudiu Zissulescu [2017-06-01 15:34:51 +0200]: > gcc/ > 2016-12-13 Claudiu Zissulescu > Andrew Burgess > > * config/arc/arc-protos.h (arc_compute_function_type): Change prototype. >

Re: [PATCH, rev 2] PR target/79799, Add vec_insert of V4SFmode on PowerPC ISA 3.0 (power9)

On Fri, Jun 16, 2017 at 02:52:46PM -0500, Segher Boessenkool wrote: > Hi Mike, > > On Thu, Jun 15, 2017 at 10:10:28PM -0400, Michael Meissner wrote: > > +(define_insn_and_split "vsx_set_v4sf_p9" > > + [(set (match_operand:V4SF 0 "gpc_reg_operand" "=wa") > > + (unspec:V4SF > > +

Re: [PATCH] handle bzero/bcopy in DSE and aliasing (PR 80933, 80934)

+static bool +gimple_fold_builtin_bcmp (gimple_stmt_iterator *gsi) +{ + /* Transform bcmp (a, b, len) into memcmp (a, b, len). */ + + gimple *stmt = gsi_stmt (*gsi); + tree a = gimple_call_arg (stmt, 0); + tree b = gimple_call_arg (stmt, 1); + tree len = gimple_call_arg (stmt, 2); + +

Improve force_edge_cold

Hi, force_edge_cold can be more aggressive about propagating zero counts. Honza Bootstrapped/regtested x86_64-linux, will commit it later today. * predict.c (force_edge_cold): Handle declaring edges impossible more aggresively. Index: predict.c

Fix profile update in unrolling

hi, this patch make unroller to update profile slightly beter by updating outgoing probabilities when exit is proved to be taken. Bootstrapped/regtested x86_64-linux, will commit it later today. Honza * tree-ssa-loop-ivcanon.c (remove_exits_and_undefined_stmts): Update profile.

Fix profile update in tail merging

Hi, profile updating in tail merging is completely wrong when profile feedback is missing or 0. This fixes it hopefully reasonably. Bootstrapped/regtested x86_64-linux. Honza * tree-ssa-tail-merge.c (replace_block_by): Fix profile updating. Index: tree-ssa-tail-merge.c

Re: [PATCH 2/7] [ARC] Define ADDITIONAL_REGISTER_NAMES.

* Claudiu Zissulescu [2017-06-01 15:34:52 +0200]: > This macro is needed to be used with -ffixed- option, and inline asm. > > gcc/ > 2017-01-09 Claudiu Zissulescu > > * config/arc/arc.h (ADDITIONAL_REGISTER_NAMES): Define. This

Re: [PATCH 3/7] [ARC] [LRA] Fix tests asm constraints.

* Claudiu Zissulescu [2017-06-01 15:34:53 +0200]: > LRA doesn't like the 'X' constraint as used in our tests, remove it. > > gcc/testsuite > 2017-01-09 Claudiu Zissulescu > > * gcc.target/arc/mulsi3_highpart-1.c: Remove 'X'

Re: [testsuite] Get rid of dg-skip-if etc. default args

On Jun 15, 2017, at 3:49 PM, Rainer Orth wrote: > > It has long bothered me that many calls to dg-skip-if and its companions > dg-xfail-if and dg-xfail-run-if in the testsuite are cluttered with the > unnecessary default arguments ({ "*" } { "" } with and without

Re: [PATCH, rev 2] PR target/79799, Add vec_insert of V4SFmode on PowerPC ISA 3.0 (power9)

Hi Mike, On Thu, Jun 15, 2017 at 10:10:28PM -0400, Michael Meissner wrote: > +(define_insn_and_split "vsx_set_v4sf_p9" > + [(set (match_operand:V4SF 0 "gpc_reg_operand" "=wa") > + (unspec:V4SF > + [(match_operand:V4SF 1 "gpc_reg_operand" "0") > + (match_operand:SF 2

C++ PATCH for c++/80639, ICE with invalid PMF initialization

In this testcase, instantiate_type resolves the overload, but the result is a pointer to the wrong class; we need to then try to convert it to the desired type in order to get the diagnostic we want. Tested x86_64-pc-linux-gnu, applying to trunk and 7. commit

C++ PATCH for c++/80465, ICE with generic lambda and noexcept

We need processing_template_decl to be set when we check TYPE_NOTHROW_P; let's leave it set across a larger section of the function. Tested x86_64-pc-linux-gnu, applying to trunk and 7. commit 91eb4dc35508aec3ea6d9939e49f691ac6c47231 Author: Jason Merrill Date: Fri Jun 16

Re: [PATCH 00/30] [ARM] Reworking the -mcpu, -march and -mfpu options

On Fri, Jun 16, 2017 at 10:11 PM, Richard Earnshaw wrote: > On 13/06/17 18:35, Richard Earnshaw (lists) wrote: >> On 09/06/17 13:53, Richard Earnshaw wrote: >>> >>> During the ARM BoF at the Cauldron last year I mentioned that I wanted >>> to rework the way GCC on

RFC: C++ PATCH for c++/80831, ICE with -fsyntax-only

In this testcase, our c_parse_final_cleanups processing hits a function that never got a cgraph node due to -fsyntax-only. It seems harmless to create one at this point; honza, does that make sense to you? Tested x86_64-pc-linux-gnu. commit ccb40be7f9756533aeb658f092edd17ad0c7814e Author: Jason

C++ PATCH for c++/80174, ICE with partial specialization of member template

My patch for 71747 missed this case; we only want to consider the innermost args in the call to coerce_template_parms, just like in unification and comparison. Tested x86_64-pc-linux-gnu, applying to trunk and 7. commit 33e24de5519e868a915ccee6fcfee362870930f6 Author: Jason Merrill

[PATCH 1/2] i386: Consider Kaby Lake to be equivalent to Skylake

Currently -march=native selects -march=broadwell on Kaby Lake systems, since its model numbers are missing from the switch statement. It falls back to the default case and chooses -march=broadwell because of the presence of the ADX instruction set. gcc/ * config/i386/driver-i386.c

[PATCH 2/2] i386: Assume Skylake for unknown models with clflushopt

gcc/ * config/i386/driver-i386.c (host_detect_local_cpu): Assume skylake for unknown models with clflushopt. --- gcc/config/i386/driver-i386.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index

Re: [PATCH, rev 2] PR target/79799, Add vec_insert of V4SFmode on PowerPC ISA 3.0 (power9)

On Fri, Jun 16, 2017 at 04:30:48PM -0500, Segher Boessenkool wrote: > On Fri, Jun 16, 2017 at 04:26:58PM -0400, Michael Meissner wrote: > > > > + "&& reload_completed" > > > > > > I still don't think it is such a good idea to do all of this not until > > > after reload. It does of course allow

C++ PATCH for c++/81102, wrong error with partial specialization

Two issues here: one, we were failing to look through references when comparing types, so we decided that a function type in a template non-type argument didn't match a reference-to-function type in the type of the non-type parameter. With that fixed, I also needed to move the C++17 non-type auto

C++ PATCH for c++/80614, wrong mangling for C++17 noexcept type

My earlier patch for noexcept types preserved the noexcept in canonicalize_for_substitution, but lost it in write_type. Tested x86_64-pc-linux-gnu, applying to trunk and 7. commit 152635968e18ec06da5308102c4859523c897707 Author: Jason Merrill Date: Fri Jun 16 14:23:54 2017

[Neon intrinsics] Literal vector construction through vcombine is poor

This patch improves code generation for literal vector construction by expanding and exposing the pattern to rtl optimization earlier. The current implementation delays splitting the pattern until after reload which results in poor code generation for the following code: #include "arm_neon.h"

Re: [PATCH 00/30] [ARM] Reworking the -mcpu, -march and -mfpu options

On 13/06/17 18:35, Richard Earnshaw (lists) wrote: > On 09/06/17 13:53, Richard Earnshaw wrote: >> >> During the ARM BoF at the Cauldron last year I mentioned that I wanted >> to rework the way GCC on ARM handles the command line options. The >> problem was that most users, and even many experts,

Re: [PATCH v4, rs6000] gcc mainline, add builtin support for vec_float, vec_float2, vec_floate, vec_floate, builtins

Hi Carl, On Fri, Jun 16, 2017 at 09:23:06AM -0700, Carl Love wrote: > * config/rs6000/rs6000-c.c (altivec_overloaded_builtins[]): Add > definitions for vec_float, vec_float2, vec_floato, > vec_floate built-ins. No [], just the name. > * config/rs6000/rs6000-builtin.def

[PATCH, rs6000] Fix vec_mulo and vec_mule instruction generation

GCC Maintainers: The support for the vec_mulo and vec_mule has yet another bug. For the case of signed/unsigned integer arguments the builtin generates the half word instruction not the word instruction. This patch fixes the issue. The fix has been tested and verified on

Re: [PATCH, rev 2] PR target/79799, Add vec_insert of V4SFmode on PowerPC ISA 3.0 (power9)

On Fri, Jun 16, 2017 at 04:26:58PM -0400, Michael Meissner wrote: > > > + "&& reload_completed" > > > > I still don't think it is such a good idea to do all of this not until > > after reload. It does of course allow you to play tricks with changing > > register mode at will, like you do ;-) >

[PATCH rs6000] Fix for commit 249311

GCC maintainers: Commit r249311 had an error. During the patch review the define expand for VFC_inst was changed to VF_sxddp. I compiled and tested the source after making the change and it seemed fine. However, I missed a couple of changes. It seems that since I didn't remove all the

Re: [PATCH, rs6000] (v3) Fold vector shifts in GIMPLE

On Thu, Jun 15, 2017 at 7:53 PM, Segher Boessenkool wrote: > Hi Will, > > On Tue, Jun 13, 2017 at 02:44:45PM -0500, Will Schmidt wrote: >> I sniff-tested the latest changes on Power8, with good results. Full >> regtest running. OK for trunk? > > This looks good to

Re: [PATCH 07/30] [build] Make sbitmap code available to the driver programs

On Wed, Jun 14, 2017 at 4:35 PM, Richard Earnshaw (lists) wrote: > On 09/06/17 13:53, Richard Earnshaw wrote: >> >> The ARM option parsing code uses sbitmap data structures to manage >> features and upcoming patches will shortly need to use these bitmaps >> within the

Re: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

Tamar Christina writes: > Hi Richard, >> > > +rtx tmp = gen_reg_rtx (SImode); >> > > +aarch64_expand_mov_immediate (tmp, gen_int_mode (ival, >> SImode)); >> > > +tmp = simplify_gen_subreg (HImode, tmp, SImode, 0); >> > >> > This looks wrong for big-endian,

RE: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

> > It doesn't need to, because all HImode CONST_INTs are already legitimate. > You can just use emit_move_insn instead. > Ah right, that's true. > FWIW, the following seems to pass the same tests and avoids the subreg > dance. Just a proof of concept, and I'm not attached to the new iterator

Re: [PING^3][RFC, PATCH][ASAN] Implement dynamic allocas/VLAs sanitization.​

On Wed, 14 Jun 2017, Jakub Jelinek wrote: > Hi! > > So, I've tried to look at > struct __attribute__((aligned (N))) S { char s[N]; }; > > void bar (struct S *, struct S *); > > void > foo (int x) > { > struct S a; > { > struct S b[x]; > bar (, [0]); > } > { > struct S b[x +

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote: > On 14/06/17 10:35, Prakhar Bahuguna wrote: > > The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which > > coprocessor intrinsics are available for the target. If > > __ARM_FEATURE_COPROC is > > undefined, the target does

Re: [PATCH, rs6000] (v2) Fold vector shifts in GIMPLE

On Wed, Jun 14, 2017 at 4:55 PM, Will Schmidt wrote: > On Tue, 2017-06-13 at 10:03 +0200, Richard Biener wrote: >> On Mon, Jun 12, 2017 at 11:56 PM, Will Schmidt >> wrote: >> > Hi, >> > >> > >> > diff --git a/gcc/config/rs6000/rs6000.c

Re: [Patch ARM] Fix PR71778

On Wed, Jun 14, 2017 at 11:21:30AM +0100, Kyrill Tkachov wrote: <...> > That movv2di expander is the one in vec-common.md that ends up calling > neon_make_constant. I wonder why const0_rtx passed its predicate check > (that would require a V2DImode vector of zeroes rather than a const0_rtx).

Re: [PATCH] warn on mem calls modifying objects of non-trivial types (PR 80560)

On Thu, Jun 15, 2017 at 11:31 PM, Jason Merrill wrote: > On Thu, Jun 15, 2017 at 12:26 PM, Martin Sebor wrote: >> On 06/12/2017 03:36 PM, Jason Merrill wrote: >>> >>> On 06/08/2017 01:25 PM, Martin Sebor wrote: + if (TREE_CHAIN (DECL_ARGUMENTS

Re: Avoid generating useless range info

On Wed, Jun 14, 2017 at 6:41 PM, Aldy Hernandez wrote: > Hi! > > As discovered in my range class work, we seem to generate a significant > amount of useless range info out of VRP. > > Is there any reason why we can't avoid generating any range info that spans > the entire

Re: [Patch, Fortran, F03] PR 80983: memory leak when calling procedure-pointer component with allocatable result

Hi, On 15 June 2017 at 23:18, Janus Weil wrote: > 2017-06-15 15:33 GMT+02:00 Thomas Koenig : >> Hi Janus, >> >>> It regtests cleanly on x86_64-linux-gnu. Ok for trunk? >> >> >> OK. >> >> Thanks for the patch! > > Thanks, Thomas! Committed as r249227. >

Re: [Patch match.pd] Fold (A / (1 << B)) to (A >> B)

On Mon, Jun 12, 2017 at 03:56:25PM +0200, Richard Biener wrote: > On Mon, 12 Jun 2017, James Greenhalgh wrote: > > > > > Hi, > > > > As subject, for the testcase in the patch: > > > > unsigned long > > f2 (unsigned long a, int b) > > { > > unsigned long x = 1UL << b; > > return a /

Re: [PATCH] Instrument aggregate call arguments even with -fsanitize=object-size (PR sanitizer/81094)

On Wed, 14 Jun 2017, Jakub Jelinek wrote: > Hi! > > -fsanitize=object-size is yet another sanitization that ignored aggregate > function arguments. Fixed thusly (plus some small cleanup for > instrument_null), bootstrapped/regtested on x86_64-linux and i686-linux, ok > for trunk? Ok. Richard.

Re: [PATCH] warn on mem calls modifying objects of non-trivial types (PR 80560)

On Fri, Jun 16, 2017 at 9:38 AM, Richard Biener wrote: > On Thu, Jun 15, 2017 at 11:31 PM, Jason Merrill wrote: >> On Thu, Jun 15, 2017 at 12:26 PM, Martin Sebor wrote: >>> On 06/12/2017 03:36 PM, Jason Merrill wrote: On

Re: [patch] Do not directly change TARGET_MEM_REF in maybe_canonicalize_mem_ref_addr

On Thu, Jun 15, 2017 at 3:51 PM, Eric Botcazou wrote: > Hi, > > the transformation done to TARGET_MEM_REF in maybe_canonicalize_mem_ref_addr > is exactly the same as one of those done in maybe_fold_tmr, the latter is > better written and the former function calls the

[PATCH] Fix missing returns in libstdc++ header and tests

Some missing returns found by ubsan. * include/bits/locale_conv.h (wbuffer_convert::_M_put): Add missing return statement. * testsuite/21_strings/basic_string_view/operations/copy/char/1.cc: Return void. *

Re: [Patch match.pd] Fold (A / (1 << B)) to (A >> B)

On Fri, 16 Jun 2017, James Greenhalgh wrote: > > On Mon, Jun 12, 2017 at 03:56:25PM +0200, Richard Biener wrote: > > On Mon, 12 Jun 2017, James Greenhalgh wrote: > > > > > > > > Hi, > > > > > > As subject, for the testcase in the patch: > > > > > > unsigned long > > > f2 (unsigned long a,

RE: [PATCH][X86] Fix rounding pattern similar to PR73350

Hi, This test hangs on avx512er, maybe that's why: > According to POSIX, the behavior of a process is undefined after it ignores a > SIGFPE, SIGILL, or SIGSEGV signal that was not generated by kill(2) or > raise(3). And volatile make it work even without a patch(r1 and r2 are not combined

Re: [PATCH][PR 81089][PING] Fix -O3 bootstrap

On Thu, 15 Jun 2017, Yuri Gribov wrote: > On Thu, Jun 15, 2017 at 6:08 AM, Yuri Gribov wrote: > > Hi all, > > > > This patch fixes regression at bootstrap-O3. > > > > Local x64 bootstrap-O3 has completed w/o errors. I didn't run regtests > > (I think it's not needed, given

Re: [PATCH][X86] Fix rounding pattern similar to PR73350

On Fri, Jun 16, 2017 at 8:46 AM, Koval, Julia wrote: > Hi, > > This test hangs on avx512er, maybe that's why: >> According to POSIX, the behavior of a process is undefined after it ignores >> a SIGFPE, SIGILL, or SIGSEGV signal that was not generated by kill(2) or >>

Re: [PATCH GCC][10/13]Compute and cache data dependence relation

On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote: > Hi, > This patch computes and caches data dependence relation in a hash table > so that it can be queried multiple times later for partition dependence > check. > Bootstrap and test on x86_64 and AArch64. Is it OK? +/*

Re: [PATCH GCC][12/13]Workaround reduction statements for distribution

On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote: > Hi, > For now, loop distribution handles variables used outside of loop as > reduction. > This is inaccurate because all partitions contain statement defining induction > vars. But final induction values are usually not used

Re: [patch] Do not directly change TARGET_MEM_REF in maybe_canonicalize_mem_ref_addr

On Fri, Jun 16, 2017 at 12:26 PM, Eric Botcazou wrote: >> I don't think so. get_address_description assumes TMR_BASE is in >> canonical form, >> that is, when it is an ADDR_EXPR we have a symbol and when not we have >> a pointer. >> TMR[>a] violates this and the

Re: RFC: [PATCH] Add warn_if_not_aligned attribute

On Thu, Jun 15, 2017 at 05:31:34PM +, Joseph Myers wrote: > On Thu, 15 Jun 2017, H.J. Lu wrote: > > > On Thu, Jun 15, 2017 at 8:38 AM, Martin Sebor wrote: > > >> > > >> Where do we go from here? > > > > > > > > > Other than the C and C++ maintainers needing to approve the

Re: [PATCH GCC][11/13]Annotate partition by its parallelism execution type

On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote: > Hi, > This patch checks and records if partition can be executed in parallel by > looking if there exists data dependence cycles. The information is needed > for distribution because the idea is to distribute parallel type

Make profile update in inlining more robust

Hi, when inlining last copy of function, we assume that the counts are already correct, because all other execution paths has been inlined earlier. While this is true in simple cases of static functions, it can be wrong for comdats where we optimize out the last copy but during training run we

Re: [Patch, Fortran, F03] PR 80983: memory leak when calling procedure-pointer component with allocatable result

2017-06-16 11:11 GMT+02:00 Christophe Lyon : > Hi, > > On 15 June 2017 at 23:18, Janus Weil wrote: >> 2017-06-15 15:33 GMT+02:00 Thomas Koenig : >>> Hi Janus, >>> It regtests cleanly on x86_64-linux-gnu. Ok for trunk? >>>

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Wed, Jun 14, 2017 at 3:07 PM, Bin Cheng wrote: > Hi, > Loop split forces intermediate computation to gimple operands all the time > when > computing bound information. This is not good since folding opportunities are > missed. This patch fixes the issue by feeding all

Re: [Patch ARM] Fix PR71778

On 16/06/17 10:07, James Greenhalgh wrote: On Wed, Jun 14, 2017 at 11:21:30AM +0100, Kyrill Tkachov wrote: <...> That movv2di expander is the one in vec-common.md that ends up calling neon_make_constant. I wonder why const0_rtx passed its predicate check (that would require a V2DImode

Re: [patch] Do not directly change TARGET_MEM_REF in maybe_canonicalize_mem_ref_addr

> I don't think so. get_address_description assumes TMR_BASE is in > canonical form, > that is, when it is an ADDR_EXPR we have a symbol and when not we have > a pointer. > TMR[>a] violates this and the gimple-fold.c part first canonicalizes this > to TMR[p + offsetof(a)].

Re: [PATCH] Enhance dump_probability function.

> Hi. > > This is pre-approved patch that displays edge counts in dump files: > > ... > _85 = _83 + _84; > len_86 = SQRT (_85); > if (_85 u>= 0.0) > goto ; [99.00%] [count: 778568] > else > goto ; [1.00%] [count: 7864] > >[0.01%] [count: 7864]: > sqrt (_85); > ... > >

Re: [PATCH] Fix PR81090, properly free niter estimates

On Wed, 14 Jun 2017, Richard Biener wrote: > > niter estimates are not kept up-to-date (they reference gimple stmts > and trees) in the keep-loop-stuff infrastructure so similar to the > SCEV cache we rely on people freeing it after passes. > > The following brings us a step closer to that by

[PATCH] Add std::get_deleter overload with correct signature

This was found by a third-party testsuite, which complained because we only define get_deleter(const __shared_ptr&) and not the corect signature. * include/bits/shared_ptr.h (get_deleter): Add overload matching standard signature. * include/bits/shared_ptr_base.h

Re: [PATCH] PR libstdc++/81092 add std::wstring symbols and bump library version

On Wed, Jun 14, 2017 at 07:14:29PM +0100, Jonathan Wakely wrote: > On 14/06/17 19:13 +0100, Jonathan Wakely wrote: > > There are two symbols defined in GCC 7.1's libstdc++.6.0.23 library > > which are not exported on all targets (because I wrote "m" in the > > linker script instead of "[jmy]"). >

Re: [PATCH v3][AArch64] Fix symbol offset limit

On 06/15/2017 03:52 PM, Joseph Myers wrote: For example, given (array + (i - INT_MAX)), it's quite possible the compiler could create a relocation for array - INT_MAX, and the original expression is perfectly OK if i == INT_MAX even though array - INT_MAX is far out of range. (And array -

Re: [patch, libfortran] Speed up cshift for dim > 1

Hi Thomas, Your patch works as advertised! For the record, the following CSHIFT is still 4 times slower than the DO loop td(:,:) = cshift(array=t(:,:), shift=vect(:), dim=1) Thanks for working on this issue. Dominique

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, Jun 16, 2017 at 3:06 PM, Bin.Cheng wrote: > On Fri, Jun 16, 2017 at 11:49 AM, Richard Biener > wrote: >> On Wed, Jun 14, 2017 at 3:07 PM, Bin Cheng wrote: >>> Hi, >>> Loop split forces intermediate computation to

[C++ PATCH] deferred noexcept spec

We defer creating the deferred noexept spec. That's somewhat more deferred than necessary. This patch creates the defered spec at the point we create the noexcept true and false specs. Applied to trunk. nathan -- Nathan Sidwell 2017-06-16 Nathan Sidwell Don't defer

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, Jun 16, 2017 at 2:10 PM, Richard Biener wrote: > On Fri, Jun 16, 2017 at 3:06 PM, Bin.Cheng wrote: >> On Fri, Jun 16, 2017 at 11:49 AM, Richard Biener >> wrote: >>> On Wed, Jun 14, 2017 at 3:07 PM, Bin Cheng

Re: [PATCH] PR libstdc++/81092 add std::wstring symbols and bump library version

On 16/06/17 16:20 +0200, Jakub Jelinek wrote: On Wed, Jun 14, 2017 at 07:13:05PM +0100, Jonathan Wakely wrote: Target maintainers will need to regenerate the baseline symbols on gcc-7-branch and trunk. I intend to commit this tomorrow to gcc-7-branch. commit

Re: [PATCH] PR libstdc++/81092 add std::wstring symbols and bump library version

On 16/06/17 16:21 +0200, Jakub Jelinek wrote: On Wed, Jun 14, 2017 at 07:14:29PM +0100, Jonathan Wakely wrote: On 14/06/17 19:13 +0100, Jonathan Wakely wrote: > There are two symbols defined in GCC 7.1's libstdc++.6.0.23 library > which are not exported on all targets (because I wrote "m" in

[C++ PATCH] symbol tables don't delete

We don't need to delete entries from a symbol table, so there's no point providing that functionality. Applied to trunk. nathan -- Nathan Sidwell 2017-06-16 Nathan Sidwell Symbol tables are insert only. * cp-tree.h (default_hash_traits ): Don't derive from pointer_hash.

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, Jun 16, 2017 at 11:49 AM, Richard Biener wrote: > On Wed, Jun 14, 2017 at 3:07 PM, Bin Cheng wrote: >> Hi, >> Loop split forces intermediate computation to gimple operands all the time >> when >> computing bound information. This is not

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

Patch updated with code style fixes. -- Prakhar Bahuguna >From f1d76a6309a1fe16711b800507938eaa4f78852e Mon Sep 17 00:00:00 2001 From: Prakhar Bahuguna Date: Tue, 2 May 2017 13:43:40 +0100 Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature

[PATCH] Fix std::wbuffer_convert::sync()

My recent fix to wbuffer_convert::_M_put isn't the only problem in that class, I also messed up the condition in wbuffer_convert::sync. * include/bits/locale_conv.h (wbuffer_convert::sync): Fix condition. * testsuite/22_locale/conversions/buffer/2.cc: New. Tested

[C++ Patch] PR 64644 (""warning: anonymous union with no members" should be an error with -pedantic-errors")

Hi, submitter and Manuel analyzed this a while ago and came to the conclusion - which I think is still valid vs the current working draft - that strictly speaking this kind of code violates [dcl.dcl], thus a pedwarn seems more suited than a plain warning. The below one-liner, suggested by

Re: [PATCH] PR libstdc++/81092 add std::wstring symbols and bump library version

On Wed, Jun 14, 2017 at 07:13:05PM +0100, Jonathan Wakely wrote: > Target maintainers will need to regenerate the baseline symbols on > gcc-7-branch and trunk. > > I intend to commit this tomorrow to gcc-7-branch. > > > commit 425e1d784d9085f0f8d58ef6a381cc73d564f2f5 > Author: Jonathan Wakely

[C++ PATCH] Lazier rtti

The rtti descriptor classes and associated variables are constructed as needed during compilation. On the modules branch I found it best to write them by special reference and reconstruct them on read back. That meant some changes to how rtti currently handles them. This patch implements

[C++ PATCH] Keyed classes list

We need to keep a record of classes whose key-method has been emitted (or that lack one). This patch changes that from a TREE_LIST to a vector. The final processing has an elaborate structure, trying to optimize the point at which we have to start stitching out classes from the list. This

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

On 16/06/17 08:48, Prakhar Bahuguna wrote: > On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote: >> On 14/06/17 10:35, Prakhar Bahuguna wrote: >>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which >>> coprocessor intrinsics are available for the target. If >>>

[C++ PATCH] class method vector

The class method vector needs resorting on PCH readin, and module readback. It suffered an unfortunate signed/unsigned comparison collision, that I hit. Reworked to be made safer. Of course this thing should really be a hash table + vector of type conversions, but that's another story.

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote: > On 16/06/17 08:48, Prakhar Bahuguna wrote: > > On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote: > >> On 14/06/17 10:35, Prakhar Bahuguna wrote: > >>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which > >>>

[C++ PATCH] PARM context

We weren't always setting DECL_CONTEXT for parm decls. Which caused me some issues in the modules branch. Fixed by making the callers of the parm-decl builders pass in the function decl. I suspect the places in grokdecl dealing with declaring via typedef (where I pass NULL) will need

[PATCH] Fix PR71815 (SLSR misses PHI opportunities)

Hi, PR71815 identifies a situation where SLSR misses opportunities for PHI candidates when code hoisting is enabled (which is now on by default). The basic problem is that SLSR currently uses an overly simple test for profitability of the transformation. The algorithm currently requires that

Re: [PATCH v4, rs6000] gcc mainline, add builtin support for vec_float, vec_float2, vec_floate, vec_floate, builtins

GCC Maintainers: I have addressed the latest comments on the patch from Segher, formatting issues and renaming the new define_mode_attr. I believe I have addressed all of the issues. I have reviewed the patch for formatting issues. I retested the changes on powerpc64le-unknown-linux-gnu

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener wrote: > On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng" > wrote: >>On Fri, Jun 16, 2017 at 2:10 PM, Richard Biener >> wrote: >>> On Fri, Jun 16, 2017 at 3:06 PM,

[PATCH][PR sanitizer/77631] Support separate debug info in libbacktrace

Hello everyone, This is a patch for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77631 Can some one please review attached patch. Thanks. From ae74cf3d632b06a91a986e32e3a6c16223767b24 Mon Sep 17 00:00:00 2001 From: Denis Khalikov Date: Fri, 16 Jun 2017 12:13:13

Re: [Patch, ARM, testsuite] Add -mfloat-abi=hard to arm_neon_ok

ping? On 7 June 2017 at 11:13, Christophe Lyon wrote: > Hi, > > > On 2 June 2017 at 16:19, Christophe Lyon wrote: >> Hi, >> >> I have recently updated the dejagnu version I use for >> cross-testing arm and aarch64 toolchains to 1.6+. One

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng" wrote: >On Fri, Jun 16, 2017 at 2:10 PM, Richard Biener > wrote: >> On Fri, Jun 16, 2017 at 3:06 PM, Bin.Cheng >wrote: >>> On Fri, Jun 16, 2017 at 11:49 AM, Richard

Re: [PATCH 2/2] DWARF: make it possible to emit debug info for declarations only

On 05/31/2017 11:08 AM, Pierre-Marie de Rodat wrote: On 05/31/2017 09:34 AM, Richard Biener wrote: Actually for the bigger picture I'd refactor rest_of_decl_compilation, not calling it from the frontends but rely on finalize_decl/function. The missing part would then be calling the dwarf hook

Re: [PATCH] [PR79542][Ada] Fix ICE in dwarf2out.c with nested func. inlining

On 05/26/2017 04:12 PM, Pierre-Marie de Rodat wrote: I tried this, but I got a crash when compiling the Ada runtime (g-awk.adb). I could not extract a reproducer, but the idea is that because of the call to set_decl_origin_self, some DECLs have themselves as DECL_ABSTRACT_ORIGIN. As a result,

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, 16 Jun 2017, Bin.Cheng wrote: On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener wrote: On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng" wrote: On Fri, Jun 16, 2017 at 2:10 PM, Richard Biener wrote: On

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, Jun 16, 2017 at 5:48 PM, Marc Glisse wrote: > On Fri, 16 Jun 2017, Bin.Cheng wrote: > >> On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener >> wrote: >>> >>> On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng" >>>

Re: [PATCH] fix PR ada/80888

Ping If OK, can it be applied please? (patch applies cleanly to current sources) > On 27 May 2017, at 16:58, Simon Wright wrote: > > The GNAT reference manual says in 11.6 Wide_Text_IO > , > > "The default

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

On Fri, Jun 16, 2017 at 9:48 AM, Marc Glisse wrote: > On Fri, 16 Jun 2017, Bin.Cheng wrote: > >> On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener >> wrote: >>> >>> On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng" >>>

Re: [PATCH/AARCH64] Improve aarch64 conditional compare usage

https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00021.html Ping. Steve Ellcey sell...@cavium.com

Make edge profiling slightly faster

Hi, edge profling builds spanning tree and then intstruments all remaining edges of CFG. With branch prediction we could pick up those edges that are expected to execute more often saving some of -fprofile-generate overhead (about 3% on tramp3d but likely more on testcases with more complicated

Re: [PATCH GCC][12/13]Workaround reduction statements for distribution

On Fri, Jun 16, 2017 at 11:21 AM, Richard Biener wrote: > On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote: >> Hi, >> For now, loop distribution handles variables used outside of loop as >> reduction. >> This is inaccurate because all partitions

Re: [patch, libfortran] Speed up cshift for dim > 1

On 06/14/2017 12:41 PM, Thomas Koenig wrote: > Hello world, > > the attached patch implements a blocked algorithm for > improving the speed of cshift for dim > 1. > > It uses the fact that > > integer, dimension (n1,n2,n3) :: a, b > > b = cshift(a,shift,3) > > is identical, as far as the